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1. 发明授权

US07118991B2 Encapsulation wafer process 失效
标题翻译：封装晶圆工艺
公开(公告)号：US07118991B2
公开(公告)日：2006-10-10
申请号：US10708936
申请日：2004-04-01
申请人： Troy A. Chase , James H. Logsdon , James Kingery
发明人： Troy A. Chase , James H. Logsdon , James Kingery
IPC分类号： H01L21/30 , H01L21/46 , H01L21/302 , H01L21/461
CPC分类号： B81C1/00333 , B81C2203/0118
摘要： A method of processing a wafer, and particularly a cap wafer configured for mating with a device wafer in the production of a die package. Masking layers are deposited on oxide layers present on opposite surfaces of the wafer, after which the masking layers are etched to expose regions of the underlying oxide layers. Thereafter, an oxide mask is formed on the exposed regions of the oxide layers, but is prevented from forming on other regions of the oxide layers masked by the masking layers. The masking layers are then removed and the underlying regions of the oxide layers and the wafer are etched to simultaneously produce through-holes and recesses in the wafer. The oxide mask is then removed to allow mating of the cap wafer with a device wafer.
摘要翻译：一种处理晶片的方法，特别是在制造模具封装中配置成与器件晶片配合的盖晶片。掩蔽层沉积在存在于晶片的相对表面上的氧化物层上，之后蚀刻掩模层以暴露下面的氧化物层的区域。此后，在氧化物层的暴露区域上形成氧化物掩模，但是防止在被掩蔽层掩蔽的氧化物层的其它区域上形成氧化物掩模。然后去除掩模层，并蚀刻氧化物层和晶片的下面的区域，以同时在晶片中产生通孔和凹槽。然后去除氧化物掩模以允许盖晶片与器件晶片的匹配。

2. 发明授权

US07180064B2 Infrared sensor package 有权
标题翻译：红外传感器封装
公开(公告)号：US07180064B2
公开(公告)日：2007-02-20
申请号：US10710260
申请日：2004-06-29
申请人： Han-Sheng Lee , Dan W. Chilcott , James H. Logsdon
发明人： Han-Sheng Lee , Dan W. Chilcott , James H. Logsdon
IPC分类号： G01J5/00
CPC分类号： B81B7/0067 , B81C2203/0118 , G01J5/08 , G01J5/0853 , G01J5/10
摘要： An optical sensor package with a substrate that supports a membrane carrying an optical sensor and through which radiation passes to impinge the sensor. The substrate has a first surface in which a cavity is defined, a second surface opposite the first surface, and a wall between the cavity and the second surface. The optical sensor is supported on the membrane, which is bonded to the substrate and spans the cavity in the substrate. A window is defined at the second surface of the substrate for enabling infrared radiation to pass through the wall of the substrate to the optical sensor.
摘要翻译：一种光学传感器封装，其具有支撑携带光学传感器并且辐射通过该膜以撞击传感器的膜的基板。衬底具有其中限定空腔的第一表面，与第一表面相对的第二表面以及腔和第二表面之间的壁。光学传感器被支撑在膜上，该膜结合到基底并跨越基底中的空腔。窗口被限定在基板的第二表面上，以使得红外辐射能够通过基板的壁到达光学传感器。

3. 发明授权

US06828560B2 Integrated light concentrator 有权
标题翻译：集成光集中器
公开(公告)号：US06828560B2
公开(公告)日：2004-12-07
申请号：US10059401
申请日：2002-01-31
申请人： David K. Lambert , Han-Sheng Lee , Dan W. Chilcott , Hamid R. Borzabadi , Qin Jiang , James H. Logsdon
发明人： David K. Lambert , Han-Sheng Lee , Dan W. Chilcott , Hamid R. Borzabadi , Qin Jiang , James H. Logsdon
IPC分类号： G01J508
CPC分类号： G01J5/0022 , G01J5/0025 , G01J5/02 , G01J5/0225 , G01J5/045 , G01J5/06 , G01J5/08 , G01J5/0809 , G01J5/0815 , G01J5/0853 , G01J5/0875 , G01J5/12
摘要： An infrared sensor including an absorber for absorbing incident infrared power to produce a signal representing the temperature of a target object, a frame supporting a membrane which carries the absorber, the frame including a plurality of reflecting surfaces disposed about the circumference of an opening over which the membrane spans for reflecting incident infrared power toward the absorber. By concentrating incident infrared power through reflection, the temperature difference between the absorber and the surrounding frame is increased, thereby producing an increased electrical output from the sensor.
摘要翻译：一种红外线传感器，包括：吸收器，用于吸收入射的红外光，产生表示目标物体的温度的信号;支撑承载吸收体的膜的框架，所述框架包括围绕开口的圆周设置的多个反射面，膜跨过来将反射入射的红外线朝向吸收体反射。通过反射聚焦入射的红外线功率，吸收器和周围框架之间的温差增加，从而产生从传感器增加的电输出。

4. 发明授权

US06844606B2 Surface-mount package for an optical sensing device and method of manufacture 有权
标题翻译：用于光学感测装置的表面贴装封装及其制造方法
公开(公告)号：US06844606B2
公开(公告)日：2005-01-18
申请号：US10065446
申请日：2002-10-18
申请人： James H. Logsdon , Abhijeet V. Chavan , Hamid R. Borzabadi
发明人： James H. Logsdon , Abhijeet V. Chavan , Hamid R. Borzabadi
IPC分类号： G01J5/00 , H01L23/02 , H01L23/10 , H01L25/16
CPC分类号： H01L25/167 , H01L23/10 , H01L2224/16 , H01L2924/09701 , H01L2924/10253 , H01L2924/15153 , H01L2924/15165 , H01L2924/15174 , H01L2924/16195 , H01L2924/00
摘要： An optical sensor package capable of being surface mounted, and in a form that enables multiple packages to be fabricated simultaneously and then array tested in a wafer stack prior to singulation. The package comprises a chip carrier, a device chip electrically and mechanically connected to a first surface of the chip carrier with solder connections, and a capping chip secured to the chip carrier to hermetically enclose the device chip. The device chip has an optical sensing element on a surface thereof, while the capping chip has means for enabling radiation to pass therethrough to the device chip. The chip carrier includes conductive vias that are electrically connected to the solder connections of the device chip and extend through the chip carrier to bond pads on a second surface of the chip carrier, enabling the package to be surface mounted with solder connections to a suitable substrate.
摘要翻译：一种能够被表面安装的光学传感器封装，并且能够在分割之前同时制造多个封装，然后在晶片堆叠中进行阵列测试。封装包括芯片载体，器件芯片，电连接和机械连接到具有焊料连接的芯片载体的第一表面，以及封装芯片，固定到芯片载体以气密地封装器件芯片。器件芯片在其表面上具有光学感测元件，而封盖芯片具有用于使辐射能够穿过其中的装置芯片的装置。芯片载体包括导电通孔，其电连接到器件芯片的焊接连接并延伸穿过芯片载体以在芯片载体的第二表面上接合焊盘，使封装能够被表面安装，焊接连接到合适的衬底。

5. 发明授权

US5415726A Method of making a bridge-supported accelerometer structure 失效
标题翻译：制造桥梁加速度计结构的方法
公开(公告)号：US5415726A
公开(公告)日：1995-05-16
申请号：US170955
申请日：1993-12-21
申请人： Steven E. Staller , James H. Logsdon
发明人： Steven E. Staller , James H. Logsdon
IPC分类号： G01P15/04 , G01P15/08 , H01L29/84 , B44C1/22
CPC分类号： G01P15/0802
摘要： This invention includes a method of making a bridge-supported accelerometer structure. A first wafer is worked, preferably by bulk micromachining, to provide a proof mass supported by a thin membrane on all sides. The thin membrane has the same thickness as the bridges to be defined therein. The first wafer is bonded to a second wafer having a cavity formed therein. The first wafer is then worked, preferably by plasma etching, to delineate bridges in the thin membrane. The cavity in the second wafer provides damping of the proof mass which reduced bridge breakage as portions of the thin membrane are removed leaving the final bridge-supported accelerometer structure. Combining the two wafers together prior to delineating the bridge provides for handling and processing of a much less fragile structure than the first wafer alone with bridges delineated therein.
摘要翻译：本发明包括制造桥式加速度计结构的方法。优选通过体积微加工来加工第一晶片，以提供在所有侧面上由薄膜支撑的校验物质。薄膜具有与要限定的桥相同的厚度。第一晶片被结合到其中形成有腔的第二晶片。然后优选通过等离子体蚀刻来加工第一晶片以描绘薄膜中的桥。第二晶片中的空腔提供了防止质量块的阻尼，当薄膜的部分被去除时，减少桥断裂，留下最终的桥式支撑的加速度计结构。在描绘桥之前，将两个晶片组合在一起，提供了处理和处理比仅在其中描绘的桥的单独的第一晶片少得多的脆弱结构。

6. 发明授权

US07119326B2 Method and apparatus for testing an infrared sensor 失效
标题翻译：用于测试红外传感器的方法和装置
公开(公告)号：US07119326B2
公开(公告)日：2006-10-10
申请号：US10905151
申请日：2004-12-17
申请人： James H. Logsdon , Pedro E. Castillo-Borelly , Abhijeet V. Chavan , Michael P. Donahue , Deron K. Slaughter
发明人： James H. Logsdon , Pedro E. Castillo-Borelly , Abhijeet V. Chavan , Michael P. Donahue , Deron K. Slaughter
IPC分类号： G01D18/00 , G12B13/00
CPC分类号： G01J5/12
摘要： A method and apparatus for evaluating the functionality and sensitivity of an infrared sensor to infrared radiation. The method and apparatus are adapted for testing an infrared sensor having a diaphragm containing a heating element and a transducer that generates an output responsive to temperature. The method entails placing the infrared sensor in a controlled environment, and then exposing the diaphragm of the sensor to different levels of thermal radiation so as to obtain outputs of the transducer at different output levels. In the absence of exposure of the diaphragm to thermal radiation, flowing current through the heating element at different input levels so that the output of the transducer returns to the different output levels obtained using thermal radiation, the input difference between the input levels can be computed and used to assess the functionality and the sensitivity of the sensor.
摘要翻译：一种用于评估红外传感器对红外辐射的功能和灵敏度的方法和装置。该方法和装置适于测试具有包含加热元件的振动膜和产生响应于温度的输出的换能器的红外传感器。该方法需要将红外传感器放置在受控的环境中，然后将传感器的膜片暴露于不同的热辐射水平，以便获得不同输出电平的换能器的输出。在没有将隔膜暴露于热辐射的情况下，流过不同输入电平的加热元件的电流，使得换能器的输出返回到使用热辐射获得的不同输出电平，可以计算输入电平之间的输入差并用于评估传感器的功能和灵敏度。

7. 发明授权

US06828172B2 Process for a monolithically-integrated micromachined sensor and circuit 失效
标题翻译：单片集成微机械传感器和电路的工艺
公开(公告)号：US06828172B2
公开(公告)日：2004-12-07
申请号：US10065448
申请日：2002-10-18
申请人： Abhijeet V. Chavan , James H. Logsdon , Dan W. Chilcott , John C. Christenson , Robert K. Speck
发明人： Abhijeet V. Chavan , James H. Logsdon , Dan W. Chilcott , John C. Christenson , Robert K. Speck
IPC分类号： H01I2100
CPC分类号： B81B3/0072 , B81B2201/0278 , B81B2203/0127 , G01J5/02 , G01J5/024 , G01J5/12 , H01L27/16 , H01L2224/48463
摘要： A process using integrated sensor technology in which a micromachined sensing element and signal processing circuit are combined on a single semiconductor substrate to form, for example, an infrared sensor. The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm, after the circuit fabrication process is completed. The process generally entails forming a circuit device on a substrate by processing steps that include forming multiple dielectric layers and at least one conductive layer on the substrate. The dielectric layers comprise an oxide layer on a surface of the substrate and at least two dielectric layers that are in tension, with the conductive layer being located between the two dielectric layers. The surface of the substrate is then dry etched to form a cavity and delineate the diaphragm and a frame surrounding the diaphragm. The dry etching step terminates at the oxide layer, such that the diaphragm comprises the dielectric layers and conductive layer. A special absorber is preferably fabricated on the diaphragm to promote efficient absorption of incoming infrared radiation.
摘要翻译：使用集成传感器技术的方法，其中微机械感测元件和信号处理电路组合在单个半导体衬底上以形成例如红外传感器。该方法基于在电路制造过程完成之后修改CMOS工艺以产生改进的分层微加工构件，例如隔膜。该方法通常需要通过处理步骤在衬底上形成电路器件，该步骤包括在衬底上形成多个电介质层和至少一个导电层。电介质层包括在衬底的表面上的氧化物层和处于张力的至少两个电介质层，导电层位于两个电介质层之间。然后将基板的表面干蚀刻以形成空腔并描绘膜片和围绕隔膜的框架。干蚀刻步骤终止于氧化物层，使得隔膜包括电介质层和导电层。优选地在隔膜上制造特殊的吸收体以促进进入的红外辐射的有效吸收。

8. 发明授权

US06793389B2 Monolithically-integrated infrared sensor 有权
标题翻译：单片集成红外传感器
公开(公告)号：US06793389B2
公开(公告)日：2004-09-21
申请号：US10065447
申请日：2002-10-18
申请人： Abhijeet V. Chavan , James H. Logsdon , Dan W. Chilcott , Han-Sheng S. Lee , David K. Lambert , Timothy A. Vas
发明人： Abhijeet V. Chavan , James H. Logsdon , Dan W. Chilcott , Han-Sheng S. Lee , David K. Lambert , Timothy A. Vas
IPC分类号： G01K702
CPC分类号： G01J5/14 , G01J5/12
摘要： An integrated sensor comprising a thermopile transducer and signal processing circuitry that are combined on a single semiconductor substrate, such that the transducer output signal is sampled in close vicinity by the processing circuitry. The sensor comprises a frame formed of a semiconductor material that is not heavily doped, and with which a diaphragm is supported. The diaphragm has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles. Each thermopile comprises a sequence of thermocouples, each thermocouple comprising dissimilar electrically-resistive materials that define hot junctions located on the diaphragm and cold junctions located on the frame. The signal processing circuitry is located on the frame and electrically interconnected with the thermopiles. The thermopiles are interlaced so that the output of one of the thermopiles increases with increasing temperature difference between the hot and cold junctions thereof, while the output of the second thermopile decreases with increasing temperature difference between its hot and cold junctions.
摘要翻译：一种集成传感器，包括组合在单个半导体衬底上的热电堆换能器和信号处理电路，使得换能器输出信号在处理电路附近被采样。传感器包括由不重掺杂的半导体材料形成的框架，并且隔膜支撑在该框架上。隔膜具有用于接收热（例如，红外）辐射的第一表面，并且包括多层，其包括含有至少一对隔行热电堆的感测层。每个热电堆包括一系列热电偶，每个热电偶包括不同的电阻材料，其限定位于隔膜上的热接点和位于框架上的冷接头。信号处理电路位于框架上并与热电堆电互连。热电堆交织使得其中一个热电堆的输出随着其热连接点和冷连接点之间温度差的增加而增加，而第二热电堆的输出随着其热连接点和冷连接点之间的温差增加而减小。

9. 发明授权

US5369057A Method of making and sealing a semiconductor device having an air path therethrough 失效
标题翻译：制造和密封具有穿过其中的空气通道的半导体器件的方法
公开(公告)号：US5369057A
公开(公告)日：1994-11-29
申请号：US169118
申请日：1993-12-21
申请人： Han-Sheng Lee , Steven E. Staller , James H. Logsdon , Dan W. Chilcott
发明人： Han-Sheng Lee , Steven E. Staller , James H. Logsdon , Dan W. Chilcott
IPC分类号： G01P1/02 , G01P15/08 , H01L21/50 , H01L23/13 , H01L21/60
CPC分类号： G01P1/023 , G01P15/0802 , H01L21/50 , H01L23/13 , H01L2924/0002 , Y10T29/49103
摘要： This invention generally relates to the provision of a vent path during the bonding of silicon wafers and the subsequent encapsulation of the individual devices. A double-sided polished silicon wafer is used for the device wafer. The device wafer includes circuitry, thin membranes and metal interconnections. When bonding a bottom wafer to the device wafer, a vented path exists between the wafers. The venting path includes serpentine shape channel formed by interdigitated fingers and cavities. The cavity and the interdigitated patterns can be etched either together or separately into either wafer. A top wafer has a cavity formed therein. When the top device and bottom wafers are bonded together, the venting path is sealed by dipping the device in a sealing liquid. The serpentine path prevents the sealing liquid from reaching the cavity.
摘要翻译：本发明一般涉及在硅晶片的接合期间提供通气路径以及随后的各个装置的封装。用于器件晶圆的双面抛光硅晶片。器件晶片包括电路，薄膜和金属互连。当将底部晶片接合到器件晶片时，在晶片之间存在通气路径。通气路径包括由叉指和空腔形成的蛇形形状通道。空腔和叉指图案可以一起蚀刻或分别蚀刻到任一晶片中。顶部晶片具有形成在其中的空腔。当顶部装置和底部晶片结合在一起时，通过将装置浸入密封液中来密封通气路径。蛇形路径防止密封液到达腔体。

10. 发明授权

US5068203A Method for forming thin silicon membrane or beam 失效
标题翻译：形成薄硅膜或光束的方法
公开(公告)号：US5068203A
公开(公告)日：1991-11-26
申请号：US577656
申请日：1990-09-04
申请人： James H. Logsdon , Steven E. Staller , David W. De Roo , Gerold W. Neudeck
发明人： James H. Logsdon , Steven E. Staller , David W. De Roo , Gerold W. Neudeck
IPC分类号： G01P15/12 , G01L9/00 , G01P15/08 , H01L21/205 , H01L29/84
CPC分类号： G01P15/0802 , G01L9/0042 , Y10T29/49103
摘要： A method is disclosed for forming thin, suspended membranes of epitaxial silicon material. Silicon oxide strips having a predetermined thickness are first formed on a silicon substrate. The gap, or spacing, between adjaceant beams is preferably less than or equal to about 1.4 times the thickness of the silicon oxide strip. The underlying silicon substrate is exposed within these gaps in the silicon oxide layer, thereby the gaps provide a seed hole for subsequent epitaxial growth from the silicon substrate. Epitaxial silicon is grown through the seed holes and then allowed to grow laterally over the silicon oxide strips to form a continuous layer of epitaxial silicon over the silicon oxide strips. The backside of the silicon substrate, or surface opposite the surface having the silicon oxide strips, is then masked to delineate the desired diaphragm and microbridge pattern. The silicon is etched conventionally from the backside. Etching is substantially terminated automatically by the presence of the silicon oxide strips. The thin, single crystal silicon membranes are suitable for use as diaphragms and microbridges in a microaccelerometers or pressure sensor.

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