会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 10. 发明授权
    • Trench gate type transistor
    • 沟槽型晶体管
    • US08242557B2
    • 2012-08-14
    • US12447820
    • 2008-09-26
    • Satoru ShimadaYoshikazu YamaokaKazunori FujitaTomonori Tabe
    • Satoru ShimadaYoshikazu YamaokaKazunori FujitaTomonori Tabe
    • H01L29/76
    • H01L29/7813H01L29/0653H01L29/0696H01L29/41741H01L29/41766H01L29/4236H01L29/42368H01L29/4238H01L29/66734H01L29/7809
    • The invention provides a trench gate type transistor in which the gate capacitance is reduced, the crystal defect is prevented and the gate breakdown voltage is enhanced. Trenches are formed in an N− type semiconductor layer. A uniformly thick silicon oxide film is formed on the bottom of each of the trenches and near the bottom, being round at corner portions. A silicon oxide film is formed on the upper portion of the sidewall of each of the trenches, which is thinner than the silicon oxide film and round at corner portions. Gate electrodes are formed from inside the trenches onto the outside thereof. The thick silicon oxide film reduces the gate capacitance, and the thin silicon oxide film on the upper portion provides good transistor characteristics. Furthermore, with the round corner portions, the crystal defect does not easily occur, and the gate electric field is dispersed to enhance the gate breakdown voltage.
    • 本发明提供一种沟槽栅型晶体管,其栅极电容减小,防止了晶体缺陷,提高了栅极击穿电压。 沟槽形成在N-型半导体层中。 在每个沟槽的底部和底部附近形成均匀厚的氧化硅膜,在角部处是圆形的。 在每个沟槽的侧壁的上部形成氧化硅膜,其比氧化硅膜薄并且在角部处圆形。 栅极电极从沟槽内部形成到其外部。 厚的氧化硅膜减小栅极电容,并且上部的薄氧化硅膜提供良好的晶体管特性。 此外,由于圆角部分不容易发生晶体缺陷,并且栅极电场被分散以提高栅极击穿电压。