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1. 发明授权

US07683268B2 Semiconductor module with high process accuracy, manufacturing method thereof, and semiconductor device therewith 失效
标题翻译：具有高加工精度的半导体模块及其制造方法及其半导体器件
公开(公告)号：US07683268B2
公开(公告)日：2010-03-23
申请号：US11147778
申请日：2005-06-07
申请人： Ryosuke Usui , Takeshi Nakamura , Atsuhiro Nishida
发明人： Ryosuke Usui , Takeshi Nakamura , Atsuhiro Nishida
IPC分类号： H01L23/28
CPC分类号： H01L23/49894 , H01L21/6835 , H01L23/49816 , H01L23/5389 , H01L24/24 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/82 , H01L2221/68345 , H01L2224/04105 , H01L2224/12105 , H01L2224/24145 , H01L2224/24195 , H01L2224/32145 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73267 , H01L2224/82005 , H01L2225/06568 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01016 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3511 , H05K1/185 , H01L2924/00014 , H01L2924/00015 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor element and a passive element are embedded in an insulating resin film by thermocompression bonding. After formation of a interconnection, a layered film which contains a film insulating between elements and is provided with a recess or penetrated portion is pressure-bonded followed by formation of a member with a high resistance or a high dielectric constant by embedding a material of a member constituting an element such as a resistor and a capacitor in the recess. Furthermore, after formation of the upper layer insulating resin film, a photoimageable solder resist layer containing the cardo type polymer is formed, and interconnection formation and solder electrode formation are performed.
摘要翻译：通过热压接将半导体元件和无源元件嵌入绝缘树脂膜中。在形成互连之后，将包含元件之间绝缘的膜并且设置有凹部或穿透部分的层压膜压接，然后通过嵌入材料形成具有高电阻或高介电常数的部件在凹部中构成诸如电阻器和电容器的元件的构件。此外，在形成上层绝缘树脂膜之后，形成包含cardo型聚合物的可光成像阻焊层，并进行互连形成和焊料电极形成。

2. 发明授权

US07495344B2 Semiconductor apparatus 失效
标题翻译：半导体装置
公开(公告)号：US07495344B2
公开(公告)日：2009-02-24
申请号：US11082150
申请日：2005-03-16
申请人： Ryosuke Usui , Atsuhiro Nishida , Hideki Mizuhara , Takeshi Nakamura
发明人： Ryosuke Usui , Atsuhiro Nishida , Hideki Mizuhara , Takeshi Nakamura
IPC分类号： H01L23/28 , H01L23/29
CPC分类号： H01L25/16 , H01L21/56 , H01L23/3128 , H01L23/3142 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H05K1/0218 , H05K3/284 , H05K3/381 , H05K2203/095 , H05K2203/1311 , H01L2924/00012 , H01L2924/00 , H01L2924/00015 , H01L2224/05599
摘要： A semiconductor apparatus includes a substrate and elements or semiconductor chips provided on the substrate. The elements are sealed by being brought into contact with a sealing compound. The surface of contact on the elements or the sealing compound is plasma treated. The semiconductor chip is adhesively attached to another semiconductor chip via an adhesive compound. The surface of the semiconductor chip in contact with the adhesive compound is plasma treated.
摘要翻译：半导体装置包括衬底和设置在衬底上的元件或半导体芯片。这些元件通过与密封化合物接触而被密封。元件或密封剂上的接触表面进行等离子体处理。半导体芯片通过粘合剂化合物粘附到另一半导体芯片上。与粘合剂化合物接触的半导体芯片的表面被等离子体处理。

3. 发明授权

US06803636B2 Semiconductor device having silicide films 有权
标题翻译：具有硅化物膜的半导体器件
公开(公告)号：US06803636B2
公开(公告)日：2004-10-12
申请号：US10243744
申请日：2002-09-16
申请人： Yoshikazu Ibara , Atsuhiro Nishida
发明人： Yoshikazu Ibara , Atsuhiro Nishida
IPC分类号： H01L2976
CPC分类号： H01L27/0629 , H01L28/24
摘要： A semiconductor device capable of easily setting the sheet resistance of a resistive element or the like to an arbitrary value is obtained. This semiconductor device comprises a first silicide film formed on a first silicon region and a second silicide film, formed on a second silicon region, consisting of the same silicide material as the first silicide film and differing from the first silicide film in film quality to have a sheet resistance value different from that of the first silicide film. When an impurity is introduced into the second silicide film itself so that the second silicide film differs from the first silicide film in film quality in this case, for example, a second silicide film having an arbitrary high sheet resistance value can be obtained by controlling the type of and an introduction condition for the impurity.
摘要翻译：可以获得能够容易地将电阻元件等的薄层电阻设定为任意值的半导体装置。该半导体器件包括形成在第一硅区域上的第一硅化物膜和形成在第二硅区域上的第二硅化物膜，该第二硅化物膜由与第一硅化物膜相同的硅化物材料构成，并且与第一硅化物膜的膜质量不同，与第一硅化物膜的电阻值不同。当在这种情况下，当第二硅化物膜本身引入杂质以使第二硅化物膜与第一硅化物膜的膜质量不同时，例如可以通过控制第二硅化物膜的任意的高电阻值的第二硅化物膜来获得类型和杂质的引入条件。

4. 发明申请

US20050205996A1 Semiconductor apparatus 失效
标题翻译：半导体装置
公开(公告)号：US20050205996A1
公开(公告)日：2005-09-22
申请号：US11082150
申请日：2005-03-16
申请人： Ryosuke Usui , Atsuhiro Nishida , Hideki Mizuhara , Takeshi Nakamura
发明人： Ryosuke Usui , Atsuhiro Nishida , Hideki Mizuhara , Takeshi Nakamura
IPC分类号： H01L21/56 , H01L23/31 , H01L23/48 , H01L25/16 , H05K1/02 , H05K3/28 , H05K3/38
CPC分类号： H01L25/16 , H01L21/56 , H01L23/3128 , H01L23/3142 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H05K1/0218 , H05K3/284 , H05K3/381 , H05K2203/095 , H05K2203/1311 , H01L2924/00012 , H01L2924/00 , H01L2924/00015 , H01L2224/05599
摘要： A semiconductor apparatus includes a substrate and elements or semiconductor chips provided on the substrate. The elements are sealed by being brought into contact with a sealing compound. The surface of contact on the elements or the sealing compound is plasma treated. The semiconductor chip is adhesively attached to another semiconductor chip via an adhesive compound. The surface of the semiconductor chip in contact with the adhesive compound is plasma treated.
摘要翻译：半导体装置包括衬底和设置在衬底上的元件或半导体芯片。这些元件通过与密封化合物接触而被密封。元件或密封剂上的接触表面进行等离子体处理。半导体芯片通过粘合剂化合物粘附到另一半导体芯片上。与粘合剂化合物接触的半导体芯片的表面进行等离子体处理。

5. 发明授权

US5936300A Semiconductor device with film covering 失效
标题翻译：具有膜覆盖的半导体器件
公开(公告)号：US5936300A
公开(公告)日：1999-08-10
申请号：US826314
申请日：1997-03-24
申请人： Kazuhiro Sasada , Mamoru Arimoto , Hideharu Nagasawa , Atsuhiro Nishida , Hiroyuki Aoe , Yosifumi Matusita
发明人： Kazuhiro Sasada , Mamoru Arimoto , Hideharu Nagasawa , Atsuhiro Nishida , Hiroyuki Aoe , Yosifumi Matusita
IPC分类号： H01L21/768 , H01L21/8238 , H01L23/532 , H01L23/58
CPC分类号： H01L21/823871 , H01L21/76829 , H01L21/76834 , H01L23/5329 , H01L2924/0002
摘要： A pair of source/drain regions are formed on a semiconductor substrate at a predetermined interval. A gate insulator film is formed on the semiconductor substrate between the source/drain regions of the pair. A gate electrode is formed on the gate insulator film. A film for covering the gate electrode and the source/drain regions has a low permeability against water and a hydroxide group, and has a thickness greater than 3 nm and less than 5 nm.
摘要翻译：一对源极/漏极区以预定的间隔形成在半导体衬底上。在该对的源/漏区之间的半导体衬底上形成栅极绝缘膜。在栅极绝缘膜上形成栅电极。用于覆盖栅电极和源极/漏极区的膜对水和氢氧化物基团具有低渗透性，并且具有大于3nm且小于5nm的厚度。

6. 发明申请

US20050269128A1 Semiconductor module with high process accuracy, manufacturing method thereof, and semiconductor device therewith 失效
标题翻译：具有高加工精度的半导体模块及其制造方法及其半导体器件
公开(公告)号：US20050269128A1
公开(公告)日：2005-12-08
申请号：US11147778
申请日：2005-06-07
申请人： Ryosuke Usui , Takeshi Nakamura , Atsuhiro Nishida
发明人： Ryosuke Usui , Takeshi Nakamura , Atsuhiro Nishida
IPC分类号： H01L25/18 , H01L21/68 , H01L23/498 , H01L23/52 , H01L23/538 , H01L25/00 , H01L25/04 , H05K1/03 , H05K1/18
CPC分类号： H01L23/49894 , H01L21/6835 , H01L23/49816 , H01L23/5389 , H01L24/24 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/82 , H01L2221/68345 , H01L2224/04105 , H01L2224/12105 , H01L2224/24145 , H01L2224/24195 , H01L2224/32145 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73267 , H01L2224/82005 , H01L2225/06568 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01016 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3511 , H05K1/185 , H01L2924/00014 , H01L2924/00015 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor element and a passive element are embedded in an insulating resin film by thermocompression bonding. After formation of a interconnection, a layered film which contains a film insulating between elements and is provided with a recess or penetrated portion is pressure-bonded followed by formation of a member with a high resistance or a high dielectric constant by embedding a material of a member constituting an element such as a resistor and a capacitor in the recess. Furthermore, after formation of the upper layer insulating resin film, a photoimageable solder resist layer containing the cardo type polymer is formed, and interconnection formation and solder electrode formation are performed.
摘要翻译：通过热压接将半导体元件和无源元件嵌入绝缘树脂膜中。在形成互连之后，将包含元件之间绝缘的膜并且设置有凹部或穿透部分的层压膜压接，然后通过嵌入材料形成具有高电阻或高介电常数的部件在凹部中构成诸如电阻器和电容器的元件的构件。此外，在形成上层绝缘树脂膜之后，形成包含cardo型聚合物的可光成像阻焊层，并进行互连形成和焊料电极形成。

7. 发明授权

US06794283B2 Semiconductor device and fabrication method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US06794283B2
公开(公告)日：2004-09-21
申请号：US09320271
申请日：1999-05-27
申请人： Hiroyuki Watanabe , Hideki Mizuhara , Shinichi Tanimoto , Atsuhiro Nishida , Yoshikazu Yamaoka , Yasunori Inoue
发明人： Hiroyuki Watanabe , Hideki Mizuhara , Shinichi Tanimoto , Atsuhiro Nishida , Yoshikazu Yamaoka , Yasunori Inoue
IPC分类号： H01L214763
CPC分类号： H01L21/02126 , H01L21/022 , H01L21/02274 , H01L21/02351 , H01L21/31155 , H01L21/316 , H01L21/76801 , H01L21/76807 , H01L21/76808 , H01L21/7681 , H01L21/76825 , H01L23/5226 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device superior in reliability and suitable for microminiaturization is provided. An organic SOG film is formed on a silicon oxide film. Boron ions are implanted into the organic SOG film. By introducing boron ions into the organic SOG film, the organic components in the film are decomposed. Also, the moisture and hydroxyl group included in the film are reduced. After a metal interconnection is embedded in a modified SOG film by the Damascene method, a modified SOG film is formed thereon. Then, contact holes are formed. After a contact hole interconnection is embedded in the contact holes, a modified SOG film and an upper metal interconnection are formed by the Damascene method.
摘要翻译：提供了可靠性优异并且适合于微型化的半导体器件。在氧化硅膜上形成有机SOG膜。将硼离子注入到有机SOG膜中。通过将硼离子引入有机SOG膜中，膜中的有机成分被分解。此外，膜中包含的水分和羟基也被还原。通过镶嵌法将金属互连嵌入改性SOG膜中之后，形成改性SOG膜。然后，形成接触孔。在接触孔嵌入接触孔互连后，通过镶嵌法形成改性SOG膜和上金属互连。

8. 发明授权

US06342440B1 Method for forming low-leakage impurity regions by sequence of high-and low-temperature treatments 有权
标题翻译：通过高温和低温处理顺序形成低泄漏杂质区的方法
公开(公告)号：US06342440B1
公开(公告)日：2002-01-29
申请号：US09518246
申请日：2000-03-03
申请人： Kazuhiro Sasada , Yasunori Inoue , Shinichi Tanimoto , Atsuhiro Nishida , Yoshikazu Ibara
发明人： Kazuhiro Sasada , Yasunori Inoue , Shinichi Tanimoto , Atsuhiro Nishida , Yoshikazu Ibara
IPC分类号： H01L21425
CPC分类号： H01L29/6659 , H01L21/26513 , H01L21/324 , H01L21/8234 , H01L29/665
摘要： A method of manufacturing a semiconductor device capable of suppressing increase of a leakage current resulting from a high-temperature heat treatment is obtained. In this manufacturing method, an impurity region is formed by selectively ion-implanting an impurity into the main surface of a semiconductor substrate. The impurity region is activated by performing a high-temperature heat treatment. The semiconductor device is recovered from crystal defects resulting from the high-temperature heat treatment by performing a low-temperature heat treatment after performing the high-temperature heat treatment. According to this manufacturing method, the semiconductor device is recovered from the crystal defects resulting from the ion implantation by the high-temperature heat treatment, and recovered from the crystal defects resulting from the high-temperature heat treatment by the low-temperature heat treatment. Thus, increase of a leakage current caused by the crystal defects resulting from the high-temperature heat treatment can be effectively prevented.
摘要翻译：获得能够抑制由高温热处理引起的漏电流增加的半导体装置的制造方法。在该制造方法中，通过选择性地将杂质离子注入到半导体衬底的主表面中来形成杂质区。通过进行高温热处理来激活杂质区域。通过在进行高温热处理后进行低温热处理，从高温热处理得到的晶体缺陷中回收半导体装置。根据该制造方法，通过高温热处理从离子注入产生的晶体缺陷中回收半导体器件，并且通过低温热处理从高温热处理引起的晶体缺陷中回收。因此，可以有效地防止由高温热处理引起的晶体缺陷引起的漏电流的增加。

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