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1. 发明授权

US5242539A Plasma treatment method and apparatus 失效
标题翻译：等离子体处理方法和装置
公开(公告)号：US5242539A
公开(公告)日：1993-09-07
申请号：US859336
申请日：1992-03-27
申请人： Takao Kumihashi , Kazunori Tsujimoto , Shinichi Tachi , Masafumi Kanetomo , Junichi Kobayashi , Tatehito Usui , Nobuyuki Mise
发明人： Takao Kumihashi , Kazunori Tsujimoto , Shinichi Tachi , Masafumi Kanetomo , Junichi Kobayashi , Tatehito Usui , Nobuyuki Mise
IPC分类号： H01L21/302 , H01J37/32 , H01L21/02 , H01L21/3065 , H01L21/311 , H01L21/3213
CPC分类号： H01L21/02071 , H01J37/32082 , H01J37/32192 , H01J37/3244 , H01J37/32449 , H01J37/32834 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/32136 , H01L21/32137 , H01J2237/3322 , H01J2237/3343
摘要： A plasma treatment method and apparatus utilize various gas inlet and outlet structure arrangements to optimize treatment characteristics for a semiconductor wafer. A buffer zone is created between gas inlets and the discharge zone of the vacuum treatment chamber to enhance uniformity of gas flow. The evacuation arrangement enables reactant gas to be exhausted uniformly to reduce gas residence time below a threshold while maintaining optimum flow rates and etch uniformity at low effective exhaust speeds.
摘要翻译：等离子体处理方法和装置利用各种气体入口和出口结构布置来优化半导体晶片的处理特性。在气体入口和真空处理室的排放区之间产生缓冲区，以增强气体流动的均匀性。排气装置使反应气体均匀排气，以将气体停留时间降低到阈值以下，同时在低有效排气速度下保持最佳流速和蚀刻均匀性。

2. 发明授权

US06759253B2 Process monitoring methods in a plasma processing apparatus, monitoring units, and a sample processing method using the monitoring units 失效
标题翻译：等离子体处理装置中的过程监视方法，监视单元以及使用监视单元的样本处理方法
公开(公告)号：US06759253B2
公开(公告)日：2004-07-06
申请号：US09788629
申请日：2001-02-16
申请人： Tatehito Usui , Tetsuo Ono , Ryoji Nishio , Kazue Takahashi , Nobuyuki Mise
发明人： Tatehito Usui , Tetsuo Ono , Ryoji Nishio , Kazue Takahashi , Nobuyuki Mise
IPC分类号： H01L21302
CPC分类号： H01L22/34 , C23C16/50 , C23C16/52 , G01N21/73 , H01J37/32935 , H01L21/67253 , H01L2924/0002 , H01L2924/00
摘要： The intensity of the light emitted from the light-emitting diode on wafer is measured and then the potential difference between the terminals of the light-emitting element, and the plasma current flowing thereinto are derived from measured light intensity. Since the use of a camera enables non-contact measurement of emitted light intensity, the lead-in terminals for lead wires that are always required in conventional probing methods become unnecessary. In addition, since the target wafer does not require lead wire connection, wafers can be changed in the same way as performed for etching.
摘要翻译：测量从晶片上的发光二极管发射的光的强度，然后从测量的光强度导出发光元件的端子与其中流动的等离子体电流之间的电位差。由于使用相机能够非接触地测量发射的光强度，所以在常规探测方法中始终需要的导线的引入端子变得不必要。此外，由于目标晶片不需要引线连接，因此可以以与蚀刻相同的方式来改变晶片。

3. 发明申请

US20060000800A1 Process monitoring methods in a plasma processing apparatus, monitoring units, and a sample processing method using the monitoring units 审中-公开
标题翻译：等离子体处理装置中的过程监视方法，监视单元以及使用监视单元的样本处理方法
公开(公告)号：US20060000800A1
公开(公告)日：2006-01-05
申请号：US11213770
申请日：2005-08-30
申请人： Tatehito Usui , Tetsuo Ono , Ryoji Nishio , Kazue Takahashi , Nobuyuki Mise
发明人： Tatehito Usui , Tetsuo Ono , Ryoji Nishio , Kazue Takahashi , Nobuyuki Mise
IPC分类号： G01L21/30 , C23F1/00
CPC分类号： H01L22/34 , C23C16/50 , C23C16/52 , G01N21/73 , H01J37/32935 , H01L21/67253 , H01L2924/0002 , H01L2924/00
摘要： A sample processing method for processing a sample by introducing a gas into a vacuum vessel and generating plasma in the vacuum vessel. The sample processing method includes the steps of measuring an intensity of light emitted from a light-emitting diode in the vacuum vessel, at the outside of the vacuum vessel, and monitoring a status of the plasma in accordance with the measured intensity of the light.
摘要翻译：一种用于通过将气体引入真空容器并在真空容器中产生等离子体来处理样品的样品处理方法。样品处理方法包括以下步骤：测量从真空容器中的发光二极管在真空容器的外部发射的光的强度，并根据所测量的光强度监测等离子体的状态。

4. 发明授权

US06656752B1 Ion current density measuring method and instrument, and semiconductor device manufacturing method 失效
标题翻译：离子电流密度测量方法和仪器，以及半导体器件制造方法
公开(公告)号：US06656752B1
公开(公告)日：2003-12-02
申请号：US09890611
申请日：2001-10-11
申请人： Nobuyuki Mise , Tatehito Usui , Masato Ikegawa , Kazuo Nojiri , Kazuyuki Tsunokuni , Tetsuo Ono
发明人： Nobuyuki Mise , Tatehito Usui , Masato Ikegawa , Kazuo Nojiri , Kazuyuki Tsunokuni , Tetsuo Ono
IPC分类号： H01L2166
CPC分类号： H01L22/34
摘要： A wafer is exposed to a plasma. Here, the wafer includes a semiconductor or a conductor 1 provided on an insulator 6, an insulator 2 formed thereon and having a region the thickness of which has been made locally thin, and a 2nd conductor 4 provided on the insulator 2, one of the semiconductor or the conductor 1 and the 2nd conductor 4 having a 1st region from the surface of which a substantially total solid angle is formed, the other having a 2nd region a solid angle formed from the surface of which is made smaller than the 1st region. Then, a voltage is applied to the semiconductor or the conductor 1 and the 2nd conductor 4 so as to measure a time elapsing until the insulator 2 undergoes a dielectric breakdown. Moreover, the ion current density is determined from an electric charge required therefor and an area exposed onto the surface of the 2nd conductor 4. Consequently, it becomes possible to measure, on the wafer, the current density of the ions launched into the wafer, thereby allowing the measuring method of the icon current density to be made suitable for the mass production.
摘要翻译：将晶片暴露于等离子体。这里，晶片包括设置在绝缘体6上的半导体或导体1，形成在其上的绝缘体2，其厚度局部变薄的区域和设置在绝缘体2上的第二导体4，半导体或导体1和第二导体4具有从其表面基本上具有总立体角的第一区域，另一个具有从其表面形成的立体角小于第一区域的第二区域。然后，向半导体或导体1和第二导体4施加电压，以测量直到绝缘体2经历介电击穿的时间。此外，离子电流密度由其所需的电荷和暴露于第二导体4的表面的面积确定。因此，可以在晶片上测量发射到晶片中的离子的电流密度，从而允许图标电流密度的测量方法适合于批量生产。

5. 发明授权

US06967109B2 Process monitoring methods in a plasma processing apparatus, monitoring units, and a sample processing method using the monitoring units 失效
标题翻译：等离子体处理装置中的过程监视方法，监视单元以及使用监视单元的样本处理方法
公开(公告)号：US06967109B2
公开(公告)日：2005-11-22
申请号：US10880501
申请日：2004-07-01
申请人： Tatehito Usui , Tetsuo Ono , Ryoji Nishio , Kazue Takahashi , Nobuyuki Mise
发明人： Tatehito Usui , Tetsuo Ono , Ryoji Nishio , Kazue Takahashi , Nobuyuki Mise
IPC分类号： H01L21/66 , C23C16/50 , C23C16/52 , H01J37/32 , H01L23/544 , H01L21/302
CPC分类号： H01L22/34 , C23C16/50 , C23C16/52 , G01N21/73 , H01J37/32935 , H01L21/67253 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus for measuring a potential difference for plasma processing with a plasma processing apparatus that processes a sample by introducing a gas into a vacuum chamber and generates plasma. A light-emitting portion is formed on a measurement-use sample of the sample to be processed and a current flows into the light-emitting portion according to a potential difference that has been generated across the light-emitting portion. An intensity of light emitted from the light-emitting portion according to a predetermined light intensity is measured and a potential difference on the measurement-use sample according to a predetermined light intensity is measured.
摘要翻译：一种用等离子体处理装置测量等离子体处理的电位差的方法和装置，其通过将气体引入真空室并产生等离子体来处理样品。在待处理样品的测量用样品上形成发光部分，并且电流根据在发光部分两端产生的电位差而流入发光部分。测量根据预定光强度从发光部分发射的光的强度，并且测量根据预定光强度的测量用样品上的电位差。

6. 发明授权

US06835665B2 Etching method of hardly-etched material and semiconductor fabricating method and apparatus using the method 失效
标题翻译：蚀刻材料的蚀刻方法和使用该方法的半导体制造方法和装置
公开(公告)号：US06835665B2
公开(公告)日：2004-12-28
申请号：US10090761
申请日：2002-03-06
申请人： Nobuyuki Mise , Ken Yoshioka , Ryoji Nishio , Tatehito Usui
发明人： Nobuyuki Mise , Ken Yoshioka , Ryoji Nishio , Tatehito Usui
IPC分类号： H01L21302
CPC分类号： H01L21/31144 , C23F4/00 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L21/32139 , H01L28/65 , H01L43/12
摘要： A film of hardly-etched material formed on a substrate is etched using a mask formed on the film of hardly-etched material and a plasma, wherein the film of hardly-etched material is etched using the mask formed with a side wall angled at 90 degrees or less with respect to the surface of the substrate, thereby forming the etched film with a taper angle to the surface of the substrate equal to or larger than the taper angle of the mask.
摘要翻译：使用形成在难蚀刻材料和等离子体的膜上的掩模蚀刻在基板上形成的几乎蚀刻的材料的膜，其中使用形成有角度为90°的侧壁的掩模蚀刻难蚀刻材料的膜度以下，由此形成与基板的表面成锥角的蚀刻膜等于或大于掩模的锥角。

7. 发明授权

US08404603B2 Method of manufacturing semiconductor device and substrate processing system 有权
标题翻译：制造半导体器件和衬底处理系统的方法
公开(公告)号：US08404603B2
公开(公告)日：2013-03-26
申请号：US12825012
申请日：2010-06-28
申请人： Arito Ogawa , Sadayoshi Horii , Taketoshi Sato , Hideharu Itatani , Nobuyuki Mise , Osamu Tonomura
发明人： Arito Ogawa , Sadayoshi Horii , Taketoshi Sato , Hideharu Itatani , Nobuyuki Mise , Osamu Tonomura
IPC分类号： H01L21/31
CPC分类号： H01L21/31616 , C23C16/303 , C23C16/403 , C23C16/45525 , C23C16/54 , C23C16/56 , H01L21/02178 , H01L21/02181 , H01L21/02194 , H01L21/0228 , H01L21/3141 , H01L21/31604 , H01L21/318 , H01L21/6719 , H01L21/67207 , H01L21/68785 , H01L28/40
摘要： A method of manufacturing a semiconductor device. In the method, an aluminum-containing insulation film is formed on an electrode film of a substrate by alternately repeating a process of supplying an aluminum precursor into a processing chamber in which the substrate is accommodated and exhausting the aluminum precursor from the processing chamber and a process of supplying an oxidizing or nitriding precursor into the processing chamber and exhausting the oxidizing or nitriding precursor from the processing chamber; and a high permittivity insulation film different from the aluminum-containing insulation film is formed on the aluminum-containing insulation film by alternately repeating a process of supplying a precursor into the processing chamber and exhausting the precursor from the processing chamber and a process of supplying an oxidizing precursor into the processing chamber and exhausting the oxidizing precursor from the processing chamber. In addition, heat treatment is performed on the substrate.
摘要翻译：一种制造半导体器件的方法。在该方法中，通过交替地重复将铝前体供给到容纳基板的处理室中并从处理室排出铝前体的工序，在基板的电极膜上形成含铝绝缘膜，将氧化或氮化前体供应到处理室中并从处理室排出氧化或氮化前体的过程; 并且在含铝绝缘膜上形成与含铝绝缘膜不同的高介电常数绝缘膜，通过交替重复将前体供给到处理室中并从处理室排出前体的过程，氧化前体进入处理室并从处理室排出氧化前体。另外，对基板进行热处理。

8. 发明授权

US07671426B2 Metal insulator semiconductor transistor using a gate insulator including a high dielectric constant film 有权
标题翻译：金属绝缘体半导体晶体管，使用包括高介电常数膜的栅极绝缘体
公开(公告)号：US07671426B2
公开(公告)日：2010-03-02
申请号：US12320988
申请日：2009-02-10
申请人： Nobuyuki Mise , Akira Toriumi
发明人： Nobuyuki Mise , Akira Toriumi
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L29/785 , H01L21/28194 , H01L21/28202 , H01L29/495 , H01L29/4975 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66795 , H01L29/7833
摘要： In a MIS transistor of which gate length is 10 nm or less, a gate insulator comprising a silicon oxide film formed on a silicon substrate and a high-k film formed on the silicon oxide film has a nitrided region including more nitrogen at the lateral side than at the central side in the gate-length direction, and including more nitrogen at the upper side than at the lower side in the film thickness direction. The reliability and characteristics of a MIS transistor using a gate insulator including a high-k (high dielectric constant) film is enhanced.
摘要翻译：在栅极长度为10nm以下的MIS晶体管中，包含形成在硅衬底上的氧化硅膜和在氧化硅膜上形成的高k膜的栅极绝缘体具有在侧面包含更多的氮的氮化区域比在栅极长度方向的中央侧，并且在膜厚方向上在上侧包括比在下侧更多的氮。使用包括高k（高介电常数）膜的栅极绝缘体的MIS晶体管的可靠性和特性得到增强。

9. 发明申请

US20080083956A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20080083956A1
公开(公告)日：2008-04-10
申请号：US11702104
申请日：2007-02-05
申请人： Nobuyuki Mise , Akira Toriumi
发明人： Nobuyuki Mise , Akira Toriumi
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L29/785 , H01L21/28194 , H01L21/28202 , H01L29/495 , H01L29/4975 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66795 , H01L29/7833
摘要： In a MIS transistor of which gate length is 10 nm or less, a gate insulator comprising a silicon oxide film formed on a silicon substrate and a high-k film formed on the silicon oxide film has a nitrided region including more nitrogen at the lateral side than at the central side in the gate-length direction, and including more nitrogen at the upper side than at the lower side in the film thickness direction. The reliability and characteristics of a MIS transistor using a gate insulator including a high-k (high dielectric constant) film is enhanced.
摘要翻译：在栅极长度为10nm以下的MIS晶体管中，包含形成在硅衬底上的氧化硅膜和在氧化硅膜上形成的高k膜的栅极绝缘体具有在侧面包含更多的氮的氮化区域比在栅极长度方向的中央侧，并且在膜厚方向上在上侧包括比在下侧更多的氮。使用包括高k（高介电常数）膜的栅极绝缘体的MIS晶体管的可靠性和特性得到增强。

10. 发明授权

US08288221B2 Method of manufacturing semiconductor device and semiconductor device 失效
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US08288221B2
公开(公告)日：2012-10-16
申请号：US12537875
申请日：2009-08-07
申请人： Takahisa Eimori , Nobuyuki Mise
发明人： Takahisa Eimori , Nobuyuki Mise
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/02164 , H01L21/02178 , H01L21/02181 , H01L21/02194 , H01L21/022 , H01L21/02321 , H01L21/31612 , H01L21/31645 , H01L21/823842 , H01L27/11 , H01L27/1104
摘要： A base insulating film containing hafnium and oxygen is formed on a silicon oxide (SiO2) film formed on a main surface of a substrate. Subsequently, a metal thin film thinner than the base insulating film and made of only a metal element is formed on the base insulating film, and a protective film having humidity resistance and oxidation resistance is formed on the metal thin film. Then, by diffusing the entire metal element of the metal thin film into the base insulating film in a state of having the protective film, a mixed film (high dielectric constant film) thicker than the silicon oxide film and having a higher dielectric constant than silicon oxide and containing hafnium and oxygen of the base insulating film and the metal element of the metal thin film is formed on the silicon oxide film.
摘要翻译：在形成在基板的主表面上的氧化硅（SiO 2）膜上形成含有铪和氧的基极绝缘膜。随后，在基底绝缘膜上形成比基底绝缘膜薄且仅由金属元件制成的金属薄膜，并且在金属薄膜上形成具有耐湿性和抗氧化性的保护膜。然后，通过在具有保护膜的状态下将金属薄膜的整个金属元素扩散到基底绝缘膜中，比硅氧化膜厚且具有比硅更高的介电常数的混合膜（高介电常数膜）在氧化硅膜上形成氧化物并含有基底绝缘膜的铪和氧和金属薄膜的金属元素。

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