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1. 发明申请

US20050206018A1 Oxide film forming method 审中-公开
标题翻译：氧化膜成型方法
公开(公告)号：US20050206018A1
公开(公告)日：2005-09-22
申请号：US11129710
申请日：2005-05-13
申请人： Tadahiro Ohmi , Takashi Imaoka , Hisayuki Shimada , Nobuhiro Konishi , Mizuho Morita , Takeo Yamashita , Tadashi Shibata , Hidetoshi Wakamatsu , Jinzo Watanabe , Shintaro Aoyama , Masakazu Nakamura
发明人： Tadahiro Ohmi , Takashi Imaoka , Hisayuki Shimada , Nobuhiro Konishi , Mizuho Morita , Takeo Yamashita , Tadashi Shibata , Hidetoshi Wakamatsu , Jinzo Watanabe , Shintaro Aoyama , Masakazu Nakamura
IPC分类号： B01J19/08 , C23C8/10 , C23C8/36 , C23C14/02 , C23C14/48 , C23C16/02 , C23C16/44 , C30B23/02 , C30B25/02 , G01N23/00 , H01L21/66
CPC分类号： C30B23/02 , C23C8/10 , C23C8/36 , C23C14/022 , C23C14/48 , C23C16/02 , C23C16/4401 , C30B25/02 , C30B29/16 , Y10S438/903
摘要： Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are moveable among them and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.
摘要翻译：真空处理设备能够防止颗粒粘附在真空容器中被处理物体。真空设备包括一系列由门隔开的真空容器，容器中的压力分别可减少。容器被配置成使待处理的物体在它们之间是可移动的，并且设置有用于将超光线投射到至少导入到容器中的气体的光投射装置。

2. 发明授权

US06949478B2 Oxide film forming method 失效
标题翻译：氧化膜成型方法
公开(公告)号：US06949478B2
公开(公告)日：2005-09-27
申请号：US10120628
申请日：2002-04-11
申请人： Tadahiro Ohmi , Takashi Imaoka , Hisayuki Shimada , Nobuhiro Konishi , Mizuho Morita , Takeo Yamashita , Tadashi Shibata , Hidetoshi Wakamatsu , Jinzo Watanabe , Shintaro Aoyama , Masakazu Nakamura
发明人： Tadahiro Ohmi , Takashi Imaoka , Hisayuki Shimada , Nobuhiro Konishi , Mizuho Morita , Takeo Yamashita , Tadashi Shibata , Hidetoshi Wakamatsu , Jinzo Watanabe , Shintaro Aoyama , Masakazu Nakamura
IPC分类号： B01J19/08 , C23C8/10 , C23C8/36 , C23C14/02 , C23C14/48 , C23C16/02 , C23C16/44 , C30B23/02 , C30B25/02 , G01N23/00 , H01L21/66 , H01L21/31
CPC分类号： C30B23/02 , C23C8/10 , C23C8/36 , C23C14/022 , C23C14/48 , C23C16/02 , C23C16/4401 , C30B25/02 , C30B29/16 , Y10S438/903
摘要： A method of forming an oxide film having high insularity capability is performed within an ultra clean environment, using charged particles.
摘要翻译：使用带电粒子在超清洁环境下进行形成具有高绝缘性的氧化膜的方法。

3. 发明授权

US6146135A Oxide film forming method 失效
公开(公告)号：US6146135A
公开(公告)日：2000-11-14
申请号：US680519
申请日：1996-07-09
申请人： Jinzo Watanabe , Takeo Yamashita , Masakazu Nakamura , Shintaro Aoyama , Hidetoshi Wakamatsu , Tadashi Shibata , Tadahiro Ohmi , Nobuhiro Konishi , Mizuho Morita , Hisayuki Shimada , Takashi Imaoka
发明人： Jinzo Watanabe , Takeo Yamashita , Masakazu Nakamura , Shintaro Aoyama , Hidetoshi Wakamatsu , Tadashi Shibata , Tadahiro Ohmi , Nobuhiro Konishi , Mizuho Morita , Hisayuki Shimada , Takashi Imaoka
IPC分类号： B01J19/08 , C23C8/10 , C23C8/36 , C23C14/02 , C23C14/48 , C23C16/02 , C23C16/44 , C30B23/02 , C30B25/02 , G01N23/00 , H01L21/66 , F26B21/00 , F26B3/00 , F26B19/00
CPC分类号： C30B23/02 , C23C14/022 , C23C14/48 , C23C16/02 , C23C16/4401 , C23C8/10 , C23C8/36 , C30B25/02 , C30B29/16 , Y10S438/903
摘要： Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are movable among them, and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.

4. 发明授权

US5973535A Semiconductor circuit using feedback to latch multilevel data 失效
标题翻译：半导体电路使用反馈来锁存多电平数据
公开(公告)号：US5973535A
公开(公告)日：1999-10-26
申请号：US666506
申请日：1996-10-15
申请人： Tadashi Shibata , Tadahiro Ohmi , Takeo Yamashita
发明人： Tadashi Shibata , Tadahiro Ohmi , Takeo Yamashita
IPC分类号： G06F3/05 , G06F15/18 , G06G7/60 , G06N3/06 , G06N3/063 , G11C27/00 , H01L21/8234 , H01L27/088 , H03K3/3568 , H03K19/20 , H03M1/12 , H03M1/36 , H03M1/80 , H03K5/08
CPC分类号： G06N3/0635 , G11C27/005 , H03K3/3568 , H03M1/36 , H03M1/802
摘要： A simple semiconductor circuit by which analog data or multilevel data can be fetched and stored. The circuit receives a first signal and converts the first signal into a second signal composed of multilevel. The second signal is fed back to the circuit. The circuit is constituted of a first circuit which converts the first signal into a signal group composed of multiple quantized signals and second circuit which converts the signal group into the second signal. In addition, the first or/and second circuits are constituted of one or more neuron MOS transistors.
摘要翻译： PCT No.PCT / JP94 / 02258 Sec。 371日期：1996年6月28日 102（e）日期1996年6月28日PCT 1994年12月27日PCT PCT。 WO95 / 18488 PCT公开日期1995年7月6日简单的半导体电路可以获取和存储模拟数据或多级数据。电路接收第一信号并将第一信号转换成由多电平组成的第二信号。第二个信号被反馈回电路。电路由将第一信号转换为由多个量化信号组成的信号组的第一电路和将信号组转换为第二信号的第二电路构成。此外，第一或/和第二电路由一个或多个神经元MOS晶体管构成。

5. 发明授权

US5822497A Data sorting circuit 失效
标题翻译：数据分类电路
公开(公告)号：US5822497A
公开(公告)日：1998-10-13
申请号：US507467
申请日：1995-09-29
申请人： Tadahiro Ohmi , Tadashi Shibata , Takeo Yamashita
发明人： Tadahiro Ohmi , Tadashi Shibata , Takeo Yamashita
IPC分类号： G06F7/02 , G06F7/24 , G06G7/60 , G06N3/063 , G11C15/04 , H01L27/10 , H03K19/00 , H03K19/0948 , G06F15/18
CPC分类号： G06F7/24 , G06N3/0635
摘要： A device comprising invertor circuit group including two or more invertor circuits formed by neuron MOS transistors; means for applying a first signal voltage common to the two or more invertors of the invertor circuit group to a first input gate of the invertor circuit; means for applying a given second signal to one or more second input gates other than the first input gate of the invertor circuits; a delay circuit for transmitting the variation of the output voltage of at least one of the invertor circuits of the invertor circuit group with a time delay generated by used of the variation with time of the signal voltage of either or both of the first and second signal voltages; a transistor whose ON and OFF is controlled by the signal transmitted from the delay circuit; storage circuits taking in signals by the ON and OFF of the transistor; and means for executing a given logical operation with respect to the output voltage signals generated by the invertor circuit group. The device has a function of storing the result of the logical operation in the storage circuit.
摘要翻译： PCT No.PCT / JP94 / 00262 Sec。 371 1995年9月29日第 102（e）1995年9月29日PCT PCT 1994年2月22日PCT公布。公开号WO94 / 19760 日期1994年9月1日包括由神经元MOS晶体管形成的包括两个或更多个反相器电路的逆变器电路组的器件; 用于将所述逆变器电路组的两个或更多个反相器公共的第一信号电压施加到所述逆变器电路的第一输入门的装置; 用于将给定的第二信号施加到除了逆变器电路的第一输入门之外的一个或多个第二输入门的装置; 延迟电路，用于通过使用随着第一和第二信号中的任一个或第二信号的信号电压的时间的变化而产生的时间延迟来发送反相器电路组的至少一个反相器电路的输出电压的变化电压; 晶体管的ON和OFF由从延迟电路发送的信号控制; 存储电路通过晶体管的导通和截止来接收信号; 以及用于对由逆变器电路组产生的输出电压信号执行给定逻辑运算的装置。该装置具有将逻辑运算的结果存储在存储电路中的功能。

6. 发明授权

US5818081A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5818081A
公开(公告)日：1998-10-06
申请号：US656288
申请日：1996-07-01
申请人： Tadahiro Ohmi , Tadashi Shibata , Hideo Kosaka , Takeo Yamashita
发明人： Tadahiro Ohmi , Tadashi Shibata , Hideo Kosaka , Takeo Yamashita
IPC分类号： G06G7/60 , G06N3/063 , G11C27/00 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792 , H01L29/76
CPC分类号： G11C27/005 , G06N3/063 , G06N3/0635 , H01L29/42324 , H01L29/7881
摘要： Synapse can be formed from a smaller number of elements in a low-power semiconductor device, which realize a highly integrated neural network. Precise modifications of synapse weighting become possible and a neuron computer chip of a practical level can be accomplished. The semiconductor device includes a first electrode for charge injection, connected to a floating gate through a first insulating film; a second electrode for applying programming pulses, connected to the floating gate through a second insulating film, and a MOS transistor using the floating gate as its gate electrode, wherein the charge supplied from the source electrode of the MOS transistor sets the potential at the first electrode to a predetermined value determined by the potential of the floating gate, and charges are transferred between the floating gate and the first electrode through the first insulating film by applying a predetermined pulsating voltage to the second electrode.
摘要翻译： PCT No.PCT / JP94 / 02000 Sec。 371日期：1996年7月1日 102（e）日期1996年7月1日PCT 1994年11月29日PCT PCT。公开号WO95 / 15580 日期1995年6月8日可以在低功率半导体器件中由较少数量的元件形成，这实现了高度集成的神经网络。突触加权的精确修改成为可能，并且可以实现具有实用水平的神经元计算机芯片。半导体器件包括用于电荷注入的第一电极，通过第一绝缘膜连接到浮置栅极; 用于施加通过第二绝缘膜连接到浮置栅极的编程脉冲的第二电极和使用浮置栅极作为其栅电极的MOS晶体管，其中从MOS晶体管的源极提供的电荷将第一电极到由浮置栅极的电位确定的预定值，并且通过对第二电极施加预定的脉动电压，电荷通过第一绝缘膜在浮置栅极和第一电极之间传递。

7. 发明授权

US5784018A Semiconductor circuit 失效
标题翻译：半导体电路
公开(公告)号：US5784018A
公开(公告)日：1998-07-21
申请号：US702689
申请日：1996-08-12
申请人： Tadahiro Ohmi , Takeo Yamashita , Tadashi Shibata
发明人： Tadahiro Ohmi , Takeo Yamashita , Tadashi Shibata
IPC分类号： G11C11/56 , G11C27/00 , H03M1/12
CPC分类号： G11C27/005 , G11C11/5621 , G11C11/54 , G11C2211/5611 , G11C7/16
摘要： The invention provides a semiconductor circuit which can fetch and store analog and multilevel data by using a simple circuit. The invention also provides a multilevel memory which can freely change the number of quantizing levels by using external signals. This semiconductor circuit comprises a first circuit which converts first signals into a group of quantized signals, a second circuit which converts the signal group into second multilevel signals, and structure which feeds back the second signals to the first circuit as first signals. The semiconductor circuit further has a structure to electrically separates at least one signal included in the signal group from the input of the second circuit, and structure which feeds back the second signals to the input of the second circuit instead of the signal previously separated.
摘要翻译： PCT No.PCT / JP95 / 00204 Sec。 371日期：1996年8月12日 102（e）日期1996年8月12日PCT提交1995年2月14日PCT公布。 WO95 / 22146 PCT公开号日期：1995年8月17日本发明提供一种半导体电路，其可以通过使用简单的电路来获取和存储模拟和多电平数据。本发明还提供一种可以通过使用外部信号自由地改变量化电平数量的多电平存储器。该半导体电路包括将第一信号转换成一组量化信号的第一电路，将信号组转换成第二多电平信号的第二电路，以及将第二信号作为第一信号反馈到第一电路的结构。半导体电路还具有将包括在信号组中的至少一个信号与第二电路的输入电隔离的结构，以及将第二信号反馈到第二电路的输入而不是先前分离的信号的结构。

8. 发明授权

US6051851A Semiconductor devices utilizing silicide reaction 失效
标题翻译：利用硅化物反应的半导体器件
公开(公告)号：US6051851A
公开(公告)日：2000-04-18
申请号：US917675
申请日：1997-08-26
申请人： Tadahiro Ohmi , Mamoru Miyawaki , Yoshio Nakamura , Hiroshi Suzuki , Takeo Yamashita
发明人： Tadahiro Ohmi , Mamoru Miyawaki , Yoshio Nakamura , Hiroshi Suzuki , Takeo Yamashita
IPC分类号： H01L21/82 , G11C17/16 , H01L23/525 , H01L27/10 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L27/112 , G11C17/16 , H01L23/5252 , H01L27/11206 , H01L2924/0002 , H01L2924/3011
摘要： Cheap semiconductor memory devices are provided so as to enable high-speed writing and reading but rarely to malfunction, thus being high in reliability. In a semiconductor device which comprises a plurality of cells each having a semiconductor layer between a pair of conductors, at least one of the pair of conductors is made of a metal, and the semiconductor layer comprises an amorphous silicon that can form a silicide region with the metal as reacting at a reaction rate of not less than 10 m/sec. Another device is characterized in that the semiconductor layer is an amorphous silicon, in that at least one of the pair of conductors is made of a metal silicide-reacting with the amorphous silicon, and in that the silicide region formed is conic. Another device is characterized in that the semiconductor layer is an amorphous silicon, in that at least one of the pair of conductors is formed of a metal silicide-reacting with the amorphous silicon, and in that a film-formed surface is produced without being exposed to an oxide atmosphere, between a step of forming the amorphus silicon and a step of forming the metal.
摘要翻译：提供廉价的半导体存储器件，以便能够进行高速写入和读取，但很少发生故障，因此可靠性高。在包括多个单元的半导体器件中，每个单元各自在一对导体之间具有半导体层，所述一对导体中的至少一个导体由金属制成，并且所述半导体层包括可形成硅化物区域的非晶硅，金属以不小于10m /秒的反应速率反应。另一种器件的特征在于，半导体层是非晶硅，其中该对导体中的至少一个导体由与非晶硅反应的金属硅化物制成，并且形成的硅化物区域是圆锥形。另一种器件的特征在于，半导体层是非晶硅，其中该对导体中的至少一个导体由与非晶硅反应的金属硅化物形成，并且由此形成膜形成表面而不暴露在氧化物气氛之间，形成无定形硅的步骤和形成金属的步骤。

9. 发明授权

US07245019B2 Semiconductor device with improved wiring arrangement utilizing a projecting portion and a method of manufacturing the same 有权
标题翻译：具有利用突出部分的改进的布线布置的半导体器件及其制造方法
公开(公告)号：US07245019B2
公开(公告)日：2007-07-17
申请号：US10647373
申请日：2003-08-26
申请人： Tomoo Murata , Shinobu Yabuki , Takeo Yamashita
发明人： Tomoo Murata , Shinobu Yabuki , Takeo Yamashita
IPC分类号： H01L23/52
CPC分类号： H01L27/118 , H01L23/528 , H01L2924/0002 , H01L2924/00
摘要： In a method of manufacturing a semiconductor device having a first wiring extending in a first direction and a second wiring connected to the first wiring through a connection and extending in a second direction orthogonal to the first direction, the second wiring having a surplus portion projecting from the connection in a direction opposite to the second direction, the first and second wirings are arranged such that a center of the connection is offset in the second direction from a center of the first wiring, and a projecting portion of the first wiring is disposed under the connection.
摘要翻译：在制造具有沿第一方向延伸的第一布线的半导体器件的方法和通过连接与第一布线连接并沿与第一方向正交的第二方向延伸的第二布线的方法中，第二布线具有从在与第二方向相反的方向上的连接中，第一和第二布线布置成使得连接的中心在距第一布线的中心的第二方向偏移，并且第一布线的突出部分设置在连接。

10. 发明授权

US06870697B2 Overshoot current phase/amplitude control for hard disk drive write current 失效
标题翻译：过冲电流相位/幅度控制硬盘驱动器写入电流
公开(公告)号：US06870697B2
公开(公告)日：2005-03-22
申请号：US10457473
申请日：2003-06-10
申请人： Hiroshi Ikekame , Takeo Yamashita
发明人： Hiroshi Ikekame , Takeo Yamashita
IPC分类号： G11B5/09 , G11B5/00 , G11B5/012 , G11B5/02 , G11B20/10
CPC分类号： G11B5/012 , G11B5/02 , G11B20/10009 , G11B2005/0013
摘要： Devices and methods for generating a magnetic head-specific overshoot current which is combined with an alternating current waveform into a write current used by the magnetic head to store information on a magnetic medium. A processor analyzes the frequency of incoming write data and retrieves from a data table of an overshoot current amplitude and an overshoot current phase. This amplitude and phase information is sent to an overshoot current generator to generate an overshoot current that is responsive to the dynamic impedance properties of a magnetic write head during operation. The data table may have information related to one or many write heads, and the data table may be further subdivided based on additional dynamic characteristics of a write head that may affect the impedance thereof.
摘要翻译：用于产生磁头特定过冲电流的装置和方法，其将交流电波组合成由磁头用于在磁介质上存储信息的写入电流。处理器分析输入写入数据的频率，并从数据表中检索过冲电流幅度和过冲电流相位。该幅度和相位信息被发送到过冲电流发生器以产生响应于操作期间磁写头的动态阻抗特性的过冲电流。数据表可以具有与一个或多个写入头相关的信息，并且可以基于可能影响其阻抗的写入头的附加动态特性来进一步细分数据表。

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