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    • 1. 发明授权
    • Semiconductor device
    • 半导体器件
    • US5818081A
    • 1998-10-06
    • US656288
    • 1996-07-01
    • Tadahiro OhmiTadashi ShibataHideo KosakaTakeo Yamashita
    • Tadahiro OhmiTadashi ShibataHideo KosakaTakeo Yamashita
    • G06G7/60G06N3/063G11C27/00H01L21/8247H01L27/10H01L27/115H01L29/423H01L29/788H01L29/792H01L29/76
    • G11C27/005G06N3/063G06N3/0635H01L29/42324H01L29/7881
    • Synapse can be formed from a smaller number of elements in a low-power semiconductor device, which realize a highly integrated neural network. Precise modifications of synapse weighting become possible and a neuron computer chip of a practical level can be accomplished. The semiconductor device includes a first electrode for charge injection, connected to a floating gate through a first insulating film; a second electrode for applying programming pulses, connected to the floating gate through a second insulating film, and a MOS transistor using the floating gate as its gate electrode, wherein the charge supplied from the source electrode of the MOS transistor sets the potential at the first electrode to a predetermined value determined by the potential of the floating gate, and charges are transferred between the floating gate and the first electrode through the first insulating film by applying a predetermined pulsating voltage to the second electrode.
    • PCT No.PCT / JP94 / 02000 Sec。 371日期:1996年7月1日 102(e)日期1996年7月1日PCT 1994年11月29日PCT PCT。 公开号WO95 / 15580 日期1995年6月8日可以在低功率半导体器件中由较少数量的元件形成,这实现了高度集成的神经网络。 突触加权的精确修改成为可能,并且可以实现具有实用水平的神经元计算机芯片。 半导体器件包括用于电荷注入的第一电极,通过第一绝缘膜连接到浮置栅极; 用于施加通过第二绝缘膜连接到浮置栅极的编程脉冲的第二电极和使用浮置栅极作为其栅电极的MOS晶体管,其中从MOS晶体管的源极提供的电荷将第一 电极到由浮置栅极的电位确定的预定值,并且通过对第二电极施加预定的脉动电压,电荷通过第一绝缘膜在浮置栅极和第一电极之间传递。
    • 2. 发明授权
    • Memory system and programming method thereof
    • 存储器系统及其编程方法
    • US06426895B2
    • 2002-07-30
    • US09864406
    • 2001-05-25
    • Hideo KosakaAkihiko HashiguchiTakumi Okaue
    • Hideo KosakaAkihiko HashiguchiTakumi Okaue
    • G11C1604
    • G11C16/0466G11C16/10
    • A memory system and its programming method capable of reducing the programming time for each page, wherein the memory-cell array is constituted by a MONOS-type (MNOS-type) non-volatile memory or floating gate non-volatile memory in which a source-side channel, hot-electron injection that enables the memory to write therein data by each divided unit (for instance, each 64 bytes=512 bits) is carried out, instead of the write operation where writing is carried out collectively by each page unit (512 bytes). Further, there is provided an emulation circuit successively storing programming data that constitute the page of a plurality of divided units and a control circuit successively reading the held divided unit data so as to write to the non-volatile memory.
    • 一种能够减少每页的编程时间的存储器系统及其编程方法,其中存储单元阵列由MONOS型(MNOS型)非易失性存储器或浮动非易失性存储器构成,其中源 可以执行使得存储器能够通过每个分割单元(例如,每个64字节= 512位)在其中写入数据的热电子注入,而不是由每个页面单元集体执行写入的写入操作 (512字节)。 此外,提供了一种连续地存储构成多个分割单元的页面的编程数据的仿真电路和连续读取保持的分割单元数据以便写入非易失性存储器的控制电路。
    • 5. 发明授权
    • Vertical-to-surface transmission electrophotonic device
    • 垂直对表面透射电泳装置
    • US5293393A
    • 1994-03-08
    • US44372
    • 1993-04-06
    • Hideo Kosaka
    • Hideo Kosaka
    • H01L31/12H01S5/00H01S5/026H01S5/183H01S5/323H01S3/19
    • H01L33/105H01L31/125H01S5/0262H01S5/183H01S5/32308
    • A vertical-to-surface transmission electrophotonic device in a structure having a first distributed Bragg reflector of a first conductivity type, a first spacer layer of the first conductivity type, an active layer, a second spacer layer of a second conductivity type opposite to the first conductivity type, and a second distributed Bragg reflector of the second conductivity type, all of which are formed on a substrate to constitute a cavity in a direction perpendicular to a formation surface, characterized in that one layer of said first distributed Bragg reflector is locally thickened to constitute a double cavity, and that a light-emitting portion of a single-cavity structure and a light-receiving portion of a double-cavity structure are formed on said single substrate.
    • 具有第一导电类型的第一分布布拉格反射器,第一导电类型的第一间隔层,有源层,与第二导电类型相反的第二导电类型的第二间隔层的结构中的垂直对表面透射电泳装置 第一导电类型的第二分布布拉格反射器和第二导电类型的第二分布布拉格反射器,它们都形成在基板上,以在垂直于形成表面的方向上构成空腔,其特征在于,所述第一分布式布拉格反射器的一层是局部 增厚以构成双腔,并且在所述单个基板上形成单腔结构的发光部分和双腔结构的光接收部分。
    • 8. 发明申请
    • IC CHIP, INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING SYSTEM, AND PROGRAMS
    • IC芯片,信息处理设备,信息处理系统和程序
    • US20100064152A1
    • 2010-03-11
    • US12557196
    • 2009-09-10
    • Hideo Kosaka
    • Hideo Kosaka
    • G06F1/26
    • G06F1/3203Y02D10/126
    • There is provided an IC chip mountable on a CE device including a processing unit which is supplied with power from the CE device and performs processing necessary for the operation of the IC chip, an RF signal detection unit which detects radio frequency signals transmitted from a reader/writer via contactless communication and outputs detection signals indicating detection status of radio frequency signals to the CE device, and a power supply control unit which controls power supply to a logic unit or the like from the CE device according to control signals input from the CE device in response to at least the detection signals. As a result, the IC chip can appropriately control power supply from the information processing device such as the CE device according to the control signals input from the information processing device in response to the detection signals.
    • 提供了一种安装在CE设备上的IC芯片,包括一个处理单元,该处理单元由CE设备提供电源,并执行IC芯片操作所需的处理; RF信号检测单元,用于检测从读取器发送的射频信号 /写入器,并且输出表示对CE设备的射频信号的检测状态的检测信号;以及电源控制单元,其根据从CE输入的控制信号,从CE设备控制向逻辑单元等的电力供应 至少响应于检测信号。 结果,IC芯片可以根据从信息处理装置输入的响应于检测信号的控制信号适当地控制诸如CE设备的信息处理设备的电源。
    • 9. 发明授权
    • Self-waveguide optical circuit
    • 自波导光电路
    • US06317554B1
    • 2001-11-13
    • US09369243
    • 1999-08-05
    • Hideo KosakaShojiro Kawakami
    • Hideo KosakaShojiro Kawakami
    • G02B610
    • B82Y20/00G02B6/1225
    • Disclosed herein is a self-waveguide optical circuit for forming optical paths by propagating rays or electromagnetic waves comprising: photonic crystals having a dielectric constant periodic structure or a dielectric constant semi-periodic structure having a period substantially corresponding to a wavelength of propagation rays, and optical paths formed by establishing a crystal direction of the photonic crystal to level the dispersion surface of the photonic crystal for obtaining a bundle of parallel rays. In accordance with the present invention, elevation of characteristics such as miniaturization, high integration, high speed operation and transmission efficiency can be obtained because a bundle of parallel rays can be obtained without forming crooked parts having an excessive curvature radius.
    • 本文公开了一种用于通过传播光线或电磁波形成光路的自波导光路,包括:具有介电常数周期结构的光子晶体或具有基本对应于传播射线波长的周期的介电常数半周期结构,以及 通过建立光子晶体的晶体方向以平衡光子晶体的分散表面以获得一束平行光线而形成的光路。 根据本发明,可以获得小型化,高集成度,高速运行和传输效率等特性的提升,因为可以获得平行光束而不形成具有过大曲率半径的弯曲部分。
    • 10. 发明授权
    • Optical cross-coupling apparatus
    • 光交叉耦合装置
    • US5600748A
    • 1997-02-04
    • US592264
    • 1996-01-26
    • Hideo Kosaka
    • Hideo Kosaka
    • G02B6/40G02B6/38
    • G02B6/3885
    • An optical cross-coupling apparatus including a plurality of first connector groups in each of which a plurality of optical fibers are aligned in a one-dimensional array, a plurality of (corresponding in number to said first connector groups) second connector groups in each of which a plurality of optical fibers are aligned in a one-dimensional array, and a socket in which said first and second connector groups are aligned to oppose each other crosswise and mounted such that distal end faces of respective connectors of said two connector groups oppose and are in contact with each other on one plane.
    • 一种光学交叉耦合设备,包括多个第一连接器组,每个第一连接器组中的多个光纤以一维阵列对准,每个中的多个(对应于所述第一连接器组)中的每一个中的第二连接器组 其中多个光纤以一维阵列排列,以及插座,其中所述第一和第二连接器组彼此交叉对准,并安装成使得所述两个连接器组的相应连接器的远端面相对,并且 在一个平面上彼此接触。