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    • 2. 发明申请
    • NON-VOLATILE PASSIVE MATRIX AND METHOD FOR READOUT OF THE SAME
    • 非易失性被动矩阵及其读取方法
    • WO0225665A3
    • 2002-05-16
    • PCT/NO0100348
    • 2001-08-24
    • THIN FILM ELECTRONICS ASATHOMPSON MICHAELWOMACK RICHARDGUSTAFSSON GOERANCARLSSON JOHAN
    • THOMPSON MICHAELWOMACK RICHARDGUSTAFSSON GOERANCARLSSON JOHAN
    • G11C7/06G11C7/10G11C11/22H01L21/8246H01L27/105G11C8/12G11C8/14
    • G11C7/1006G11C7/06G11C11/22
    • In a non-volatile passive matrix memory device (10) comprising an electrically polarizable dielectric memory material (12) exhibiting hysteresis between first and second sets (14; 15) of addressing electrodes constituting word lines (WL) and bit lines (BL) of the memory device. A memory cell (13) is defined in the memory material (12) at the overlap between a word line (WL) and a bit line (BL). The word lines (WL) are divided into segments (S) each segment sharing and being defined by adjoining bit lines (BL). Means (25) are provided for connecting each bit lines (BL) of a segment (S) with a sensing means (26) enabling simultaneous connections of all memory cells (13) of a word line segment (15) for readout via the bit lines (BL). Each sensing means (26) senses the charge flow in a bit line (BL) in order to determine a stored logicalvalue. In a readout method,a word line (WL) of a segment (S) is activated by setting its potential to a switching voltage Vs of the memory cell (13) during at least a portion of a read cycle, while keeping the bit lines (BL) of a segment (S) at zero potential, during which read cycle a logical value stored in the individual memory cells (13) is sensed by the sensing means (26).
    • 在非易失性无源矩阵存储器件(10)中,包括电可极化介质存储器材料(12),其在构成字线(WL)的寻址电极和位线(BL)的第一组和第二组(14; 15)之间呈现迟滞, 存储设备。 存储单元(13)在字线(WL)和位线(BL)之间的重叠处被限定在存储器材料(12)中。 字线(WL)被划分成段(S),每个段共享并由相邻的位线(BL)定义。 提供装置(25)用于将段(S)的每个位线(BL)与感测装置(26)连接,使得能够同时连接字线段(15)的所有存储单元(13),以经由位读出 线(BL)。 每个感测装置(26)感测位线(BL)中的电荷流,以便确定存储的逻辑值。 在读出方法中,通过在读周期的至少一部分期间将其电位设置为存储单元(13)的开关电压Vs来激活段(S)的字线(WL),同时保持位线 (S)的零电位(BL),在该期间,存储在各个存储单元(13)中的逻辑值由读取周期由感测装置(26)感测。
    • 7. 发明专利
    • AT354851T
    • 2007-03-15
    • AT03760179
    • 2003-06-16
    • THIN FILM ELECTRONICS ASA
    • LJUNGCRANTZ HENRIKEDVARDSSON NICLASCARLSSON JOHANGUSTAFSSON GOERAN
    • G11C5/00H01L21/3205H01L27/115G11C11/22C23C14/24H01L21/285
    • In a method for making ferroelectric memory cells in a ferroelectric memory device a first electrode comprising at least one metal layer and optionally at least one metal oxide layer is formed on a silicon substrate which has an optional insulating layer of silicon dioxide. A ferroelectric layer consisting of a thin film of ferroelectric polymer is formed on the top of the first electrode layer and at least a second electrode comprising at least one metal layer and at least one metal oxide layer is formed on the ferroelectric layer. The second electrode is deposited by thermal evaporation of a high-purity evaporation source from an effusion cell onto the ferroelectric layer in a vacuum chamber filled with a gas or a gas mixture. A ferroelectric memory device wherein the memory cell has been made with the above method, comprises at least a first and a second set of respectively parallel electrodes, wherein the electrodes in a set are provided orthogonally to the electrodes of a nearest following set and with memory cells formed in a ferroelectric layer provided between successive electrode sets, such that memory cells are defined in the crossings between the electrodes which contact the ferroelectric layer on each side thereof.