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1. 发明专利

JP2006253699A Data storage/computing device, and method of manufacturing the same 审中-公开
标题翻译：数据存储/计算装置及其制造方法
公开(公告)号：JP2006253699A
公开(公告)日：2006-09-21
申请号：JP2006089948
申请日：2006-03-29
申请人： Thin Film Electronics Asa , シンフイルムエレクトロニクスエイエスエイ
发明人： GUDESEN HANS GUDE , NORDAL PER-ERIK , LEISTAD GEIRR I , CARLSSON JOHAN , GUSTAFSSON GORAN
IPC分类号： G06F1/16 , H01L27/00 , G11C16/02 , G11C17/00 , H01L21/768 , H01L21/822 , H01L21/98 , H01L25/065 , H01L25/07 , H01L25/18 , H01L27/10 , H01L51/40
CPC分类号： H01L51/0001 , G11C5/02 , G11C17/06 , H01L21/2026 , H01L21/768 , H01L21/76888 , H01L21/76894 , H01L21/8221 , H01L27/0688 , H01L27/1021 , H01L27/105 , H01L27/1052 , H01L27/108 , H01L27/11 , H01L27/11502 , H01L51/0024 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a data storage/computing device which is equiped with an ROM and/or WORM and/or REWRITABLE memory module, and/or a computing module on a substrate, and an organic material adaptable to a low-temperature and/or an inorganic film processed at a low temperature. SOLUTION: A memory and/or a computing module is provided on a substrate by sequentially depositing a layer. The deposition and processing of the layer is carried out under thermal condition in which one or a plurality of layers deposited and processed underneath, particularly an organic material, is not subjected to a static temperature or a dynamic temperature excessively exceeding limitation for stability. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种数据存储/计算设备，其配备有ROM和/或WORM和/或可再利用存储器模块，和/或基板上的计算模块，以及适用于低温和/或在低温下处理的无机膜。解决方案：通过顺序地沉积层，在衬底上提供存储器和/或计算模块。该层的沉积和处理在其下沉积和加工的一个或多个层，特别是有机材料的热条件下不进行过度超过对稳定性的限制的静态温度或动态温度。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2012178566A Method of fabricating ferroelectric memory device 审中-公开
标题翻译：制造电磁存储器件的方法
公开(公告)号：JP2012178566A
公开(公告)日：2012-09-13
申请号：JP2012054625
申请日：2012-03-12
申请人： Thin Film Electronics Asa , シンフイルムエレクトロニクスエイエスエイ
发明人： PETER DYREKLEV , LEISTAD GEIRR I , GUSTAFSSON GOERAN
IPC分类号： H01L27/105 , B41M1/30 , G11C20060101 , G11C11/22 , H01L21/8246 , H01L27/28 , H01L51/05 , H05K3/12
CPC分类号： H01L27/11507 , G11C11/22 , H01L27/11502 , H05K3/12
摘要： PROBLEM TO BE SOLVED: To provide an easy and inexpensive method of making a rewritable non-volatile memory device which can be easily incorporated in a tag, label or package printing process or the packaging process itself.SOLUTION: The fabrication method may comprise successive steps of a) printing a first electrode layer with a first printing ink onto an insulating substrate using first printing means, thereby forming a first set of electrodes, b) printing a patterned or unpatterned layer of memory material with a second printing ink onto the first electrode layer using second printing means, and c) printing a second electrode layer with a third printing ink onto the memory layer using third printing means, thereby forming the second set of electrodes. The method may be implemented by various printing processes either separately or in combination.
摘要翻译：要解决的问题：提供一种易于且廉价的制造可重写的非易失性存储器件的方法，其可以容易地结合在标签，标签或封装印刷过程或包装过程本身中。解决方案：制造方法可以包括以下连续步骤：a）使用第一印刷装置将具有第一印刷油墨的第一电极层印刷到绝缘基板上，从而形成第一组电极，b）印刷图案化或未图案化的层使用第二印刷装置将具有第二印刷油墨的第二印刷油墨注入到第一电极层上，以及c）使用第三印刷装置将具有第三印刷油墨的第二电极层印刷到存储层上，由此形成第二组电极。该方法可以通过各种印刷方法单独地或组合地实现。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2008234832A Method for operating ferroelectric or electret memory device, and device of this kind 审中-公开
标题翻译：用于操作电磁或电存储器件的方法，以及该类型的器件
公开(公告)号：JP2008234832A
公开(公告)日：2008-10-02
申请号：JP2008156826
申请日：2008-06-16
申请人： Thin Film Electronics Asa , シンフイルムエレクトロニクスエイエスエイ
发明人： GUDESEN HANS GUDE , NORDAL PER-ERIK , LEISTAD GEIRR I , BROEMS PER , SANDSTROEM PER , JOHANSSON MATS
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： PROBLEM TO BE SOLVED: To obviate change or drift in response of a memory cell caused by variation in a hysteresis curve and switching speed in an addressing operation of a ferroelectric or electret memory device. SOLUTION: At least one parameter indicating switching speed response change of the ferroelectric or electret memory is determined. At least one correction factor is determined by determining a switching speed dependence correction factor. Alternatively, the correction factor is determined by determining at least one temperature dependence correction factor. Thus, at least one pulse parameter related to the potential level predetermined by a voltage pulse protocol is adjusted by the at least one correction factor. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了避免由于铁电或驻极体存储器件的寻址操作中的滞后曲线的变化和开关速度引起的存储器单元的响应的变化或漂移。
解决方案：确定表示铁电或驻极体存储器的切换速度响应变化的至少一个参数。通过确定开关速度相关校正因子来确定至少一个校正因子。或者，通过确定至少一个温度依赖性校正因子来确定校正因子。因此，通过至少一个校正因子调整与由电压脉冲协议预定的电位电平有关的至少一个脉冲参数。版权所有（C）2009，JPO＆INPIT

4. 发明申请

WO2004086406A8 SENSE AMPLIFIER SYSTEMS AND A MATRIX-ADDRESSABLE MEMORY DEVICE PROVIDED THEREWITH 审中-公开
标题翻译： SENSE放大器系统和提供的矩阵可寻址存储器件
公开(公告)号：WO2004086406A8
公开(公告)日：2006-04-20
申请号：PCT/NO2004000086
申请日：2004-03-25
申请人： THIN FILM ELECTRONICS ASA , SCHWEICKERT ROBERT , LEISTAD GEIRR I
发明人： SCHWEICKERT ROBERT , LEISTAD GEIRR I
IPC分类号： G11C20060101 , G11C7/06 , G11C11/22 , G11C16/06
CPC分类号： G11C7/062 , G11C11/22 , G11C2207/063
摘要： A sense amplifier system for sensing the charge of a charge-storing means (601) comprises a first and second charge reference means (600a, 600b) connected in parallel and similar to the charge-storing means (601) and having respectively opposite polarization. The charge reference means (600a, 600b) and the charge-storing means (601) have a common input node (WL), and first and second pseudo-differential reference sense amplifiers (RSA1, RSA2) are connected with output nodes (RBL1, RBL2) of the charge reference means (600a, 600b) for generating reference signals to a common reference node (CHREF) connected with a pseudo-differential sense amplifier (SA). The pseudo-differential sense amplifier (SA) has a second input for receiving an output signal from the charge-storing means (601) and generates an output signal indicative of a polarization state of the charge-storing means. Another embodiment adapted for sensing the charges of a plurality of charge-storing means (701) and comprising at least two pairs of charge reference means is also described. A non-volatile matrix-addressable memory system comprising an electrical polarizable dielectric memory material exhibiting hysterisis and a sense amplifier system as described is also claimed.
摘要翻译：用于感测电荷存储装置（601）的电荷的感测放大器系统包括并联连接并类似于电荷存储装置（601）并具有相反偏振的第一和第二电荷参考装置（600a，600b）。充电参考装置（600a，600b）和电荷存储装置（601）具有公共输入节点（WL），并且第一和第二伪差分参考读出放大器（RSA1，RSA2）与输出节点（RBL1，用于将参考信号产生到与伪差分读出放大器（SA）连接的公共参考节点（CHREF）的电荷参考装置（600a，600b）的RBL2）。伪差分读出放大器（SA）具有用于从电荷存储装置（601）接收输出信号的第二输入端，并产生指示电荷存储装置的极化状态的输出信号。还描述了适于感测多个电荷存储装置（701）的电荷并且包括至少两对电荷参考装置的另一实施例。还要求保护包括表现迟滞的电极化电介质存储材料和所述读出放大器系统的非易失性矩阵寻址存储器系统。

5. 发明申请

WO9963527A3 DATA STORAGE AND PROCESSING APPARATUS, AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：数据存储和处理装置及其制造方法
公开(公告)号：WO9963527A3
公开(公告)日：2000-02-17
申请号：PCT/NO9900181
申请日：1999-06-02
申请人： THIN FILM ELECTRONICS ASA , GUDESEN HANS GUDE , NORDAL PER ERIK , LEISTAD GEIRR I , CARLSSON JOHAN , GUSTAFSSON GOERAN
发明人： GUDESEN HANS GUDE , NORDAL PER-ERIK , LEISTAD GEIRR I , CARLSSON JOHAN , GUSTAFSSON GOERAN
IPC分类号： G06F1/16 , G11C17/00 , H01L21/768 , H01L21/822 , H01L21/98 , H01L25/065 , H01L25/07 , H01L25/18 , H01L27/00 , H01L27/10 , H01L51/40
CPC分类号： H01L51/0001 , G11C5/02 , G11C17/06 , H01L21/2026 , H01L21/768 , H01L21/76888 , H01L21/76894 , H01L21/8221 , H01L27/0688 , H01L27/1021 , H01L27/105 , H01L27/1052 , H01L27/108 , H01L27/11 , H01L27/11502 , H01L51/0024 , H01L2924/0002 , H01L2924/00
摘要： A data storage and processing apparatus comprising ROM and/or WORM and/or REWRITEABLE memory modules and/or processing modules on a substrate. The memory and/or processing modules are provided as a single main layer or multiple main layers on the top of the substrate. The apparatus comprises active components in the form of transistors and/or diodes for operating the apparatus. In one set of embodiments at least some and at most all the transistors and/or diodes for operating the apparatus are provided on or in the substrate. In another set of embodiments at least some and at most all of the layers on the top of the substrate comprise low-temperature compatible organic materials and/or low temperature compatible processed inorganic films, even without requiring transistors and/or diodes to be provided on or in the substrate. In a method for fabricating a data storage and processing apparatus of this kind, the memory and/or processing modules are provided on the substrate by depositing the layers in successive steps. The deposition and processing of the layers take place under thermal conditions that avoid subjecting an already deposited and processed underlying layer or layers to static or dynamic temperatures exceeding given stability limits, particularly in regard of organic materials.
摘要翻译：一种包括ROM和/或WORM和/或REWRITEABLE存储器模块和/或衬底上的处理模块的数据存储和处理设备。存储器和/或处理模块作为单个主层或多个主层提供在衬底的顶部上。该装置包括用于操作该装置的晶体管和/或二极管形式的有源部件。在一组实施例中，用于操作设备的至少一些和至多所有晶体管和/或二极管用于提供在衬底上或衬底中。在另一组实施方案中，衬底顶部上的至少一些和至多所有层包括低温相容的有机材料和/或低温相容的经处理的无机膜，即使不需要在二极管上提供晶体管和/或二极管或在基材中。在这种用于制造这种数据存储和处理装置的方法中，通过以连续的步骤沉积层来在存储器和/或处理模块上提供存储器和/或处理模块。层的沉积和加工在热条件下进行，避免了将已经沉积和加工的下层或多层经受超过给定稳定极限的静态或动态温度，特别是在有机材料方面。

6. 发明公开

EP1894146A4 A DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：EP1894146A4
公开(公告)日：2009-11-25
申请号：EP06747666
申请日：2006-06-08
申请人： THIN FILM ELECTRONICS ASA
发明人： LEISTAD GEIRR I , BROEMS PER , KARLSSON CHRISTER
IPC分类号： G06K19/067 , G06K20060101 , G06K1/12 , G06K7/00 , G06K7/06 , G06K7/08 , G06K19/06 , G11B9/00 , G11C11/22 , G11C13/02
CPC分类号： G06K7/0021 , B82Y10/00 , G11B9/02 , G11B9/1454 , G11C11/22 , G11C11/5664 , G11C13/0009 , G11C13/0014 , G11C13/0016

7. 发明公开

EP1879928A4 A METHOD FOR FORMING FERROELECTRIC THIN FILMS, THE USE OF THE METHOD AND A MEMORY WITH A FERROELECTRIC OLIGOMER MEMORY MATERIAL 审中-公开
标题翻译：方法教育FERRO电薄膜，使用具有FERRO电动低聚存储材料的程序记忆
公开(公告)号：EP1879928A4
公开(公告)日：2009-12-02
申请号：EP06747629
申请日：2006-05-02
申请人： THIN FILM ELECTRONICS ASA
发明人： JOHANSSON NICKLAS , XU HAISHENG , LEISTAD GEIRR I
IPC分类号： C08F14/22 , B05D7/24 , B29C20060101 , C08F214/22 , C23C14/12 , H01L21/28 , H01L21/312
CPC分类号： C23C14/12 , B05D1/60 , B05D2506/10 , C08F214/22 , H01L21/0212 , H01L21/02269 , H01L21/02356 , H01L21/28291 , H01L21/3127 , H01L27/285

8. 发明专利

DE69837540T2 未知
公开(公告)号：DE69837540T2
公开(公告)日：2007-12-27
申请号：DE69837540
申请日：1998-06-05
申请人： THIN FILM ELECTRONICS ASA
发明人： GUDESEN HANS GUDE , LEISTAD GEIRR I , NORDAL PER-ERIK
IPC分类号： G02F3/00 , G02F3/02 , G11C7/00 , G11C11/56 , G11C13/00 , G11C13/02 , G11C13/04
摘要： In a multistable optical logic element with a light-sensitive organic material (1) which undergoes a photocycle with several physical states by irradiation with light, and wherein a physical state is assigned a logical value which can be changed by addressing the element optically, the element initially before the addressing is in a metastable state generated in advance. A multistable optical logic element has been made proximity-addressable by providing at least a color light source (2) for optical addressing and at least one color-sensitive optical detector (5) adjacent to the light-sensitive material. In a method for preparing of the light-sensitive material (1) a desired initial metastable state is generated in the photocycle and assigned a determined logical value for the element. In a method for optical addressing of the optical logic element steps for respectively writing and storing, reading, erasing and switching comprises generating transitions between states in the photocycle and detection of the states. Use in an optical logical device for storing and processing of data.

9. 发明专利

AT359538T 未知
公开(公告)号：AT359538T
公开(公告)日：2007-05-15
申请号：AT98923223
申请日：1998-06-05
申请人： THIN FILM ELECTRONICS ASA
发明人： GUDESEN HANS GUDE , LEISTAD GEIRR I , NORDAL PER-ERIK
IPC分类号： G02F3/00 , G02F3/02 , G11C7/00 , G11C11/56 , G11C13/00 , G11C13/02 , G11C13/04
摘要： In a multistable optical logic element with a light-sensitive organic material (1) which undergoes a photocycle with several physical states by irradiation with light, and wherein a physical state is assigned a logical value which can be changed by addressing the element optically, the element initially before the addressing is in a metastable state generated in advance. A multistable optical logic element has been made proximity-addressable by providing at least a color light source (2) for optical addressing and at least one color-sensitive optical detector (5) adjacent to the light-sensitive material. In a method for preparing of the light-sensitive material (1) a desired initial metastable state is generated in the photocycle and assigned a determined logical value for the element. In a method for optical addressing of the optical logic element steps for respectively writing and storing, reading, erasing and switching comprises generating transitions between states in the photocycle and detection of the states. Use in an optical logical device for storing and processing of data.

10. 发明专利

AT333137T 未知
公开(公告)号：AT333137T
公开(公告)日：2006-08-15
申请号：AT02700903
申请日：2002-02-15
申请人： THIN FILM ELECTRONICS ASA
发明人： NORDAL PER-ERIK , GUDESEN HANS GUDE , LEISTAD GEIRR I
IPC分类号： G11C7/12 , G11C11/16 , G11C11/22 , G11C11/401 , G11C8/08
摘要： In a method for determining the logic state of memory cells in a passive matrix-addressable data storage device with word and bit lines, components of current response are detected and correlated with a probing voltage, and a time-dependent potential is applied on selected word and bit lines or groups thereof, said potentials being mutually coordinated in magnitude and time such that the resulting voltages across all or some of the non-addressed cells at the crossing points between inactive word lines and active bit lines are brought to contain only negligible voltage components that are temporally correlated with the probing voltage. A first apparatus according to the invention for performing the method provides sequential readout of all memory cells on an active word line (AWL) by means of detection circuits ( 3; 4 ). An active word line (AWL) is selected by a multiplexer ( 7 ), while inactive word lines (IWL) are clamped to ground during readout. A second apparatus for performing the method is rather similar, but has only a single detection circuit ( 3, 4 ). An active word line (AWL) is selected by multiplexer ( 7 ) and a bit line (ABL) is selected by a multiplexer ( 9 ) provided between one end of the bit lines (BL) and the input of the detection circuit ( 3, 4 ), while inactive word and bit lines (IWL; IBL) are clamped to ground during readout.

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