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1. 发明专利

JP2007087579A Address specification of memory matrix 审中-公开
标题翻译：存储器矩阵的地址规范
公开(公告)号：JP2007087579A
公开(公告)日：2007-04-05
申请号：JP2006287634
申请日：2006-10-23
申请人： Thin Film Electronics Asa , シンフイルムエレクトロニクスエイエスエイ
发明人： THOMPSON MICHAEL , NORDAL PER-ERIK , GUSTAFSSON GOERAN , CARLSSON JOHAN , GUDESEN HANS GUDE
IPC分类号： G02F1/133 , G11C11/22 , G09G3/20 , G09G3/36 , G11C7/06 , G11C7/10 , G11C8/18 , H01L21/8246 , H01L27/105
CPC分类号： G11C11/22 , G09G3/20 , G09G3/3629 , G09G2300/06 , G09G2310/0251 , G09G2320/0209 , G11C7/06 , G11C7/1006 , G11C8/18
摘要： PROBLEM TO BE SOLVED: To provide a voltage to time protocol for driving (x) and (y) passive matrix address specification line in a nonvolatile memory indicating hysteresis curve of a ferroelectric object so that disturbance of memory cells being not selected is made the minimum. SOLUTION: Potentials on all word lines and bit lines are controlled temporally conforming to a protocol by controlling so that potentials on a selected word line and a bit line are approximated or made coincident to one out of the predetermined potential levels of (n) pieces, so as to connect to bit lines (single or multiple) and a circuit for detecting electric charges flowing between the bit line and a cell during the predetermined period of timing sequence given by the protocol, latching successively word lines to potentials selected from potentials of n word pieces, meanwhile, latching successively bit lines to potentials selected from potentials of (n) bit pieces. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了在指示铁电体的磁滞曲线的非易失性存储器中提供用于驱动（x）和（y）无源矩阵地址指定线的时间协议电压，使得未选择的存储器单元的干扰为做到最小。解决方案：所有字线和位线上的电位通过控制在时间上受控于协议的控制，使得所选字线和位线上的电位近似于或与（n ），以便在协议给定的定时序列的预定时段期间连接到位线（单个或多个）和用于检测在位线和单元之间流动的电荷的电路，将连续的字线锁定到从同时，将（n）位的电位中选择的电位连续的位线锁存在n 字的电位上。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2006253699A Data storage/computing device, and method of manufacturing the same 审中-公开
标题翻译：数据存储/计算装置及其制造方法
公开(公告)号：JP2006253699A
公开(公告)日：2006-09-21
申请号：JP2006089948
申请日：2006-03-29
申请人： Thin Film Electronics Asa , シンフイルムエレクトロニクスエイエスエイ
发明人： GUDESEN HANS GUDE , NORDAL PER-ERIK , LEISTAD GEIRR I , CARLSSON JOHAN , GUSTAFSSON GORAN
IPC分类号： G06F1/16 , H01L27/00 , G11C16/02 , G11C17/00 , H01L21/768 , H01L21/822 , H01L21/98 , H01L25/065 , H01L25/07 , H01L25/18 , H01L27/10 , H01L51/40
CPC分类号： H01L51/0001 , G11C5/02 , G11C17/06 , H01L21/2026 , H01L21/768 , H01L21/76888 , H01L21/76894 , H01L21/8221 , H01L27/0688 , H01L27/1021 , H01L27/105 , H01L27/1052 , H01L27/108 , H01L27/11 , H01L27/11502 , H01L51/0024 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a data storage/computing device which is equiped with an ROM and/or WORM and/or REWRITABLE memory module, and/or a computing module on a substrate, and an organic material adaptable to a low-temperature and/or an inorganic film processed at a low temperature. SOLUTION: A memory and/or a computing module is provided on a substrate by sequentially depositing a layer. The deposition and processing of the layer is carried out under thermal condition in which one or a plurality of layers deposited and processed underneath, particularly an organic material, is not subjected to a static temperature or a dynamic temperature excessively exceeding limitation for stability. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种数据存储/计算设备，其配备有ROM和/或WORM和/或可再利用存储器模块，和/或基板上的计算模块，以及适用于低温和/或在低温下处理的无机膜。解决方案：通过顺序地沉积层，在衬底上提供存储器和/或计算模块。该层的沉积和处理在其下沉积和加工的一个或多个层，特别是有机材料的热条件下不进行过度超过对稳定性的限制的静态温度或动态温度。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2008234832A Method for operating ferroelectric or electret memory device, and device of this kind 审中-公开
标题翻译：用于操作电磁或电存储器件的方法，以及该类型的器件
公开(公告)号：JP2008234832A
公开(公告)日：2008-10-02
申请号：JP2008156826
申请日：2008-06-16
申请人： Thin Film Electronics Asa , シンフイルムエレクトロニクスエイエスエイ
发明人： GUDESEN HANS GUDE , NORDAL PER-ERIK , LEISTAD GEIRR I , BROEMS PER , SANDSTROEM PER , JOHANSSON MATS
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： PROBLEM TO BE SOLVED: To obviate change or drift in response of a memory cell caused by variation in a hysteresis curve and switching speed in an addressing operation of a ferroelectric or electret memory device. SOLUTION: At least one parameter indicating switching speed response change of the ferroelectric or electret memory is determined. At least one correction factor is determined by determining a switching speed dependence correction factor. Alternatively, the correction factor is determined by determining at least one temperature dependence correction factor. Thus, at least one pulse parameter related to the potential level predetermined by a voltage pulse protocol is adjusted by the at least one correction factor. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了避免由于铁电或驻极体存储器件的寻址操作中的滞后曲线的变化和开关速度引起的存储器单元的响应的变化或漂移。
解决方案：确定表示铁电或驻极体存储器的切换速度响应变化的至少一个参数。通过确定开关速度相关校正因子来确定至少一个校正因子。或者，通过确定至少一个温度依赖性校正因子来确定校正因子。因此，通过至少一个校正因子调整与由电压脉冲协议预定的电位电平有关的至少一个脉冲参数。版权所有（C）2009，JPO＆INPIT

4. 发明申请

WO2006009461A8 AN ORGANIC FERROELECTRIC OR ELECTRET MEMORY CIRCUIT AND A METHOD FOR MAKING SAME 审中-公开
标题翻译：一种有机铁电或电磁存储器电路及其制造方法
公开(公告)号：WO2006009461A8
公开(公告)日：2006-04-20
申请号：PCT/NO2005000267
申请日：2005-07-18
申请人： THIN FILM ELECTRONICS ASA , LILJEDAHL RICKARD , SANDBERG MATS , GUSTAFSSON GOERAN , GUDESEN HANS GUDE
发明人： LILJEDAHL RICKARD , SANDBERG MATS , GUSTAFSSON GOERAN , GUDESEN HANS GUDE
IPC分类号： G11C20060101 , G11C11/22 , H01L49/02
CPC分类号： G11C11/22 , B82Y10/00
摘要： In an organic electronic circuit (C), particularly a memory circuit with an organic ferroelectric or electret material (2) the active material comprises fluorine atoms and consists of various organic materials. The active material is located between a first electrode and a second electrode. A cell with a capacitor-like structure is defined in the active material and can be accessed for an addressing operation via a first and a second electrode. At least one of these electrodes (1 a, 1 b) comprises a layer of chemically modified gold. In a passive matrix-addressable electronic device, particularly a ferroelectric or electret memory device, circuits (C) of this kind with the active material as a ferroelectric or electret memory material form the elements of a matrix-addressable array and define the memory cells provided between first and second set of addressing electrodes. At least the electrodes of at least one of the sets then comprise at least a layer of gold. A method in the fabrication of the organic electronic circuit (C) the method comprises steps for depositing a layer of gold as at least one layer of at least one electrode and treating an exposed surface of this layer chemically, whereafter the layer of active material can be deposited on the top of the processed surface of this electrode.
摘要翻译：在有机电子电路（C）中，特别是具有有机铁电或驻极体材料（2）的存储电路中，活性材料包含氟原子并且由各种有机材料组成。活性材料位于第一电极和第二电极之间。具有电容器状结构的电池被定义在活性材料中，并且可以通过第一和第二电极访问寻址操作。这些电极（1a，1b）中的至少一个包括化学修饰的金层。在无源矩阵可寻址电子器件，特别是铁电或驻极体存储器器件中，这种具有作为铁电或驻极体存储材料的活性材料的电路（C）形成矩阵可寻址阵列的元件并且限定所提供的存储器单元在第一和第二组寻址电极之间。然后至少一个组的至少电极包括至少一层金。一种制造有机电子电路（C）的方法，该方法包括以下步骤：沉积金层作为至少一个电极的至少一个层，并化学处理该层的暴露表面，随后该活性材料层可以沉积在该电极的处理过的表面的顶部。

5. 发明申请

WO9963527A3 DATA STORAGE AND PROCESSING APPARATUS, AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：数据存储和处理装置及其制造方法
公开(公告)号：WO9963527A3
公开(公告)日：2000-02-17
申请号：PCT/NO9900181
申请日：1999-06-02
申请人： THIN FILM ELECTRONICS ASA , GUDESEN HANS GUDE , NORDAL PER ERIK , LEISTAD GEIRR I , CARLSSON JOHAN , GUSTAFSSON GOERAN
发明人： GUDESEN HANS GUDE , NORDAL PER-ERIK , LEISTAD GEIRR I , CARLSSON JOHAN , GUSTAFSSON GOERAN
IPC分类号： G06F1/16 , G11C17/00 , H01L21/768 , H01L21/822 , H01L21/98 , H01L25/065 , H01L25/07 , H01L25/18 , H01L27/00 , H01L27/10 , H01L51/40
CPC分类号： H01L51/0001 , G11C5/02 , G11C17/06 , H01L21/2026 , H01L21/768 , H01L21/76888 , H01L21/76894 , H01L21/8221 , H01L27/0688 , H01L27/1021 , H01L27/105 , H01L27/1052 , H01L27/108 , H01L27/11 , H01L27/11502 , H01L51/0024 , H01L2924/0002 , H01L2924/00
摘要： A data storage and processing apparatus comprising ROM and/or WORM and/or REWRITEABLE memory modules and/or processing modules on a substrate. The memory and/or processing modules are provided as a single main layer or multiple main layers on the top of the substrate. The apparatus comprises active components in the form of transistors and/or diodes for operating the apparatus. In one set of embodiments at least some and at most all the transistors and/or diodes for operating the apparatus are provided on or in the substrate. In another set of embodiments at least some and at most all of the layers on the top of the substrate comprise low-temperature compatible organic materials and/or low temperature compatible processed inorganic films, even without requiring transistors and/or diodes to be provided on or in the substrate. In a method for fabricating a data storage and processing apparatus of this kind, the memory and/or processing modules are provided on the substrate by depositing the layers in successive steps. The deposition and processing of the layers take place under thermal conditions that avoid subjecting an already deposited and processed underlying layer or layers to static or dynamic temperatures exceeding given stability limits, particularly in regard of organic materials.
摘要翻译：一种包括ROM和/或WORM和/或REWRITEABLE存储器模块和/或衬底上的处理模块的数据存储和处理设备。存储器和/或处理模块作为单个主层或多个主层提供在衬底的顶部上。该装置包括用于操作该装置的晶体管和/或二极管形式的有源部件。在一组实施例中，用于操作设备的至少一些和至多所有晶体管和/或二极管用于提供在衬底上或衬底中。在另一组实施方案中，衬底顶部上的至少一些和至多所有层包括低温相容的有机材料和/或低温相容的经处理的无机膜，即使不需要在二极管上提供晶体管和/或二极管或在基材中。在这种用于制造这种数据存储和处理装置的方法中，通过以连续的步骤沉积层来在存储器和/或处理模块上提供存储器和/或处理模块。层的沉积和加工在热条件下进行，避免了将已经沉积和加工的下层或多层经受超过给定稳定极限的静态或动态温度，特别是在有机材料方面。

6. 发明公开

EP1782428A4 AN ORGANIC FERROELECTRIC OR ELECTRET MEMORY CIRCUIT AND A METHOD FOR MAKING SAME 有权
标题翻译：有机FERRO或驻极体存储器电路及其制造方法
公开(公告)号：EP1782428A4
公开(公告)日：2009-11-18
申请号：EP05761995
申请日：2005-07-18
申请人： THIN FILM ELECTRONICS ASA
发明人： LILJEDAHL RICKARD , SANDBERG MATS , GUSTAFSSON GOERAN , GUDESEN HANS GUDE
IPC分类号： G11C11/22 , G11C20060101 , H01L23/538 , H01L49/02
CPC分类号： G11C11/22 , B82Y10/00

7. 发明专利

AT525706T 未知
公开(公告)号：AT525706T
公开(公告)日：2011-10-15
申请号：AT06747668
申请日：2006-06-08
申请人： THIN FILM ELECTRONICS ASA
发明人： BROEMS PER , KARLSSON CHRISTER , LEISTAD GEIRR , GUDESEN HANS GUDE , HAMBERG PER , BJOERKLID STAFFAN , CARLSSON JOHAN , GUSTAFSSON GOERAN
IPC分类号： G06K19/067 , G06K20060101 , G06K1/12 , G06K7/00 , G06K7/06 , G06K7/08 , G06K19/06 , G11B9/00 , G11C11/22
摘要： In a non-volatile electric memory system a memory unit and a read/write unit are provided as physically separate units. The memory unit is based on a memory material that can be set to at least two distinct physical states by applying an electric field across the memory material. Electrodes and/or contacts are either provided in the memory unit or in the read/write unit and contacts are at least always provided in the read/write unit. Electrodes and contacts are provided in a geometrical arrangement, which defines geometrically one or more memory cells in the memory layer. Establishing a physical contact between the memory unit and the read/write unit closes an electrical circuit over the addressed memory cell such that read, write or erase operations can be effected. The memory material of the memory unit can be polarized into two discernible polarization states.

8. 发明专利

DE602004019561D1 未知
公开(公告)号：DE602004019561D1
公开(公告)日：2009-04-02
申请号：DE602004019561
申请日：2004-11-24
申请人： THIN FILM ELECTRONICS ASA
发明人： HAMBERG PER , KARLSSON CHRISTER , NORDAL PER-ERIK , OJAKANGAS NICKLAS , CARLSSON JOHAN , GUDESEN HANS GUDE
IPC分类号： G11C8/06 , G06F12/02 , G11C20060101 , G11C7/02 , G11C8/12 , G11C8/18 , G11C11/22
摘要： In a method for obviating the effect of disturb voltages in a data storage apparatus employing passive matrix addressing, an application of electric potentials for an addressing operation is according to a voltage pulse protocol. The data storage cells of the apparatus are provided in two or more electrically separated segments each constituting non-overlapping physical address subspaces of the data storage apparatus physical address space. A number of data storage cells in each segment are preset to the same polarization by an active voltage pulse with a specific polarization. In a first addressing operation one or more data storage cells are read by applying an active pulse with the same polarization to each data storage cell and recording the output charge response. On basis thereof the output data in subsequent second addressing operation are copied onto preset data storage cells in another segment of the data storage apparatus, this segment being selected on the basis of its previous addressing history.

9. 发明专利

CA2437050C NON-DESTRUCTIVE READOUT 未知
公开(公告)号：CA2437050C
公开(公告)日：2008-02-12
申请号：CA2437050
申请日：2002-02-15
申请人： THIN FILM ELECTRONICS ASA
发明人： LEISTAD GEIRR I , GUDESEN HANS GUDE , NORDAL PER-ERIK
IPC分类号： G11C7/12 , G11C8/08 , G11C11/16 , G11C11/22 , G11C11/401
摘要： In a method for determining the logic state of memory cells in a passive matrix-addressable data storage device with word and bit lines, components o f current response are detected and correlated with a probing voltage, and a time-dependent potential is applied on selected word and bit lines or groups thereof, said potentials being mutually coordinated in magnitude and time su ch that the resulting voltages across all or some of the non-addressed cells at the crossing points between inactive word lines and active bit lines are brought to contain only negligible voltage components that are temporally correlated with the probing voltage. A first apparatus according to the invention for performing the method provides sequential readout of all memor y cells on an active word line (AWL) by means of detection circuits (3; 4). An active word line (AWL) is selected by a multiplexer (7), while inactive word lines (IWL) are clamped to ground during readout. A second apparatus for performing the method is rather similar, but has only a single detection circuit (3, 4). An active word line (AWL) is selected by multiplexer (7) and a bit line (ABL) is selected by a multiplexer (9) provided between one end of the bit lines (BL) and the input of the detection circuit (3, 4), while inactive word and bit lines(IWL; IBL) are clamped to ground during readout.

10. 发明专利

ES2274995T3 DISPOSITIVO DE MEMORIA NO VOLATIL. 未知
公开(公告)号：ES2274995T3
公开(公告)日：2007-06-01
申请号：ES02755997
申请日：2002-08-28
申请人： THIN FILM ELECTRONICS ASA
发明人： GUDESEN HANS GUDE , NORDAL PER-ERIK
IPC分类号： G01C11/22 , G11C11/22 , C08L27/16 , H01L21/8246 , H01L27/105 , H01L27/115 , H01L27/28 , H01L51/05
摘要： Un dispositivo de memoria no volátil (10) que comprende un material de memoria dieléctrico polarizable eléctricamente (11) con propiedades ferroeléctricas o de electreto y capaz de presentar una histéresis y una remanencia, en el que el material de memoria (11) comprende uno o más polímeros, en el que el material de memoria está previsto en contacto con una primera serie y una segunda serie de respectivos electrodos (WL;BL) para operaciones de escritura, lectura y borrado, en el que una célula de memoria (12) con una estructura a modo de condensador está definida en el material de memoria (11) y puede ser accedida directa o indirectamente por vía de los electrodos (WL;BL) en el que las células de memoria (12) del dispositivo de memoria (10) forman los elementos de una matriz activa o pasiva, en el que cada célula de memoria (12) puede ser dirigida selectivamente para una operación de escritura/lectura/borrado estableciendo un estado de polarización deseado en la célula de memoria o ejecutando una conmutación de polarización de la misma, y en el que un estado de polarización determinado establecido en la célula de la memoria (12) define un estado lógico de la misma, caracterizado porque el material de memoria ferroeléctrico o de electreto (11) comprende al menos un polímero deuterizado.

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