专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20070102812A1 Reduction of macro level stresses in copper/Low-K wafers by altering aluminum pad/passivation stack to reduce or eliminate IMC cracking in post wire bonded dies 有权
标题翻译：通过改变铝焊盘/钝化层来减少或消除后线焊接模具中的IMC裂纹来减少铜/低K晶片中的宏观水平应力
公开(公告)号：US20070102812A1
公开(公告)日：2007-05-10
申请号：US11269275
申请日：2005-11-08
申请人： Sey-Shing Sun , Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Hong Ying , Chiyi Kao , Peter Burke
发明人： Sey-Shing Sun , Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Hong Ying , Chiyi Kao , Peter Burke
IPC分类号： H01L23/48
CPC分类号： H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05124 , H01L2224/05147 , H01L2224/05624 , H01L2224/05644 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48453 , H01L2224/48463 , H01L2224/48507 , H01L2224/48624 , H01L2224/48644 , H01L2224/48699 , H01L2224/48724 , H01L2224/48744 , H01L2224/48824 , H01L2224/48844 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00015
摘要： A pad structure and passivation scheme which reduces or eliminates IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing. A thick 120 nm barrier layer can be provided between a 1.2 μm aluminum layer and copper. Another possibility is to effectively split up the barrier layer, where the aluminum layer is disposed between the two barrier layers. The barrier layers may be 60 nm while the aluminum layer which is disposed between the barrier layers may be 0.6 μm. Another possibility is provide an extra 0.6 μm aluminum layer on the top barrier layer. Still another possibility is to provide an extra barrier layer on the top-most aluminum layer, such that a top barrier layer of 60 nm is provided on a 0.6 μm aluminum layer, followed by another barrier layer of 60 nm, another aluminum layer of 0.6 μm and another barrier layer of 60 nm.
摘要翻译：一种衬垫结构和钝化方案，可在Cu / Low-K BEOL处理期间减少或消除后引线键合模具中的IMC裂纹。可以在1.2μm铝层和铜之间提供厚120nm的阻挡层。另一种可能性是有效地分离阻挡层，其中铝层设置在两个阻挡层之间。阻挡层可以是60nm，而设置在阻挡层之间的铝层可以是0.6μm。另一种可能性是在顶部阻挡层上提供额外的0.6μm的铝层。另一种可能性是在最顶层的铝层上提供额外的阻挡层，使得在0.6μm的铝层上提供60nm的顶部阻挡层，接着是60nm的另一阻挡层，另一个为0.6的铝层妈妈和60nm的另一阻挡层。

2. 发明授权

US08076779B2 Reduction of macro level stresses in copper/low-K wafers 有权
标题翻译：降低铜/低K晶片的宏观水平应力
公开(公告)号：US08076779B2
公开(公告)日：2011-12-13
申请号：US11269275
申请日：2005-11-08
申请人： Sey-Shing Sun , Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Hong Ying , Chiyi Kao , Peter Burke
发明人： Sey-Shing Sun , Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Hong Ying , Chiyi Kao , Peter Burke
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05124 , H01L2224/05147 , H01L2224/05624 , H01L2224/05644 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48453 , H01L2224/48463 , H01L2224/48507 , H01L2224/48624 , H01L2224/48644 , H01L2224/48699 , H01L2224/48724 , H01L2224/48744 , H01L2224/48824 , H01L2224/48844 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00015
摘要： A pad structure and passivation scheme which reduces or eliminates IMC cracking in post wire bonded dies during Cu/Low-k BEOL processing. A thick 120 nm barrier layer can be provided between a 1.2 μm aluminum layer and copper. Another possibility is to effectively split up the barrier layer, where the aluminum layer is disposed between the two barrier layers. The barrier layers may be 60 nm while the aluminum layer which is disposed between the barrier layers may be 0.6 μm. Another possibility is provide an extra 0.6 μm aluminum layer on the top barrier layer. Still another possibility is to provide an extra barrier layer on the top-most aluminum layer, such that a top barrier layer of 60 nm is provided on a 0.6 μm aluminum layer, followed by another harrier layer of 60 nm, another aluminum layer of 0.6 μm and another barrier layer of 60 nm.
摘要翻译：一种衬垫结构和钝化方案，可在Cu / Low-k BEOL处理期间减少或消除后引线键合模具中的IMC裂纹。可以在1.2μm的铝层和铜之间设置厚120nm的阻挡层。另一种可能性是有效地分离阻挡层，其中铝层设置在两个阻挡层之间。阻挡层可以是60nm，而设置在阻挡层之间的铝层可以是0.6μm。另一种可能性是在顶部阻挡层上提供额外的0.6μm的铝层。另一种可能性是在最顶层的铝层上提供额外的阻挡层，使得在0.6μm的铝层上设置60nm的顶部阻挡层，接着是60nm的另一个阻挡层，另一个为0.6的铝层 μm，另一个阻挡层为60nm。

3. 发明申请

US20070123024A1 Eliminate IMC cracking in post wirebonded dies: macro level stress reduction by modifying dielectric/metal film stack in be layers during Cu/Low-K processing 失效
标题翻译：消除后引线键合芯片中的IMC裂纹：在Cu / Low-K处理期间通过改变介电层/金属膜堆叠层的宏观级应力降低
公开(公告)号：US20070123024A1
公开(公告)日：2007-05-31
申请号：US11290087
申请日：2005-11-30
申请人： Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Sey-Shing Sun , Hong Ying , Chiyi Kao , Peter Burke , Ramaswamy Ranganathan , Qwai Low
发明人： Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Sey-Shing Sun , Hong Ying , Chiyi Kao , Peter Burke , Ramaswamy Ranganathan , Qwai Low
IPC分类号： H01L21/4763
CPC分类号： H01L21/76801 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05556 , H01L2224/05624 , H01L2224/45124 , H01L2224/45144 , H01L2224/48453 , H01L2224/48463 , H01L2224/48507 , H01L2224/48624 , H01L2224/48724 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/05042 , H01L2924/181 , H01L2924/351 , H01L2924/00
摘要： Different ways to reduce or eliminate the IMC cracking issues in wire bonded parts, including: changing to more compressive dielectric films for top, R1, and R2; changing the top passivation film stacks to more compressive films; changing the low k film to a higher compressive film; reducing the R layer thickness and pattern density to reduce tensile stress; and minimizing anneal and dielectric deposition temperatures. Each of the methods can be used individually or in combination with each other to reduce overall tensile stresses in the Cu/low-k wafer thus reducing or eliminating the IMC cracking issue currently seen in the post wire bonded parts.
摘要翻译：减少或消除引线接合部件中的IMC裂纹问题的不同方法，包括：改变为顶部R 1和R 2的更多的压电绝缘膜; 将顶部钝化膜堆叠更改为更多的压缩膜; 将低k膜改为较高的压缩膜; 降低R层厚度和图案密度以降低拉伸应力; 并最小化退火和介电沉积温度。每个方法可以单独使用或彼此组合使用以减少Cu / low-k晶片中的总拉伸应力，从而减少或消除了现在在后引线接合部件中看到的IMC裂纹问题。

4. 发明授权

US07531442B2 Eliminate IMC cracking in post wirebonded dies: macro level stress reduction by modifying dielectric/metal film stack in be layers during Cu/Low-K processing 失效
标题翻译：消除后引线键合芯片中的IMC裂纹：在Cu / Low-K处理期间通过改变介电层/金属膜堆叠层的宏观级应力降低
公开(公告)号：US07531442B2
公开(公告)日：2009-05-12
申请号：US11290087
申请日：2005-11-30
申请人： Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Sey-Shing Sun , Hong Ying , Chiyi Kao , Peter Burke , Ramaswamy Ranganathan , Qwai Low
发明人： Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Sey-Shing Sun , Hong Ying , Chiyi Kao , Peter Burke , Ramaswamy Ranganathan , Qwai Low
IPC分类号： H01L21/44
CPC分类号： H01L21/76801 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05556 , H01L2224/05624 , H01L2224/45124 , H01L2224/45144 , H01L2224/48453 , H01L2224/48463 , H01L2224/48507 , H01L2224/48624 , H01L2224/48724 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/05042 , H01L2924/181 , H01L2924/351 , H01L2924/00
摘要： Different ways to reduce or eliminate the IMC cracking issues in wire bonded parts, including: changing to more compressive dielectric films for top, R1, and R2; changing the top passivation film stacks to more compressive films; changing the low k film to a higher compressive film; reducing the R layer thickness and pattern density to reduce tensile stress; and minimizing anneal and dielectric deposition temperatures. Each of the methods can be used individually or in combination with each other to reduce overall tensile stresses in the Cu/low-k wafer thus reducing or eliminating the IMC cracking issue currently seen in the post wire bonded parts.
摘要翻译：减少或消除电线接合部件中IMC裂纹问题的不同方式，包括：更换为顶部，R1和R2的更多压电绝缘膜; 将顶部钝化膜堆叠更改为更多的压缩膜; 将低k膜改为较高的压缩膜; 降低R层厚度和图案密度以降低拉伸应力; 并最小化退火和介电沉积温度。每个方法可以单独使用或彼此组合使用以减少Cu / low-k晶片中的总拉伸应力，从而减少或消除了现在在后引线接合部件中看到的IMC裂纹问题。

5. 发明授权

US07205673B1 Reduce or eliminate IMC cracking in post wire bonded dies by doping aluminum used in bond pads during Cu/Low-k BEOL processing 有权
标题翻译：在Cu / Low-k BEOL处理过程中，通过掺杂在焊盘中使用的铝来减少或消除后引线键合模具中的IMC裂纹
公开(公告)号：US07205673B1
公开(公告)日：2007-04-17
申请号：US11283044
申请日：2005-11-18
申请人： Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Sey-Shing Sun , Hong Ying , Chiyi Kao
发明人： Jayanthi Pallinti , Dilip Vijay , Hemanshu Bhatt , Sey-Shing Sun , Hong Ying , Chiyi Kao
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53219 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05147 , H01L2224/05624 , H01L2224/45144 , H01L2224/48453 , H01L2224/48463 , H01L2224/48507 , H01L2224/48624 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A bond pad structure which includes an aluminum bond pad which include one or more dopants that effectively control the growth of IMC to a nominal level in spite of high tensile stresses in the wafer. For example, aluminum can be doped with 1–2 atomic % of Mg. Alternatively, Pd or Si can be used, or elements like Cu or Si can be used as the dopant in order to reduce the overall tensile stresses in the wafer. This can control the abnormal growth of IMC, thus arresting the IMC crack formation. A combination of dopants can be used to both control the tensile stresses and also slightly alter the gold-Aluminum interface thus enabling a uniform and thin IMC formation. This tends to reduce or eliminate any voiding or cracking which would otherwise occur at the wire bond transfer.
摘要翻译：一种接合焊盘结构，其包括铝接合焊盘，其包括一个或多个掺杂剂，其有效地将IMC的生长控制到标称电平，尽管晶片中存在高拉伸应力。例如，铝可以掺杂1-2原子％的Mg。或者，可以使用Pd或Si，或者可以使用诸如Cu或Si的元素作为掺杂剂，以便降低晶片中的整体拉伸应力。这可以控制IMC的异常生长，从而阻止IMC裂纹形成。可以使用掺杂剂的组合来控制拉伸应力并且还稍微改变金 - 铝界面，从而实现均匀和薄的IMC形成。这倾向于减少或消除否则在引线键合转移时会发生的任何空隙或裂纹。

6. 发明授权

US08552560B2 Alternate pad structures/passivation inegration schemes to reduce or eliminate IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing 有权
标题翻译：在Cu / Low-K BEOL处理期间，替代焊盘结构/钝化整合方案以减少或消除后引线键合模具中的IMC裂纹
公开(公告)号：US08552560B2
公开(公告)日：2013-10-08
申请号：US11283219
申请日：2005-11-18
申请人： Hemanshu Bhatt , Dilip Vijay , Jayanthi Pallinti , Sey-Shing Sun , Hong Ying , Chiyi Kao
发明人： Hemanshu Bhatt , Dilip Vijay , Jayanthi Pallinti , Sey-Shing Sun , Hong Ying , Chiyi Kao
IPC分类号： H01L21/31
CPC分类号： H05K1/0271 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05009 , H01L2224/05073 , H01L2224/05553 , H01L2224/05556 , H01L2224/05558 , H01L2224/05624 , H01L2224/05647 , H01L2224/45144 , H01L2224/48453 , H01L2224/48463 , H01L2224/48507 , H01L2224/48624 , H01L2224/48647 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/05042 , H01L2924/181 , H01L2924/351 , H05K3/107 , Y10T428/12396 , H01L2924/00014 , H01L2924/00
摘要： Passivation integration schemes and pad structures to reduce the stress gradients and/or improve the contact surface existing between the Al in the pad and the gold wire bond. One of the pad structures provides a plurality of recessed pad areas which are formed in a single aluminum pad. An oxide mesa can be provided under the aluminum pad. Another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a copper pad and a plurality of trench/via pads. Still another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a portion of a copper pad, such that the aluminum pad and the copper pad are staggered relative to each other.
摘要翻译：钝化整合方案和焊盘结构以减少应力梯度和/或改善焊盘中的Al和金线键之间存在的接触表面。垫结构之一提供了形成在单个铝垫中的多个凹陷区域。可以在铝垫下方设置氧化物台面。另一个垫结构提供形成在单个铝垫中的单个凹陷区域，并且铝垫设置在铜焊盘和多个沟槽/通孔焊盘之上。另一个衬垫结构提供形成在单个铝垫中的单个凹陷区域，并且铝垫设置在铜垫的一部分上方，使得铝垫和铜垫相对于彼此交错。

7. 发明申请

US20070114667A1 Alternate pad structures/passivation inegration schemes to reduce or eliminate IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing 有权
标题翻译：在Cu / Low-K BEOL处理期间，替代焊盘结构/钝化整合方案以减少或消除后引线键合模具中的IMC裂纹
公开(公告)号：US20070114667A1
公开(公告)日：2007-05-24
申请号：US11283219
申请日：2005-11-18
申请人： Hemanshu Bhatt , Dilip Vijay , Jayanthi Pallinti , Sey-Shing Sun , Hong Ying , Chiyi Kao
发明人： Hemanshu Bhatt , Dilip Vijay , Jayanthi Pallinti , Sey-Shing Sun , Hong Ying , Chiyi Kao
IPC分类号： H01L23/52
CPC分类号： H05K1/0271 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05009 , H01L2224/05073 , H01L2224/05553 , H01L2224/05556 , H01L2224/05558 , H01L2224/05624 , H01L2224/05647 , H01L2224/45144 , H01L2224/48453 , H01L2224/48463 , H01L2224/48507 , H01L2224/48624 , H01L2224/48647 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/04953 , H01L2924/05042 , H01L2924/181 , H01L2924/351 , H05K3/107 , Y10T428/12396 , H01L2924/00014 , H01L2924/00
摘要： Passivation integration schemes and pad structures to reduce the stress gradients and/or improve the contact surface existing between the Al in the pad and the gold wire bond. One of the pad structures provides a plurality of recessed pad areas which are formed in a single aluminum pad. An oxide mesa can be provided under the aluminum pad. Another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a copper pad and a plurality of trench/via pads. Still another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a portion of a copper pad, such that the aluminum pad and the copper pad are staggered relative to each other.
摘要翻译：钝化整合方案和焊盘结构以减少应力梯度和/或改善焊盘中的Al和金线键之间存在的接触表面。垫结构之一提供了形成在单个铝垫中的多个凹陷区域。可以在铝垫下方设置氧化物台面。另一个垫结构提供形成在单个铝垫中的单个凹陷区域，并且铝垫设置在铜焊盘和多个沟槽/通孔焊盘之上。另一个衬垫结构提供形成在单个铝垫中的单个凹陷区域，并且铝垫设置在铜垫的一部分上方，使得铝垫和铜垫相对于彼此交错。

8. 发明申请

US20050224358A1 Method for improved local planarity control during electropolishing 审中-公开
标题翻译：在电抛光过程中改进局部平面度控制的方法
公开(公告)号：US20050224358A1
公开(公告)日：2005-10-13
申请号：US10814059
申请日：2004-03-30
申请人： Byung-Sung Kwak , Jayanthi Pallinti , Sey-Shing Sun , William Barth , Wilbur Catabay
发明人： Byung-Sung Kwak , Jayanthi Pallinti , Sey-Shing Sun , William Barth , Wilbur Catabay
IPC分类号： C25D3/02 , C25D5/02 , C25D5/18 , C25D7/12 , C25D17/00 , H01L21/288 , H01L21/321 , H01L21/768
CPC分类号： H01L21/7684 , C25D3/02 , C25D5/18 , C25D7/123 , C25D17/001 , H01L21/2885 , H01L21/32115 , H01L21/76877
摘要： A metal layer formed on a semiconductor wafer is planarized by applying sequentially a deplating step, a plating step, and a relaxation step in a removal cycle. A series of cycles are performed sequentially in one embodiment to comprise a pass. The removal cycle is repeated in sequence until the pass is completed. The respective deplating and plating rates are adjusted so that the ratios of deplating rates to plating rates progressively decrease from an initial pass to a final pass. Organic additives are added to the electrolytic plating solution to control the plating portion of the cycle in a topography dependant fashion.
摘要翻译：通过在去除循环中依次应用脱铝步骤，电镀步骤和弛豫步骤来平坦化在半导体晶片上形成的金属层。在一个实施例中，顺序执行一系列循环以包括通过。删除循环按顺序重复，直到通过完成。调整各自的脱镀和电镀速率，使得脱铝速率与电镀速率的比率从初始通过到最终通过逐渐降低。将有机添加剂添加到电解电镀溶液中以以地形依赖的方式控制循环的电镀部分。

9. 发明授权

US06586326B2 Metal planarization system 失效
公开(公告)号：US06586326B2
公开(公告)日：2003-07-01
申请号：US09804783
申请日：2001-03-13
申请人： Jayanthi Pallinti , Samuel V. Dunton , Ronald J. Nagahara
发明人： Jayanthi Pallinti , Samuel V. Dunton , Ronald J. Nagahara
IPC分类号： H01L2100
CPC分类号： H01L21/288 , H01L21/7684
摘要： A method for restoring an eroded portion in an exposed upper surface cavity of a metallic element in a microelectronic device, where the metallic element has a hardness, and the metallic element is laterally surrounded by lateral elements, where at least one structure within the lateral elements has a hardness that is greater than the hardness of the metallic element. A precursor material is deposited in at least the cavity of the upper surface of the metallic element. The precursor material is deposited to a thickness that at least fills the cavity of the upper surface of the metallic element. The precursor material has a hardness that is less than the hardness of the at least one structure within the lateral elements. The precursor material is removed as necessary from the lateral elements, and the precursor material is planarized. Only the precursor material within the cavity of the upper surface of the metallic element is selectively replaced with a desired material. The eroded portion of the metallic element is thereby restored. By removing precursor material from those areas in which no replacement with the desired material is wanted, the desired material is selectively deposited only in those place where the precursor material remains, and where it is desired to fill in the cavities or dishing that was created in the areas of the softer metallic elements between the harder laterally surrounding elements during a prior chemical mechanical polishing process. Thus, the microelectronic device is more fully planarized, as the dishing is filled in, and the metallic element is supplemented with an additional amount of desired material.

10. 发明授权

US06439981B1 Arrangement and method for polishing a surface of a semiconductor wafer 有权
标题翻译：用于抛光半导体晶片的表面的布置和方法
公开(公告)号：US06439981B1
公开(公告)日：2002-08-27
申请号：US09750639
申请日：2000-12-28
申请人： Jayanthi Pallinti , Ron Nagahara
发明人： Jayanthi Pallinti , Ron Nagahara
IPC分类号： B24B100
CPC分类号： B24B37/345 , B24B37/20
摘要： An arrangement for polishing a semiconductor wafer is disclosed. The arrangement includes a plurality of preassembled polishing pad assemblies which can be selectively coupled to, and decoupled from, an actuating mechanism for rotating the polishing pad assemblies. An associated method of polishing a semiconductor wafer is also disclosed.
摘要翻译：公开了一种用于抛光半导体晶片的装置。该装置包括多个预组装的抛光垫组件，其可以选择性地联接到用于旋转抛光垫组件的致动机构和从其去除。还公开了一种抛光半导体晶片的相关方法。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式