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1. 发明授权

US5884835A Ultrasonic bonding method and ultrasonic bonding apparatus 失效
标题翻译：超声波接合法和超声波接合装置
公开(公告)号：US5884835A
公开(公告)日：1999-03-23
申请号：US686538
申请日：1996-07-26
申请人： Ryoichi Kajiwara , Toshiyuki Takahashi , Kazuya Takahashi , Masahiro Koizumi , Hiroshi Watanabe , Yukiharu Akiyama
发明人： Ryoichi Kajiwara , Toshiyuki Takahashi , Kazuya Takahashi , Masahiro Koizumi , Hiroshi Watanabe , Yukiharu Akiyama
IPC分类号： H01L21/607 , B23K20/00 , H01L21/60
CPC分类号： H01L24/85 , B23K20/007 , H01L24/03 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05624 , H01L2224/45015 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/78301 , H01L2224/85099 , H01L2224/85205 , H01L24/45 , H01L24/78 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01079 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/20303 , H01L2924/20304 , H01L2924/20305 , H01L2924/20306 , H01L2924/20307 , H01L2924/20308 , H01L2924/20753
摘要： In a case of ultrasonic bonding of a bonding wire to a metal pad provided on a semiconductor substrate, the vibration amplitude of a tip end of the bonding tool is set to be smaller than the film thickness of the metal pad, and the vibration frequency of the bonding tool is set to be higher than 70 kHz. According physical damage, such as cracks produced in a portion beneath the metal pad, can be prevented.
摘要翻译：在将接合线超声波接合到设置在半导体基板上的金属焊盘的情况下，将接合工具的前端的振动振幅设定为小于金属焊盘的膜厚，振动频率接合工具设定为高于70kHz。可以防止物理损坏，例如在金属垫下面的部分产生的裂纹。

2. 发明申请

US20070096332A1 Electronic component, module, module assembling method, module identification method and module environment setting method 审中-公开
标题翻译：电子元件，模块，模块组装方法，模块识别方法和模块环境设置方法
公开(公告)号：US20070096332A1
公开(公告)日：2007-05-03
申请号：US10558269
申请日：2004-05-28
申请人： Tomotoshi Satoh , Yoshihiko Nemoto , Kenji Takahashi , Yukiharu Akiyama
发明人： Tomotoshi Satoh , Yoshihiko Nemoto , Kenji Takahashi , Yukiharu Akiyama
IPC分类号： H01L23/52
CPC分类号： H01L24/06 , H01L23/481 , H01L25/0657 , H01L29/0657 , H01L2224/0401 , H01L2224/05554 , H01L2224/16 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2225/06562 , H01L2225/06593 , H01L2924/01004 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01055 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/10155 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/3011
摘要： An electronic component capable of being assembled into a module in the form of a stack of a plurality of layers is provided. Terminals of terminal groups (31 to 36) are formed so as to have rotational symmetry of a predetermined fold-number or have rotational symmetry and symmetry with respect to the plane containing a symmetric axis line. The terminals (A0 to A7, RFCG) of common connection terminal groups (32, 36) have connecting portions formed on the both surfaces in a stacking direction. Among the terminals of individual connection terminal groups (31, 33), a specific terminal CS; KEY has a connection portion formed at least on one of the both surfaces in the stacking direction while the remaining associated terminals NC; DMY have connection portions formed on the both surfaces in the stacking direction. When such electronic components (20) are stacked so as to be shifted from each other by the angle obtained by dividing 360 degrees by the predetermined fold-number or in addition in the inverted state, it is possible to assemble a module using the electronic components (20) having the same configuration.
摘要翻译：提供能够组装成多层叠层形式的模块的电子部件。端子组（31〜36）的端子形成为具有预定折叠数的旋转对称，或者相对于包含对称轴线的平面具有旋转对称性和对称性。公共连接端子组（32,36）的端子（A 0〜A 7，RFCG）具有在层叠方向上形成在两面的连接部。在各个连接端子组（31,33）的端子中，具体端子CS; KEY具有在层叠方向上形成在两个表面中的至少一个上的连接部分，而剩余的关联端子NC; DMY在层叠方向的两面形成有连接部。当这样的电子部件（20）被堆叠以便以360度除以预定的折叠数，或者在倒置状态下相互偏移所获得的角度时，可以使用电子部件（20）具有相同的构造。

3. 发明授权

US06472727B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US06472727B2
公开(公告)日：2002-10-29
申请号：US09771648
申请日：2001-01-30
申请人： Chuichi Miyazaki , Yukiharu Akiyama , Masanori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe
发明人： Chuichi Miyazaki , Yukiharu Akiyama , Masanori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe
IPC分类号： H01L23495
CPC分类号： H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/06136 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48465 , H01L2224/48472 , H01L2224/50 , H01L2224/73215 , H01L2224/85951 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , Y10T29/4913 , Y10T29/49169 , H01L2924/20753 , H01L2224/05599
摘要： A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

4. 发明授权

US06353255B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US06353255B2
公开(公告)日：2002-03-05
申请号：US09764378
申请日：2001-01-19
申请人： Chuichi Miyazaki , Yukiharu Akiyama , Masanori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe
发明人： Chuichi Miyazaki , Yukiharu Akiyama , Masanori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe
IPC分类号： H01L23435
CPC分类号： H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/06136 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48465 , H01L2224/48472 , H01L2224/50 , H01L2224/73215 , H01L2224/85951 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , Y10T29/4913 , Y10T29/49169 , H01L2924/20753 , H01L2224/05599
摘要： A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

5. 发明授权

US06342726B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US06342726B2
公开(公告)日：2002-01-29
申请号：US09449834
申请日：1999-11-26
申请人： Chuichi Miyazaki , Yukiharu Akiyama , Masanori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe
发明人： Chuichi Miyazaki , Yukiharu Akiyama , Masanori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe
IPC分类号： H01L23495
CPC分类号： H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/06136 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48465 , H01L2224/48472 , H01L2224/50 , H01L2224/73215 , H01L2224/85951 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , Y10T29/4913 , Y10T29/49169 , H01L2924/20753 , H01L2224/05599
摘要： A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

6. 发明授权

US08404586B2 Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08404586B2
公开(公告)日：2013-03-26
申请号：US11635044
申请日：2006-12-07
申请人： Kazumasa Tanida , Mitsuo Umemoto , Yukiharu Akiyama
发明人： Kazumasa Tanida , Mitsuo Umemoto , Yukiharu Akiyama
IPC分类号： H01L21/44
CPC分类号： H01L25/0657 , H01L23/481 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/05008 , H01L2224/05009 , H01L2224/05026 , H01L2224/05147 , H01L2224/1134 , H01L2224/13021 , H01L2224/13025 , H01L2224/13144 , H01L2224/16145 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73207 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2225/06582 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/12041 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface side connection member which protrudes from the front surface, and a rear surface side connection member which has a joining surface within a recess that is formed in a rear surface; the step of preparing a solid state device where a solid state device side connection member for connection to the front surface side connection member is formed on one surface; and the joining step of making the front surface of the semiconductor chip face the first surface of the solid state device by holding the rear surface of the semiconductor chip, and of joining the front surface side connection member to the solid state device side connection member.
摘要翻译：半导体装置的制造方法包括：准备半导体芯片的步骤，该半导体芯片设置有形成在半导体基板的正面侧的功能元件，放置在贯通半导体基板的通孔内的馈通电极，从前表面突出的前表面侧连接构件和在形成在后表面的凹部内具有接合表面的后表面侧连接构件; 制备固态器件的步骤，其中在一个表面上形成用于连接到前表面侧连接部件的固态器件侧连接部件; 并且通过保持半导体芯片的后表面并将前表面侧连接构件接合到固态器件侧连接构件，使半导体芯片的前表面面向固态器件的第一表面的接合步骤。

7. 发明申请

US20070080457A1 Manufacturing method for semiconductor device, semiconductor device and semiconductor chip 有权
标题翻译：半导体器件，半导体器件和半导体芯片的制造方法
公开(公告)号：US20070080457A1
公开(公告)日：2007-04-12
申请号：US11635044
申请日：2006-12-07
申请人： Kazumasa Tanida , Mitsuo Umemoto , Yukiharu Akiyama
发明人： Kazumasa Tanida , Mitsuo Umemoto , Yukiharu Akiyama
IPC分类号： H01L21/00 , H01L21/44 , H01L23/48
CPC分类号： H01L25/0657 , H01L23/481 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/05008 , H01L2224/05009 , H01L2224/05026 , H01L2224/05147 , H01L2224/1134 , H01L2224/13021 , H01L2224/13025 , H01L2224/13144 , H01L2224/16145 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73207 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2225/06582 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/12041 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface side connection member which protrudes from the front surface, and a rear surface side connection member which has a joining surface within a recess that is formed in a rear surface; the step of preparing a solid state device where a solid state device side connection member for connection to the front surface side connection member is formed on one surface; and the joining step of making the front surface of the semiconductor chip face the first surface of the solid state device by holding the rear surface of the semiconductor chip, and of joining the front surface side connection member to the solid state device side connection member.
摘要翻译：半导体装置的制造方法包括：准备半导体芯片的步骤，该半导体芯片设置有形成在半导体基板的正面侧的功能元件，放置在贯通半导体基板的通孔内的馈通电极，从前表面突出的前表面侧连接构件和在形成在后表面的凹部内具有接合表面的后表面侧连接构件; 制备固态器件的步骤，其中在一个表面上形成用于连接到前表面侧连接部件的固态器件侧连接部件; 并且通过保持半导体芯片的后表面并将前表面侧连接构件接合到固态器件侧连接构件，使半导体芯片的前表面面向固态器件的第一表面的接合步骤。

8. 发明授权

US07091620B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US07091620B2
公开(公告)日：2006-08-15
申请号：US11116209
申请日：2005-04-28
申请人： Chuichi Miyazaki , Yukiharu Akiyama , Masnori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Hiroshi Koyama , Akira Nagai , Masahiko Ogino
发明人： Chuichi Miyazaki , Yukiharu Akiyama , Masnori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Hiroshi Koyama , Akira Nagai , Masahiko Ogino
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/50 , H01L23/3114 , H01L23/3128 , H01L23/49572 , H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L24/06 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/06136 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/48465 , H01L2224/50 , H01L2224/85951 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00015 , H01L2224/05599
摘要： A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

9. 发明申请

US20050199946A1 Semiconductor memory device and manufacturing method thereof 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20050199946A1
公开(公告)日：2005-09-15
申请号：US11077233
申请日：2005-03-11
申请人： Kazuhiro Hata , Shinichi Sato , Yukiharu Akiyama
发明人： Kazuhiro Hata , Shinichi Sato , Yukiharu Akiyama
IPC分类号： H01L21/8247 , H01L21/336 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/0847 , H01L21/26586 , H01L27/11568 , H01L29/66825
摘要： A manufacturing method of a semiconductor memory device comprising the steps of: forming plural trenches in stripes in a semiconductor substrate and filling each of the trenches with an element isolation insulating film to form element isolation regions; sequentially forming a tunnel insulating film and a charge-storable film so as to cover active regions between the element isolation regions; forming an interlayer insulating film on the charge-storable film; forming plural control gates on the interlayer insulating film in a direction orthogonal to a longitudinal direction of the trenches; among source formation regions and drain formation regions alternately provided between the plural control gates, etching the element isolation insulating film in the source formation regions, using as a mask a resist film having openings in the source formation regions, to expose surfaces of the trenches; and carrying out isotropic plasma ion implantation on the source formation regions to form source diffusion layers in the surfaces of the trenches and in the active regions.
摘要翻译：一种半导体存储器件的制造方法，包括以下步骤：在半导体衬底中形成条纹中的多个沟槽，并用元件隔离绝缘膜填充每个沟槽以形成元件隔离区域; 依次形成隧道绝缘膜和电荷存储膜，以覆盖元件隔离区之间的有源区; 在电荷存储膜上形成层间绝缘膜; 在与所述沟槽的纵向正交的方向上在所述层间绝缘膜上形成多个控制栅极; 在多个控制栅极之间交替设置的源极形成区域和漏极形成区域之间，在源极形成区域中蚀刻元件隔离绝缘膜，使用在源极形成区域中具有开口的抗蚀剂膜作为掩模来暴露沟槽的表面; 并在源极形成区域上进行各向同性等离子体离子注入，以在沟槽表面和活性区域中形成源极扩散层。

10. 发明授权

US06515371B2 Semiconductor device with elastic structure and wiring 有权
标题翻译：具有弹性结构和布线的半导体器件
公开(公告)号：US06515371B2
公开(公告)日：2003-02-04
申请号：US09983177
申请日：2001-10-23
申请人： Yukiharu Akiyama , Tomoaki Kudaishi , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Asao Nishimura , Ichiro Anjo , Kunihiro Tsubosaki , Chuichi Miyazaki , Hiroshi Koyama , Masanori Shibamoto , Akira Nagai , Masahiko Ogino
发明人： Yukiharu Akiyama , Tomoaki Kudaishi , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Asao Nishimura , Ichiro Anjo , Kunihiro Tsubosaki , Chuichi Miyazaki , Hiroshi Koyama , Masanori Shibamoto , Akira Nagai , Masahiko Ogino
IPC分类号： H01L2348
CPC分类号： H01L24/50 , H01L23/3114 , H01L23/49572 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/1433 , H01L2924/3025
摘要： A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.
摘要翻译：一种半导体器件，包括在其主表面的周边部分中具有连接端子的半导体芯片; 设置在主表面上的弹性体，使连接端子露出; 绝缘带，形成在弹性体上并且在连接端子所在的区域中具有开口; 多个引线形成在绝缘带的顶表面上，每个引线的一端连接到一个连接端子，另一端设置在弹性体上; 形成在多个引线的另一端上的多个凸起电极; 以及用于密封连接端子和每个引线的一端的树脂体，其中绝缘带突出超过设置有多个连接端子的芯片，并且其中树脂体的形状受到绝缘胶带

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