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1. 发明申请

US20080094405A1 SCALABLE SHADER ARCHITECTURE 有权
标题翻译：可分级阴影架构
公开(公告)号：US20080094405A1
公开(公告)日：2008-04-24
申请号：US11957358
申请日：2007-12-14
申请人： Rui BASTOS , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
发明人： Rui BASTOS , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
IPC分类号： G06F15/80
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译：公开了可扩展着色器架构。根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。着色器包括着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管线，有利于平衡工作负载。着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。

2. 发明申请

US20050225554A1 Scalable shader architecture 有权
标题翻译：可扩展着色器架构
公开(公告)号：US20050225554A1
公开(公告)日：2005-10-13
申请号：US10938042
申请日：2004-09-10
申请人： Rui Bastos , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
发明人： Rui Bastos , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
IPC分类号： G06T15/00 , G06F15/80 , G06T1/20
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译：公开了可扩展着色器架构。根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。着色器包括一个着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管道，有利于平衡工作负载。着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。

3. 发明授权

US06980208B1 System and method for enhancing depth value processing in a graphics pipeline 有权
标题翻译：用于在图形管线中增强深度值处理的系统和方法
公开(公告)号：US06980208B1
公开(公告)日：2005-12-27
申请号：US10234977
申请日：2002-09-03
申请人： John Montrym , Jonah M. Alben , Sean Treichler , John M. Danskin , Gary Tarolli
发明人： John Montrym , Jonah M. Alben , Sean Treichler , John M. Danskin , Gary Tarolli
IPC分类号： G06T15/00
CPC分类号： G06T15/005
摘要： A system, method and computer program product are provided for performing depth testing and blending operations in a first mode and a second mode. In the first mode, a circuit processes a first number (m) of first pixels per clock cycle, each of the first pixels including both color values and depth values. In the second mode, the circuit processes a second number (n) of second pixels per clock cycle. Each of the second pixels includes the depth values and not the color values. Further, the second number (n) is greater than the first number (m).
摘要翻译：提供了一种用于在第一模式和第二模式下执行深度测试和混合操作的系统，方法和计算机程序产品。在第一模式中，电路处理每个时钟周期的第一数量（m）的第一像素，每个第一像素包括颜色值和深度值。在第二模式中，电路处理每个时钟周期的第二数量（n）个第二像素。每个第二像素包括深度值而不是颜色值。此外，第二数（n）大于第一数（m）。

4. 发明授权

US06677953B1 Hardware viewport system and method for use in a graphics pipeline 有权
标题翻译：用于图形管道的硬件视口系统和方法
公开(公告)号：US06677953B1
公开(公告)日：2004-01-13
申请号：US10005826
申请日：2001-11-08
申请人： Kirk E. Twardowski , Gary Tarolli
发明人： Kirk E. Twardowski , Gary Tarolli
IPC分类号： G06F1500
CPC分类号： G06T1/20
摘要： A system and method are provided for a dedicated hardware-implemented viewport operation in a graphics pipeline. Included is a transform/lighting module for transforming and lighting vertex data. Also provided is viewport hardware coupled to the transform/lighting module for performing a viewport operation on the vertex data. A rasterizer is coupled to the viewport hardware for rendering the vertex data.
摘要翻译：提供了一种在图形管线中进行专用硬件实现的视口操作的系统和方法。包括用于转换和照明顶点数据的变换/照明模块。还提供了耦合到变换/照明模块的视口硬件，用于对顶点数据执行视口操作。光栅化器耦合到视口硬件以渲染顶点数据。

5. 发明授权

US5822452A System and method for narrow channel compression 失效
标题翻译：窄通道压缩的系统和方法
公开(公告)号：US5822452A
公开(公告)日：1998-10-13
申请号：US641208
申请日：1996-04-30
申请人： Gary Tarolli , Scott Sellers , James E. Margeson, III , Murali Sundaresan
发明人： Gary Tarolli , Scott Sellers , James E. Margeson, III , Murali Sundaresan
IPC分类号： G06T9/00 , H04N7/26 , G06K9/00
CPC分类号： G06T9/002 , H04N19/00
摘要： A system and method for compressing and decompressing a texture image that: (1) compresses each texel to 8 bits, and when decompressed, each texel is of a quality comparable to a 256 color palettized image; (2) increases the efficiency of the decompression system and method by eliminating complex operations, e.g., multiplication; and (3) increases the efficiency of the system and method when switching between textures that use different palettes, when compared to conventional system and methods. The invention compresses a texture image, stores the compressed texture image, and quickly and efficiently decompresses the texture image when determining a value of a pixel. The texture image compression technique utilizes a palletized color space that more closely matches the colors in the texture image while allocating an unequal number of bits to the color channels. Each texel in the texture image is converted to an 8-bit value in the selected color space, and a decompression table is generated that represents the RGB values for the each texel stored in the selected color space. In order to map the texture image to the object, one or more texels that are associated with each pixel are decompressed. The present invention quickly and efficiently decompresses each texel using a hardware decompression unit. The decompression unit does not perform any multiplication operations.
摘要翻译：一种用于压缩和解压缩纹理图像的系统和方法，所述纹理图像：（1）将每个纹素压缩为8位，并且当解压缩时，每个纹素具有与256色调色图像相当的质量; （2）通过消除复杂操作（例如乘法）来提高减压系统和方法的效率; 和（3）当与常规系统和方法相比时，在切换使用不同调色板的纹理之间时，提高了系统和方法的效率。本发明压缩纹理图像，存储压缩的纹理图像，并且在确定像素的值时快速有效地解压纹理图像。纹理图像压缩技术利用与纹理图像中的颜色更接近匹配的码垛颜色空间，同时向颜色通道分配不等位数。纹理图像中的每个纹素被转换为所选颜色空间中的8位值，并且生成表示存储在所选颜色空间中的每个纹素的RGB值的解压缩表。为了将纹理图像映射到对象，与每个像素相关联的一个或多个纹素被解压缩。本发明使用硬件解压缩单元快速有效地解压缩每个纹素。解压缩单元不执行任何乘法运算。

6. 发明授权

US06088701A Command data transport to a graphics processing device from a CPU performing write reordering operations 失效
标题翻译：命令数据从执行写入重排序操作的CPU传送到图形处理装置
公开(公告)号：US06088701A
公开(公告)日：2000-07-11
申请号：US970567
申请日：1997-11-14
申请人： Kenneth M. Whaley , Gary Tarolli
发明人： Kenneth M. Whaley , Gary Tarolli
IPC分类号： G06F3/14 , G09G5/393 , G06F17/30
CPC分类号： G09G5/393 , G06F3/14 , Y10S707/99943
摘要： A system and method for enabling a graphics processor to operate with a CPU that reorders write instructions without requiring expensive hardware and which does not significantly reduce the performance of the driver operating on the CPU. The invention allows the graphics processor to evaluate the data sent to it by software running on the CPU in its intended and proper order, even if the CPU transmits the data to the graphics processor in an order different from that generated by the software. The invention works regardless of the particular write reordering technique used by the CPU, and is a very low-cost addition to the graphics processor, requiring only a few registers and a small state machine. The invention identifies the number of "holes" in the reordered write instructions and when the number of holes becomes zero a set of received data is made available for execution by the graphics processor.
摘要翻译：一种用于使图形处理器能够与CPU进行操作的系统和方法，所述CPU对写入指令进行重新排序，而不需要昂贵的硬件，并且不显着降低在CPU上操作的驱动程序的性能。本发明允许图形处理器以其预期和适当的顺序在CPU上运行的软件来评估其发送的数据，即使CPU以与软件生成的顺序不同的顺序将数据传输到图形处理器。无论CPU使用的特定写入重新排序技术如何，本发明都工作，并且是对图形处理器的非常低成本的补充，只需要少量寄存器和小型状态机。本发明识别重新排序的写入指令中的“孔”的数量，并且当孔的数量变为零时，一组接收的数据使得可用于由图形处理器执行。

7. 发明授权

US5831624A Level of detail texture filtering with dithering and mipmaps 失效
标题翻译：具有抖动和mipmap的细节纹理过滤级别
公开(公告)号：US5831624A
公开(公告)日：1998-11-03
申请号：US640450
申请日：1996-04-30
申请人： Gary Tarolli , Scott Sellers , James E. Margeson, III
发明人： Gary Tarolli , Scott Sellers , James E. Margeson, III
IPC分类号： G06T15/04 , G06T11/40
CPC分类号： G06T15/04
摘要： A high quality texture filtering technique in a computer hardware system. The texture filtering quality of the present invention is comparable to trilinear filtering. However, the present invention reduces the number of memory accesses by fifty percent in comparison to trilinear filtering. To achieve this result, the present invention determines a pixel value based upon one or more texel values, e.g., four texel values, from only one of two mipmap levels. The mipmap level that is used is based upon the fractional portion of the LOD value and the position of the pixel. For a group of pixels having the same LOD value, the present invention performs a dithering operation that results in some pixel values being determined using texel values from the lower level mipmap and the remaining pixel values being determined using texel values from the higher level mipmap. The percentage of pixel values that are determined using texel values from the higher level mipmap is proportional to the fractional portion of the LOD value.
摘要翻译：计算机硬件系统中的高质量纹理过滤技术。本发明的纹理滤波质量与三线性滤波相当。然而，与三线性滤波相比，本发明将存储器访问次数减少了百分之五十。为了实现该结果，本发明仅从两个mipmap级别中的一个确定基于一个或多个纹素值（例如，四个纹理值）的像素值。所使用的mipmap级别基于LOD值的小数部分和像素的位置。对于具有相同LOD值的一组像素，本发明执行导致使用来自较低级别映像的纹理值确定一些像素值的抖动操作，并且使用来自上级mipmap的纹素值来确定剩余像素值。使用来自较高级别mipmap的纹素值确定的像素值的百分比与LOD值的小数部分成比例。

8. 发明授权

US07634621B1 Register file allocation 有权
标题翻译：注册文件分配
公开(公告)号：US07634621B1
公开(公告)日：2009-12-15
申请号：US11556677
申请日：2006-11-03
申请人： Brett W. Coon , John Erik Lindholm , Gary Tarolli , Svetoslav D. Tzvetkov , John R. Nickolls , Ming Y. Siu
发明人： Brett W. Coon , John Erik Lindholm , Gary Tarolli , Svetoslav D. Tzvetkov , John R. Nickolls , Ming Y. Siu
IPC分类号： G06F12/00
CPC分类号： G06F9/3012 , G06F9/30123 , G06F9/3824 , G06F9/3851 , G06F9/3885 , G06F12/0223 , Y02D10/13
摘要： Circuits, methods, and apparatus that provide the die area and power savings of a single-ported memory with the performance advantages of a multiported memory. One example provides register allocation methods for storing data in a multiple-bank register file. In a thin register allocation method, data for a process is stored in a single bank. In this way, different processes use different banks to avoid conflicts. In a fat register allocation method, processes store data in each bank. In this way, if one process uses a large number of registers, those registers are spread among the banks, avoiding a situation where one bank is filled and other processes are forced to share a reduced number of banks. In a hybrid register allocation method, processes store data in more than one bank, but fewer than all the banks. Each of these methods may be combined in varying ways.
摘要翻译：提供具有多端口存储器性能优势的单端口存储器的管芯面积和功率节省的电路，方法和装置。一个示例提供用于将数据存储在多存储器寄存器文件中的寄存器分配方法。在一个薄的寄存器分配方法中，一个进程的数据被存储在一个单独的存储单元中。以这种方式，不同的流程使用不同的银行来避免冲突。在胖寄存器分配方法中，处理将数据存储在每个存储区中。这样一来，如果一个进程使用大量的寄存器，这些寄存器就会在银行之间传播，避免了一个银行被填满的情况，而其他进程被迫分担一个数量减少的银行。在混合寄存器分配方法中，处理将数据存储在多个银行中，但少于所有银行。这些方法中的每一种可以以不同的方式组合。

9. 发明授权

US5870102A Texture compositing apparatus and method 失效
标题翻译：纹理合成装置及方法
公开(公告)号：US5870102A
公开(公告)日：1999-02-09
申请号：US57329
申请日：1998-04-08
申请人： Gary Tarolli , Scott Sellers , James E. Margeson, III
发明人： Gary Tarolli , Scott Sellers , James E. Margeson, III
IPC分类号： G06T11/20 , G06T15/04 , G06T15/50 , G06T11/40
CPC分类号： G06T15/503 , G06T15/04
摘要： A texture compositing apparatus and method for combining multiple independent texture colors in a variety of ways in a single execution pass using a single texture compositing unit (TCU) per texture. The TCU receives a control signal, a blend factor, a local data signal(C.sub.local /A.sub.local) and an output data signal (C.sub.in /A.sub.in) generated by another TCU, the local data signal and the output data signal represent a texture color in a RGBA format. Based upon the control signal, the TCU can generate an output signal based on a variety of functions. The outputs that can be generated include but are not limited to: (1) zero; (2) one; (3) C.sub.in ; (4) C.sub.local ; (5) C.sub.in +C.sub.local ; (6) C.sub.in -C.sub.local ; (7) C.sub.in *C.sub.local ; (8) C.sub.in *C.sub.local +A.sub.local ; (9) C.sub.in *A.sub.local +C.sub.local ; (10) (C.sub.in -C.sub.local)* F.sub.blend +C.sub.local ; and (11) (C.sub.in -C.sub.local)*(1-F.sub.blend)+C.sub.local. Another feature of the invention is that multiple TCUs can be serially coupled to enable additional texture colors to be combined in a single execution path.
摘要翻译：一种纹理合成装置和方法，用于使用每个纹理的单个纹理合成单元（TCU）在单个执行遍历中以多种方式组合多个独立纹理颜色。 TCU接收由另一TCU生成的控制信号，混合因子，本地数据信号（Clocal / Alocal）和输出数据信号（Cin / Ain），本地数据信号和输出数据信号表示 RGBA格式。基于控制信号，TCU可以基于各种功能生成输出信号。可以生成的输出包括但不限于：（1）零; （2）一（3）Cin; （4）Clocal; （5）Cin + Clocal; （6）Cin-Clocal; （7）Cin * Clocal; （8）Cin * Clocal + Alocal; （9）Cin * Alocal + Clocal; （10）（Cin-Clocal）* Fblend + Clocal; 和（11）（Cin-Clocal）*（1-Fblend）+ Clocal。本发明的另一个特征是可以串联多个TCU以使得附加纹理颜色可以组合在单个执行路径中。

10. 发明授权

US5740343A Texture compositing apparatus and method 失效
标题翻译：纹理合成装置及方法
公开(公告)号：US5740343A
公开(公告)日：1998-04-14
申请号：US552740
申请日：1995-11-03
申请人： Gary Tarolli , Scott Sellers , James E. Margeson, III
发明人： Gary Tarolli , Scott Sellers , James E. Margeson, III
IPC分类号： G06T11/20 , G06T15/04 , G06T15/50 , G06T11/40
CPC分类号： G06T15/503 , G06T15/04
摘要： A texture compositing apparatus and method for combining multiple independent texture colors in a variety of ways in a single execution pass using a single texture compositing unit (TCU) per texture. The TCU receives a control signal, a blend factor, a local data signal(C.sub.local /A.sub.local), and an output data signal (C.sub.in /A.sub.in) generated by another TCU, the local data signal and the output data signal represent a texture color in a RGBA format. Based upon the control signal, the TCU can generate an output signal based on a variety of functions. The outputs that can be generated include but are not limited to: (1) zero; (2) one; (3) C.sub.in ; (4) C.sub.local ; (5) C.sub.in +C.sub.local ; (6) C.sub.in -C.sub.local ; (7) C.sub.in *C.sub.local ; (8) C.sub.in *C.sub.local +A.sub.local ; (9) C.sub.in *A.sub.local +C.sub.local ; (10) (C.sub.in -C.sub.local)*F.sub.blend +C.sub.local ; and (11) (C.sub.in -C.sub.local)*(1-F.sub.blend)+C.sub.local. Another feature of the invention is that multiple TCUs can be serially coupled to enable addition texture colors to be combined in a single execution path.
摘要翻译：一种纹理合成装置和方法，用于使用每个纹理的单个纹理合成单元（TCU）在单个执行遍历中以多种方式组合多个独立纹理颜色。 TCU接收由另一TCU生成的控制信号，混合因子，本地数据信号（Clocal / Alocal）和输出数据信号（Cin / Ain），本地数据信号和输出数据信号表示纹理颜色一种RGBA格式。基于控制信号，TCU可以基于各种功能生成输出信号。可以生成的输出包括但不限于：（1）零; （2）一（3）Cin; （4）Clocal; （5）Cin + Clocal; （6）Cin-Clocal; （7）Cin * Clocal; （8）Cin * Clocal + Alocal; （9）Cin * Alocal + Clocal; （10）（Cin-Clocal）* Fblend + Clocal; 和（11）（Cin-Clocal）*（1-Fblend）+ Clocal。本发明的另一个特征是可以将多个TCU串联耦合以使得能够在单个执行路径中组合附加纹理颜色。

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