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1. 发明申请

US20080094405A1 SCALABLE SHADER ARCHITECTURE 有权
标题翻译：可分级阴影架构
公开(公告)号：US20080094405A1
公开(公告)日：2008-04-24
申请号：US11957358
申请日：2007-12-14
申请人： Rui BASTOS , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
发明人： Rui BASTOS , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
IPC分类号： G06F15/80
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译：公开了可扩展着色器架构。根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。着色器包括着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管线，有利于平衡工作负载。着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。

2. 发明申请

US20050225554A1 Scalable shader architecture 有权
标题翻译：可扩展着色器架构
公开(公告)号：US20050225554A1
公开(公告)日：2005-10-13
申请号：US10938042
申请日：2004-09-10
申请人： Rui Bastos , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
发明人： Rui Bastos , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
IPC分类号： G06T15/00 , G06F15/80 , G06T1/20
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译：公开了可扩展着色器架构。根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。着色器包括一个着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管道，有利于平衡工作负载。着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。

3. 发明申请

US20060055695A1 Increased scalability in the fragment shading pipeline 有权
标题翻译：增加片段着色管道中的可扩展性
公开(公告)号：US20060055695A1
公开(公告)日：2006-03-16
申请号：US10940070
申请日：2004-09-13
申请人： Karim Abdalla , Emmett Kilgariff , Rui Bastos
发明人： Karim Abdalla , Emmett Kilgariff , Rui Bastos
IPC分类号： G06T15/50
CPC分类号： G06T11/40 , G06T15/005 , G06T15/50 , G06T15/80
摘要： A fragment processor includes a fragment shader distributor, a fragment shader collector, and a plurality of fragment shader pipelines. Each fragment shader pipeline executes a fragment shader program on a segment of fragments. The plurality of fragment shader pipelines operate in parallel, executing the same or different fragment shader programs. The fragment shader distributor receives a stream of fragments from a rasterization unit and dispatches a portion of the stream of fragments to a selected fragment shader pipeline until the capacity of the selected fragment shader pipeline is reached. The fragment shader distributor then selects another fragment shader pipeline. The capacity of each of the fragment shader pipelines is limited by several different resources. As the fragment shader distributor dispatches fragments, it tracks the remaining available resources of the selected fragment shader pipeline. A fragment shader collector retrieves processed fragments from the plurality of fragment shader pipelines.
摘要翻译：片段处理器包括片段着色器分配器，片段着色器收集器和多个片段着色器管线。每个片段着色器流水线在片段片段上执行片段着色器程序。多个片段着色器管线并行操作，执行相同或不同的片段着色程序。片段着色器分配器从光栅化单元接收片段流，并将片段流的一部分分派到所选择的片段着色器管线，直到达到所选片段着色器管线的容量。片段着色器分配器然后选择另一个片段着色器管道。每个片段着色器管道的容量受到几个不同的资源的限制。当片段着色器分配器调度片段时，它会跟踪所选片段着色器管道的剩余可用资源。片段着色器收集器从多个片段着色器管道中检索已处理的片段。

4. 发明申请

US20070257905A1 Optimizing a graphics rendering pipeline using early Z-mode 有权
标题翻译：使用早期Z模式优化图形渲染管道
公开(公告)号：US20070257905A1
公开(公告)日：2007-11-08
申请号：US11430635
申请日：2006-05-08
申请人： Mark French , Emmett Kilgariff , Steven Molnar , Walter Steiner , Douglas Voorhies , Adam Weitkemper
发明人： Mark French , Emmett Kilgariff , Steven Molnar , Walter Steiner , Douglas Voorhies , Adam Weitkemper
IPC分类号： G06T15/00
CPC分类号： G06T15/405 , G06T15/005
摘要： One embodiment of the present invention sets forth an architecture for optimizing graphics rendering efficiency by advancing the Z-test operation prior to pixel shading whenever possible. The current rendering state, as maintained by the setup engine, determines whether advancing the Z-test function above the shader engine for “early” Z-testing is possible or whether the Z-test function should be deferred until after shading operations for “late” Z-testing. Data is dynamically routed to each processing engine in the pipeline, so that the appropriate data flow for either early Z or late Z is dynamically constructed, as determined by the current rendering state. Efficiency is gained by relieving the shader engine of unnecessary work whenever possible by discarding pixels before they enter the shader engine. The same functional units are utilized in both early Z and late Z configurations, minimizing any additional hardware required for implementation.
摘要翻译：本发明的一个实施例提出了一种用于通过在可能的情况下在像素着色之前推进Z检验操作来优化图形渲染效率的架构。由设置引擎维护的当前呈现状态确定是否可以在着色引擎之上前进Z检验功能以进行“早期”Z检验，或者Z检验功能是否应该延迟到“晚期”的阴影操作之后 “Z测试。数据在流水线中动态地路由到每个处理引擎，以便由当前呈现状态确定的早期Z或后期Z的适当数据流是动态构造的。通过在进入着色引擎之前丢弃像素，尽可能地减轻不必要的工作的着色引擎来获得效率。早期Z和晚Z配置都使用相同的功能单元，从而最大限度地减少了实施所需的任何其他硬件。

5. 发明授权

US5999183A Apparatus for creating a scalable graphics system with efficient memory and bandwidth usage 失效
标题翻译：用于创建具有高效内存和带宽使用的可扩展图形系统的设备
公开(公告)号：US5999183A
公开(公告)日：1999-12-07
申请号：US891280
申请日：1997-07-10
申请人： Emmett Kilgariff , Philip Brown
发明人： Emmett Kilgariff , Philip Brown
IPC分类号： G06T15/00
CPC分类号： G06T15/00
摘要： A scalable, three-dimensional (3D) graphics subsystem. The graphics subsystem includes a plurality of graphics modules each including a rendering module and a dedicated memory. In one embodiment, the rendering modules of the graphics modules are coupled together, possibly through a routing device, such that each rendering module views the memory space, formed by all dedicated memory, as one continuous shared memory.
摘要翻译：可扩展的三维（3D）图形子系统。图形子系统包括多个图形模块，每个图形模块包括呈现模块和专用存储器。在一个实施例中，图形模块的渲染模块可能通过路由设备耦合在一起，使得每个渲染模块将由所有专用存储器形成的存储器空间视为一个连续的共享存储器。

6. 发明授权

US09477597B2 Techniques for different memory depths on different partitions 有权
标题翻译：不同分区上不同内存深度的技术
公开(公告)号：US09477597B2
公开(公告)日：2016-10-25
申请号：US13072020
申请日：2011-03-25
申请人： Brian Kelleher , Emmett Kilgariff
发明人： Brian Kelleher , Emmett Kilgariff
IPC分类号： G09G5/39 , G06F12/06 , G09G5/36 , G09G5/395 , G09G5/393 , G06T1/60
CPC分类号： G06F12/0607 , G06T1/60 , G09G5/363 , G09G5/39 , G09G5/393 , G09G5/395
摘要： Embodiments of the present technology are directed toward techniques for enabling different memory partitions to have different memory depths.
摘要翻译：本技术的实施例涉及使不同存储器分区具有不同存储器深度的技术。

7. 发明申请

US20120246379A1 TECHNIQUES FOR DIFFERENT MEMORY DEPTHS ON DIFFERENT PARTITIONS 有权
标题翻译：不同部分不同记忆深度的技术
公开(公告)号：US20120246379A1
公开(公告)日：2012-09-27
申请号：US13072020
申请日：2011-03-25
申请人： Brian Kelleher , Emmett Kilgariff
发明人： Brian Kelleher , Emmett Kilgariff
IPC分类号： G06F12/06
CPC分类号： G06F12/0607 , G06T1/60 , G09G5/363 , G09G5/39 , G09G5/393 , G09G5/395
摘要： Embodiments of the present technology are directed toward techniques for enabling different memory partitions to have different memory depths.
摘要翻译：本技术的实施例涉及使不同存储器分区具有不同存储器深度的技术。

8. 发明授权

US06314136B1 Method for performing wavelet-based image compaction losslessly and low bit precision requirements 失效
标题翻译：基于小波图像压缩的无损和低位精度要求的方法
公开(公告)号：US06314136B1
公开(公告)日：2001-11-06
申请号：US08905229
申请日：1997-08-01
申请人： Emmett Kilgariff
发明人： Emmett Kilgariff
IPC分类号： H04B166
CPC分类号： H04N19/186 , H04N19/10 , H04N19/13 , H04N19/61 , H04N19/63
摘要： A system and method used to perform lossless wavelet-based image transformations. In one embodiment, the method used for these transformations and for bit precision reduction. First, at least a luminance value is produced for each row of pixels of a selected pixel block. Next, a determination is made as to whether a luminance value associated with a particular row of pixels of the selected pixel block is positive. Thereafter, a reduced luminance value is produced when the luminance value is determined to be positive, the reduced luminance value is represented by a lesser number of bits than the luminance value. Finally, the second and third steps are continued for each luminance value associated with each row of the selected pixel block. The values are used in an iterative fashion to calculate the low and high spatial frequency and create graphics with minimal use of bandwidth.
摘要翻译：一种用于执行无损小波图像变换的系统和方法。在一个实施例中，用于这些变换的方法和位精度降低。首先，对于所选择的像素块的每行像素产生至少亮度值。接下来，确定与所选择的像素块的特定行像素相关联的亮度值是否为正。此后，当将亮度值确定为正时，产生降低的亮度值，减少的亮度值由比亮度值更少的比特数表示。最后，对于与所选择的像素块的每一行相关联的每个亮度值，继续第二和第三步骤。这些值以迭代的方式用于计算低和高空间频率，并以最少的带宽使用创建图形。

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