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1. 发明申请

US20100075488A1 CVD REACTOR WITH MULTIPLE PROCESSING LEVELS AND DUAL-AXIS MOTORIZED LIFT MECHANISM 审中-公开
标题翻译：具有多种加工水平和双轴电动机构的CVD反应器
公开(公告)号：US20100075488A1
公开(公告)日：2010-03-25
申请号：US12560073
申请日：2009-09-15
申请人： Richard O. Collins , Nyi O. Myo , Kevin J. Bautista , John S. Webb , Errol C. Sanchez , Yi-Chiau Huang , Kailash Kiran Patalay , Zhi Yuan Zhou , Wilson Yu
发明人： Richard O. Collins , Nyi O. Myo , Kevin J. Bautista , John S. Webb , Errol C. Sanchez , Yi-Chiau Huang , Kailash Kiran Patalay , Zhi Yuan Zhou , Wilson Yu
IPC分类号： H01L21/20 , C23C16/458
CPC分类号： H01L21/67115 , C23C16/45551 , H01L21/68742 , H01L21/68792
摘要： An apparatus for processing a substrate, comprising a processing chamber and a substrate support and lift pin assembly disposed within the chamber. The substrate support and lift pin assembly are coupled to a lift mechanism that controls positioning of the substrate support and the lift pins and provides rotation for the substrate support. The lift mechanism includes at least one sensor capable of generating a signal when clearance between the substrate support and the lift pins allows rotation of the substrate support to begin. The substrate support capable of concurrent axial motion and rotation may be used in a processing chamber comprising multiple processing zones separated by edge rings. Substrates may be subjected to successive or cyclical processes by moving between the multiple processing zones.
摘要翻译：一种用于处理衬底的装置，包括处理室和设置在腔室内的衬底支撑件和提升销组件。基板支撑和提升销组件联接到升降机构，该提升机构控制基板支撑件和升降销的定位并提供用于基板支撑件的旋转。提升机构包括至少一个传感器，当传感器支架和提升销之间的间隙允许基板支撑件的旋转开始时能产生信号。能够同时进行轴向运动和旋转的基板支撑件可用于包括由边缘环分开的多个处理区域的处理室。可以通过在多个处理区之间移动来对衬底进行连续或循环过程。

2. 发明授权

US08658540B2 Methods for low temperature conditioning of process chambers 有权
标题翻译：处理室低温调理方法
公开(公告)号：US08658540B2
公开(公告)日：2014-02-25
申请号：US13156082
申请日：2011-06-08
申请人： Yi-Chiau Huang , David K. Carlson , Errol Antonio C. Sanchez , Zhiyuan Ye
发明人： Yi-Chiau Huang , David K. Carlson , Errol Antonio C. Sanchez , Zhiyuan Ye
IPC分类号： H01L21/306 , B08B6/00 , B44C1/22
CPC分类号： H01L21/67115 , H01L21/68742
摘要： Methods for removing residue from interior surfaces of process chambers are provided herein. In some embodiments, a method of conditioning interior surfaces of a process chamber may include maintaining a process chamber at a first pressure and at a first temperature of less than about 800 degrees Celsius; providing a process gas to the process chamber at the first pressure and the first temperature, wherein the process gas comprises chlorine and nitrogen to remove residue disposed on interior surfaces of the process chamber; and increasing the pressure in the process chamber from the first pressure to a second pressure while continuing to provide the process gas to the process chamber.
摘要翻译：本文提供了从处理室内表面除去残留物的方法。在一些实施例中，调节处理室的内表面的方法可以包括将处理室保持在小于约800摄氏度的第一压力和第一温度; 在所述第一压力和所述第一温度下向所述处理室提供工艺气体，其中所述工艺气体包括氯和氮以除去设置在所述处理室的内表面上的残留物; 以及将处理室中的压力从第一压力增加到第二压力，同时继续向处理室提供处理气体。

3. 发明授权

US08647439B2 Method of epitaxial germanium tin alloy surface preparation 有权
标题翻译：外延锗锡合金表面处理方法
公开(公告)号：US08647439B2
公开(公告)日：2014-02-11
申请号：US13456500
申请日：2012-04-26
申请人： Errol Antonio C. Sanchez , Yi-Chiau Huang
发明人： Errol Antonio C. Sanchez , Yi-Chiau Huang
IPC分类号： H01L21/3065 , H01L21/306
CPC分类号： H01L21/02661 , H01L21/0245 , H01L21/02452 , H01L21/02532 , H01L21/02535 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/3065
摘要： Methods of preparing a clean surface of germanium tin or silicon germanium tin layers for subsequent deposition are provided. An overlayer of Ge, doped Ge, another GeSn or SiGeSn layer, a doped GeSn or SiGeSn layer, an insulator, or a metal can be deposited on a prepared GeSn or SiGeSn layer by positioning a substrate with an exposed germanium tin or silicon germanium tin layer in a processing chamber, heating the processing chamber and flowing a halide gas into the processing chamber to etch the surface of the substrate using either thermal or plasma assisted etching followed by depositing an overlayer on the substantially oxide free and contaminant free surface. Methods can also include the placement and etching of a sacrificial layer, a thermal clean using rapid thermal annealing, or a process in a plasma of nitrogen trifluoride and ammonia gas.
摘要翻译：提供了制备用于后续沉积的锗锡或硅锗锡层的洁净表面的方法。通过用暴露的锗锡或硅锗锡定位衬底，可以在制备的GeSn或SiGeSn层上沉积Ge，掺杂Ge，另一GeSn或SiGeSn层，掺杂GeSn或SiGeSn层，绝缘体或金属的覆盖层层，加热处理室并使卤化物气体流入处理室，以使用热或等离子体辅助蚀刻来蚀刻衬底的表面，随后在基本上无氧化物和无污染物的表面上沉积覆盖层。方法还可以包括牺牲层的放置和蚀刻，使用快速热退火的热清洁，或三氟化氮和氨气的等离子体中的工艺。

4. 发明申请

US20100227061A1 LOW TEMPERATURE ALD Si02 有权
标题翻译：低温ALD Si02
公开(公告)号：US20100227061A1
公开(公告)日：2010-09-09
申请号：US12788131
申请日：2010-05-26
申请人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
发明人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
IPC分类号： C23C16/40
CPC分类号： C23C16/402 , C23C16/45534
摘要： The present invention generally comprises a silicon dioxide atomic layer deposition method. By providing pyridine as a catalyst, water may be utilized as the oxidization source while depositing at a low temperature. Prior to exposing the substrate to the water, the substrate may be exposed to a pyridine soak process. Additionally, the water may be co-flowed to the chamber with the pyridine through separate conduits to reduce interaction prior to entering the chamber. Alternatively, the pyridine may be co-flowed with a silicon precursor that does not react with pyridine.
摘要翻译：本发明通常包括二氧化硅原子层沉积方法。通过提供吡啶作为催化剂，可以在低温下沉积时使用水作为氧化源。在将基底暴露于水之前，可以将底物暴露于吡啶浸泡过程。此外，水可以通过单独的导管与吡啶共同流到室中，以减少进入室之前的相互作用。或者，吡啶可以与不与吡啶反应的硅前体共流。

5. 发明授权

US08669590B2 Methods and apparatus for forming silicon germanium-carbon semiconductor structures 有权
标题翻译：用于形成硅锗 - 碳半导体结构的方法和装置
公开(公告)号：US08669590B2
公开(公告)日：2014-03-11
申请号：US13218782
申请日：2011-08-26
申请人： Errol Antonio C. Sanchez , Yi-Chiau Huang
发明人： Errol Antonio C. Sanchez , Yi-Chiau Huang
IPC分类号： H01L29/78
CPC分类号： H01L21/0262 , H01L21/02441 , H01L21/02488 , H01L21/02505 , H01L21/02532 , H01L29/1054 , H01L29/165 , H01L29/517 , H01L29/66575 , H01L29/7848
摘要： Methods and apparatus for forming semiconductor structures are disclosed herein. In some embodiments, a semiconductor structure may include a first germanium carbon layer having a first side and an opposing second side; a germanium-containing layer directly contacting the first side of the first germanium carbon layer; and a first silicon layer directly contacting the opposing second side of the first germanium carbon layer. In some embodiments, a method of forming a semiconductor structure may include forming a first germanium carbon layer atop a first silicon layer; and forming a germanium-containing layer atop the first germanium carbon layer.
摘要翻译：本文公开了用于形成半导体结构的方法和装置。在一些实施例中，半导体结构可以包括具有第一侧和相对的第二侧的第一锗碳层; 直接接触第一锗碳层的第一侧的含锗层; 以及直接接触第一锗碳层的相对的第二侧的第一硅层。在一些实施例中，形成半导体结构的方法可以包括在第一硅层顶上形成第一锗碳层; 以及在第一锗碳层顶上形成含锗层。

6. 发明申请

US20130280891A1 METHOD AND APPARATUS FOR GERMANIUM TIN ALLOY FORMATION BY THERMAL CVD 审中-公开
标题翻译：用于通过热CVD形成的锗合金合金的方法和装置
公开(公告)号：US20130280891A1
公开(公告)日：2013-10-24
申请号：US13784109
申请日：2013-03-29
申请人： YIHWAN KIM , Yi-Chiau Huang , Errol Antonio C. Sanchez
发明人： YIHWAN KIM , Yi-Chiau Huang , Errol Antonio C. Sanchez
IPC分类号： H01L21/02
CPC分类号： H01L21/0262 , C30B25/02 , C30B29/06 , C30B29/08 , C30B29/52 , H01L21/02524 , H01L21/02532 , H01L21/02535
摘要： A method and apparatus for forming semiconductive semiconductor-metal alloy layers is described. A germanium precursor and a metal precursor are provided to a chamber, and an epitaxial layer of germanium-metal alloy, optionally including silicon, is formed on the substrate. The metal precursor is typically a metal halide, which may be provided by evaporating a liquid metal halide, subliming a solid metal halide, or by contacting a pure metal with a halogen gas. A group IV halide deposition control agent is used to provide selective deposition on semiconductive regions of the substrate relative to dielectric regions. The semiconductive semiconductor-metal alloy layers may be doped, for example with boron, phosphorus, and/or arsenic. The precursors may be provided through a showerhead or through a side entry point, and an exhaust system coupled to the chamber may be separately heated to manage condensation of exhaust components.
摘要翻译：描述了用于形成半导体半导体 - 金属合金层的方法和装置。将锗前体和金属前体提供到室，并且在衬底上形成任选地包含硅的锗 - 金属合金外延层。金属前体通常是金属卤化物，其可以通过蒸发液体金属卤化物，升华固体金属卤化物或通过使纯金属与卤素气体接触来提供。使用IV族卤化物沉积控制剂来相对于电介质区域在衬底的半导体区域上提供选择性沉积。半导体半导体 - 金属合金层可以掺杂例如硼，磷和/或砷。前体可以通过喷头或通过侧入口提供，并且耦合到室的排气系统可以被单独加热以管理排气部件的冷凝。

7. 发明授权

US08501600B2 Methods for depositing germanium-containing layers 有权
标题翻译：沉积含锗层的方法
公开(公告)号：US08501600B2
公开(公告)日：2013-08-06
申请号：US13189978
申请日：2011-07-25
申请人： Errol Sanchez , Yi-Chiau Huang , David K. Carlson
发明人： Errol Sanchez , Yi-Chiau Huang , David K. Carlson
IPC分类号： H01L21/00
CPC分类号： H01L21/02381 , H01L21/0237 , H01L21/02529 , H01L21/02532 , H01L21/02535 , H01L21/02573 , H01L21/0262
摘要： Methods for depositing germanium-containing layers on silicon-containing layers are provided herein. In some embodiments, a method may include depositing a first layer atop an upper surface of the silicon-containing layer, wherein the first layer comprises predominantly germanium (Ge) and further comprises a lattice adjustment element having a concentration selected to enhance electrical activity of dopant elements, wherein the dopant elements are disposed in at least one of the first layer or in an optional second layer deposited atop of the first layer, wherein the optional second layer, if present, comprises predominantly germanium (Ge). In some embodiments, the second layer is deposited atop the first layer. In some embodiments, the second layer comprises germanium (Ge) and dopant elements.
摘要翻译：本文提供了在含硅层上沉积含锗层的方法。在一些实施例中，一种方法可以包括沉积位于含硅层的上表面顶部的第一层，其中第一层主要包含锗（Ge），并且还包括具有选择以增强掺杂剂的电活性的浓度的晶格调节元件元素，其中所述掺杂剂元素设置在所述第一层中的至少一个中或沉积在所述第一层顶部的任选的第二层中，其中所述任选的第二层（如果存在）主要包含锗（Ge）。在一些实施例中，第二层沉积在第一层的顶部。在一些实施例中，第二层包括锗（Ge）和掺杂元素。

8. 发明申请

US20120306055A1 METHOD OF FORMING HIGH GROWTH RATE, LOW RESISTIVITY GERMANIUM FILM ON SILICON SUBSTRATE 有权
标题翻译：在硅基材上形成高生长速率，低电阻率锗膜的方法
公开(公告)号：US20120306055A1
公开(公告)日：2012-12-06
申请号：US13482725
申请日：2012-05-29
申请人： Yi-Chiau Huang , Errol Antonio C. Sanchez , Xianzhi Tao
发明人： Yi-Chiau Huang , Errol Antonio C. Sanchez , Xianzhi Tao
IPC分类号： H01L21/20 , H01L29/16
CPC分类号： H01L21/0237 , H01L21/0245 , H01L21/02532 , H01L21/02576 , H01L21/0262
摘要： A method of forming a doped semiconductor layer on a substrate is provided. A foundation layer having a crystal structure compatible with a thermodynamically favored crystal structure of the doped semiconductor layer is formed on the substrate and annealed, or surface annealed, to substantially crystallize the surface of the foundation layer. The doped semiconductor layer is formed on the foundation layer. Each layer may be formed by vapor deposition processes such as CVD. The foundation layer may be germanium and the doped semiconductor layer may be phosphorus doped germanium.
摘要翻译：提供了在衬底上形成掺杂半导体层的方法。具有与掺杂半导体层的热力学有利晶体结构相适应的晶体结构的基底层形成在基底上并进行退火或表面退火，以使基底层的表面基本上结晶。掺杂半导体层形成在基础层上。每个层可以通过诸如CVD的气相沉积工艺形成。基底层可以是锗，并且掺杂半导体层可以是掺杂磷的锗。

9. 发明授权

US07659158B2 Atomic layer deposition processes for non-volatile memory devices 失效
标题翻译：用于非易失性存储器件的原子层沉积工艺
公开(公告)号：US07659158B2
公开(公告)日：2010-02-09
申请号：US12059782
申请日：2008-03-31
申请人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
发明人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
IPC分类号： H01L21/8238 , H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L29/7881
摘要： Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.
摘要翻译：本发明的实施例提供了用于形成存储器件的存储器件和方法。在一个实施例中，提供了一种存储器件，其包括设置在衬底的源极/漏极区域上的浮置栅极多晶硅层，设置在浮置栅极多晶硅层上的氧氮化硅层，设置在氧氮化硅层上的第一氧化铝层，设置在所述第一氧化铝层上的铪硅氮化物层，设置在所述铪硅氮氧化物层上的第二氧化铝层，以及设置在所述第二氧化铝层上的控制栅极多晶硅层。在另一个实施例中，提供了一种存储器件，其包括设置在布置在浮置多晶硅层上方的氧化硅层上的多晶硅介质叠层之间的控制栅极多晶硅层。多晶硅间介质堆叠包含由氮化硅层分隔的两个氮氧化硅层。

10. 发明申请

US20090078198A1 CHAMBER COMPONENTS WITH INCREASED PYROMETRY VISIBILITY 有权
标题翻译：具有增加色素可见性的CHAMBER组件
公开(公告)号：US20090078198A1
公开(公告)日：2009-03-26
申请号：US11859080
申请日：2007-09-21
申请人： JOSEPH YUDOVSKY , Brendan McDougall , Ravi Jallepally , Yi-Chiau Huang , Maitreyee Mahajani , Kevin Griffin , Andrew C. Sherman
发明人： JOSEPH YUDOVSKY , Brendan McDougall , Ravi Jallepally , Yi-Chiau Huang , Maitreyee Mahajani , Kevin Griffin , Andrew C. Sherman
IPC分类号： B05C21/00 , H01L21/66
CPC分类号： H01L21/67248
摘要： The present invention generally provides method and apparatus for non-contact temperature measurement in a semiconductor processing chamber. Particularly, the present invention provides methods and apparatus for non-contact temperature measurement for temperature below 500° C. One embodiment of the present invention provides an apparatus for processing semiconductor substrates. The apparatus comprises a target component comprises a material with higher emissivity than the one or more substrates.
摘要翻译：本发明通常提供了半导体处理室中非接触式温度测量的方法和装置。特别地，本发明提供了在低于500℃的温度下进行非接触式温度测量的方法和装置。本发明的一个实施例提供了一种半导体衬底的处理装置。该装置包括目标部件，其包括比一个或多个基板更高的发射率的材料。

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