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1. 发明申请

US20100227061A1 LOW TEMPERATURE ALD Si02 有权
标题翻译：低温ALD Si02
公开(公告)号：US20100227061A1
公开(公告)日：2010-09-09
申请号：US12788131
申请日：2010-05-26
申请人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
发明人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
IPC分类号： C23C16/40
CPC分类号： C23C16/402 , C23C16/45534
摘要： The present invention generally comprises a silicon dioxide atomic layer deposition method. By providing pyridine as a catalyst, water may be utilized as the oxidization source while depositing at a low temperature. Prior to exposing the substrate to the water, the substrate may be exposed to a pyridine soak process. Additionally, the water may be co-flowed to the chamber with the pyridine through separate conduits to reduce interaction prior to entering the chamber. Alternatively, the pyridine may be co-flowed with a silicon precursor that does not react with pyridine.
摘要翻译：本发明通常包括二氧化硅原子层沉积方法。通过提供吡啶作为催化剂，可以在低温下沉积时使用水作为氧化源。在将基底暴露于水之前，可以将底物暴露于吡啶浸泡过程。此外，水可以通过单独的导管与吡啶共同流到室中，以减少进入室之前的相互作用。或者，吡啶可以与不与吡啶反应的硅前体共流。

2. 发明申请

US20090078198A1 CHAMBER COMPONENTS WITH INCREASED PYROMETRY VISIBILITY 有权
标题翻译：具有增加色素可见性的CHAMBER组件
公开(公告)号：US20090078198A1
公开(公告)日：2009-03-26
申请号：US11859080
申请日：2007-09-21
申请人： JOSEPH YUDOVSKY , Brendan McDougall , Ravi Jallepally , Yi-Chiau Huang , Maitreyee Mahajani , Kevin Griffin , Andrew C. Sherman
发明人： JOSEPH YUDOVSKY , Brendan McDougall , Ravi Jallepally , Yi-Chiau Huang , Maitreyee Mahajani , Kevin Griffin , Andrew C. Sherman
IPC分类号： B05C21/00 , H01L21/66
CPC分类号： H01L21/67248
摘要： The present invention generally provides method and apparatus for non-contact temperature measurement in a semiconductor processing chamber. Particularly, the present invention provides methods and apparatus for non-contact temperature measurement for temperature below 500° C. One embodiment of the present invention provides an apparatus for processing semiconductor substrates. The apparatus comprises a target component comprises a material with higher emissivity than the one or more substrates.
摘要翻译：本发明通常提供了半导体处理室中非接触式温度测量的方法和装置。特别地，本发明提供了在低于500℃的温度下进行非接触式温度测量的方法和装置。本发明的一个实施例提供了一种半导体衬底的处理装置。该装置包括目标部件，其包括比一个或多个基板更高的发射率的材料。

3. 发明授权

US07897208B2 Low temperature ALD SiO2 有权
标题翻译：低温ALD SiO2
公开(公告)号：US07897208B2
公开(公告)日：2011-03-01
申请号：US12788131
申请日：2010-05-26
申请人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
发明人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
IPC分类号： C23C16/00 , H05H1/24
CPC分类号： C23C16/402 , C23C16/45534
摘要： The present invention generally comprises a silicon dioxide atomic layer deposition method. By providing pyridine as a catalyst, water may be utilized as the oxidization source while depositing at a low temperature. Prior to exposing the substrate to the water, the substrate may be exposed to a pyridine soak process. Additionally, the water may be co-flowed to the chamber with the pyridine through separate conduits to reduce interaction prior to entering the chamber. Alternatively, the pyridine may be co-flowed with a silicon precursor that does not react with pyridine.
摘要翻译：本发明通常包括二氧化硅原子层沉积方法。通过提供吡啶作为催化剂，可以在低温下沉积时使用水作为氧化源。在将基底暴露于水之前，可以将底物暴露于吡啶浸泡过程。此外，水可以通过单独的导管与吡啶共同流到室中，以减少进入室之前的相互作用。或者，吡啶可以与不与吡啶反应的硅前体共流。

4. 发明授权

US07749574B2 Low temperature ALD SiO2 失效
标题翻译：低温ALD SiO2
公开(公告)号：US07749574B2
公开(公告)日：2010-07-06
申请号：US11559491
申请日：2006-11-14
申请人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
发明人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
IPC分类号： H05H1/24 , C23C16/00
CPC分类号： C23C16/402 , C23C16/45534
摘要： The present invention generally comprises a silicon dioxide atomic layer deposition method. By providing pyridine as a catalyst, water may be utilized as the oxidization source while depositing at a low temperature. Prior to exposing the substrate to the water, the substrate may be exposed to a pyridine soak process. Additionally, the water may be co-flowed to the chamber with the pyridine through separate conduits to reduce interaction prior to entering the chamber. Alternatively, the pyridine may be co-flowed with a silicon precursor that does not react with pyridine.
摘要翻译：本发明通常包括二氧化硅原子层沉积方法。通过提供吡啶作为催化剂，可以在低温下沉积时使用水作为氧化源。在将基底暴露于水之前，可以将底物暴露于吡啶浸泡过程。此外，水可以通过单独的导管与吡啶共同流到室中，以减少进入室之前的相互作用。或者，吡啶可以与不与吡啶反应的硅前体共流。

5. 发明申请

US20080113097A1 LOW TEMPERATURE ALD SiO2 失效
标题翻译：低温ALD SiO2
公开(公告)号：US20080113097A1
公开(公告)日：2008-05-15
申请号：US11559491
申请日：2006-11-14
申请人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
发明人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
IPC分类号： C23C16/40
CPC分类号： C23C16/402 , C23C16/45534
摘要： The present invention generally comprises a silicon dioxide atomic layer deposition method. By providing pyridine as a catalyst, water may be utilized as the oxidization source while depositing at a low temperature. Prior to exposing the substrate to the water, the substrate may be exposed to a pyridine soak process. Additionally, the water may be co-flowed to the chamber with the pyridine through separate conduits to reduce interaction prior to entering the chamber. Alternatively, the pyridine may be co-flowed with a silicon precursor that does not react with pyridine.
摘要翻译：本发明通常包括二氧化硅原子层沉积方法。通过提供吡啶作为催化剂，可以在低温下沉积时使用水作为氧化源。在将基底暴露于水之前，可以将底物暴露于吡啶浸泡过程。此外，水可以通过单独的导管与吡啶共同流到室中，以减少进入室之前的相互作用。或者，吡啶可以与不与吡啶反应的硅前体共流。

6. 发明授权

US07921803B2 Chamber components with increased pyrometry visibility 有权
标题翻译：室内组件具有更高的高温可见度
公开(公告)号：US07921803B2
公开(公告)日：2011-04-12
申请号：US11859080
申请日：2007-09-21
申请人： Joseph Yudovsky , Brendan McDougall , Ravi Jallepally , Yi-Chiau Huang , Maitreyee Mahajani , Kevin Griffin , Andrew C. Sherman
发明人： Joseph Yudovsky , Brendan McDougall , Ravi Jallepally , Yi-Chiau Huang , Maitreyee Mahajani , Kevin Griffin , Andrew C. Sherman
IPC分类号： B05C11/00
CPC分类号： H01L21/67248
摘要： The present invention generally provides method and apparatus for non-contact temperature measurement in a semiconductor processing chamber. Particularly, the present invention provides methods and apparatus for non-contact temperature measurement for temperature below 500° C. One embodiment of the present invention provides an apparatus for processing semiconductor substrates. The apparatus comprises a target component comprises a material with higher emissivity than the one or more substrates.
摘要翻译：本发明通常提供了半导体处理室中非接触式温度测量的方法和装置。特别地，本发明提供了在低于500℃的温度下进行非接触式温度测量的方法和装置。本发明的一个实施例提供了一种半导体衬底的处理装置。该装置包括目标部件，其包括比一个或多个基板更高的发射率的材料。

7. 发明申请

US20070084408A1 BATCH PROCESSING CHAMBER WITH DIFFUSER PLATE AND INJECTOR ASSEMBLY 审中-公开
标题翻译：具有扩散板和注射器组件的批处理室
公开(公告)号：US20070084408A1
公开(公告)日：2007-04-19
申请号：US11381966
申请日：2006-05-05
申请人： Joseph Yudovsky , Tai Ngo , Cesar Tejamo , Maitreyee Mahajani , Brendan McDougall , Yi-Chiau Huang , Robert Cook , Yeong Kim , Alexander Tam , Adam Brailove , Steve Ghanayem
发明人： Joseph Yudovsky , Tai Ngo , Cesar Tejamo , Maitreyee Mahajani , Brendan McDougall , Yi-Chiau Huang , Robert Cook , Yeong Kim , Alexander Tam , Adam Brailove , Steve Ghanayem
IPC分类号： C23C16/00
CPC分类号： C23C16/46 , C23C16/45578 , H01L21/67109
摘要： An apparatus for batch processing of a wafer is disclosed. In one embodiment the batch processing apparatus includes a bell jar furnace having a diffuser disposed between gas inlets and the substrate positioned within the furnace to direct flows within the chamber around the perimeter of the substrate.
摘要翻译：公开了一种用于批处理晶片的设备。在一个实施例中，批处理设备包括钟罩式炉，其具有设置在气体入口之间的扩散器和位于炉内的基板，以引导室内围绕衬底周边的流动。

8. 发明授权

US07659158B2 Atomic layer deposition processes for non-volatile memory devices 失效
标题翻译：用于非易失性存储器件的原子层沉积工艺
公开(公告)号：US07659158B2
公开(公告)日：2010-02-09
申请号：US12059782
申请日：2008-03-31
申请人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
发明人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
IPC分类号： H01L21/8238 , H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L29/7881
摘要： Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.
摘要翻译：本发明的实施例提供了用于形成存储器件的存储器件和方法。在一个实施例中，提供了一种存储器件，其包括设置在衬底的源极/漏极区域上的浮置栅极多晶硅层，设置在浮置栅极多晶硅层上的氧氮化硅层，设置在氧氮化硅层上的第一氧化铝层，设置在所述第一氧化铝层上的铪硅氮化物层，设置在所述铪硅氮氧化物层上的第二氧化铝层，以及设置在所述第二氧化铝层上的控制栅极多晶硅层。在另一个实施例中，提供了一种存储器件，其包括设置在布置在浮置多晶硅层上方的氧化硅层上的多晶硅介质叠层之间的控制栅极多晶硅层。多晶硅间介质堆叠包含由氮化硅层分隔的两个氮氧化硅层。

9. 发明申请

US20090242957A1 ATOMIC LAYER DEPOSITION PROCESSES FOR NON-VOLATILE MEMORY DEVICES 失效
标题翻译：用于非易失性存储器件的原子层沉积工艺
公开(公告)号：US20090242957A1
公开(公告)日：2009-10-01
申请号：US12059782
申请日：2008-03-31
申请人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
发明人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
IPC分类号： H01L21/28 , H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L29/7881
摘要： Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.
摘要翻译：本发明的实施例提供了用于形成存储器件的存储器件和方法。在一个实施例中，提供了一种存储器件，其包括设置在衬底的源极/漏极区域上的浮置栅极多晶硅层，设置在浮置栅极多晶硅层上的氧氮化硅层，设置在氧氮化硅层上的第一氧化铝层，设置在所述第一氧化铝层上的铪硅氮化物层，设置在所述铪硅氮氧化物层上的第二氧化铝层，以及设置在所述第二氧化铝层上的控制栅极多晶硅层。在另一个实施例中，提供了一种存储器件，其包括设置在布置在浮置多晶硅层上方的氧化硅层上的多晶硅介质叠层之间的控制栅极多晶硅层。多晶硅间介质堆叠包含由氮化硅层分隔的两个氮氧化硅层。

10. 发明申请

US20090017637A1 METHOD AND APPARATUS FOR BATCH PROCESSING IN A VERTICAL REACTOR 审中-公开
标题翻译：用于垂直反应器中批处理的方法和装置
公开(公告)号：US20090017637A1
公开(公告)日：2009-01-15
申请号：US11775761
申请日：2007-07-10
申请人： Yi-Chiau Huang , Maitreyee Mahajani
发明人： Yi-Chiau Huang , Maitreyee Mahajani
IPC分类号： H01L21/469 , C23C16/00
CPC分类号： H01L21/67309 , C23C16/4412 , C23C16/45578 , C23C16/4584 , C23C16/54 , H01L21/0228 , H01L21/312 , H01L21/3141
摘要： The present invention generally provides an apparatus and method for the processing a plurality of substrates in a batch processing chamber. One embodiment of the present invention provides a method for processing a plurality of substrates comprising positioning the plurality of substrates in an inner volume of a batch processing chamber, wherein the plurality of substrates are arranged in a substantially parallel manner, and at least a portion of the plurality of substrates are positioned with a device side facing downward, and flowing one or more processing gases cross the plurality of substrates.
摘要翻译：本发明总体上提供了一种用于在批处理室中处理多个基板的装置和方法。本发明的一个实施例提供了一种用于处理多个基板的方法，包括将多个基板定位在分批处理室的内部体积中，其中多个基板以基本平行的方式布置，并且至少部分多个基板被定位成使得装置侧朝下，并且使一个或多个处理气体流过多个基板。

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