专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07360187B2 Mixed mode verifier 失效
标题翻译：混合模式验证器
公开(公告)号：US07360187B2
公开(公告)日：2008-04-15
申请号：US11242599
申请日：2005-09-30
申请人： Kevin D. Jones , Thomas J. Sheffler , Kathryn M. Mossawir , Qiang Hong , Paul Wong , Jing Jiang
发明人： Kevin D. Jones , Thomas J. Sheffler , Kathryn M. Mossawir , Qiang Hong , Paul Wong , Jing Jiang
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for formally verifying designs having elements from more than a single design domain is described. An example system allows formal verification of a design containing mixed analog and digital subparts. The system may use different proof engines to solve an appropriate sub-partition of the entire design, and may provide a framework for translating between the different domains to create a unified result. For example, a digital proof engine may be used for a digital only subpart, while an analog proof engine may be used for an analog only subpart. The system may use the partitioning results to determine translators between the various domains, and an order in which the proof engines are applied.
摘要翻译：描述了用于正式验证来自多于单个设计域的元件的设计的方法和系统。示例系统允许对包含混合模拟和数字子部件的设计进行形式验证。系统可以使用不同的证明引擎来解决整个设计的适当子分区，并且可以提供用于在不同域之间进行翻译以创建统一结果的框架。例如，数字证明引擎可以用于仅数字的子部件，而模拟证明引擎可以用于仅模拟子部件。系统可以使用分区结果来确定各个域之间的翻译器以及应用证明引擎的顺序。

2. 发明申请

US20080263487A1 Multi-Format Consistency Checking Tool 审中-公开
标题翻译：多格式一致性检查工具
公开(公告)号：US20080263487A1
公开(公告)日：2008-10-23
申请号：US12144457
申请日：2008-06-23
申请人： Qiang Hong , JIng Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
发明人： Qiang Hong , JIng Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for performing consistency checking of one or more design representations having different design types. A translator for each design type obtains information from each design needed to evaluate rules that are design type-neutral. The described examples also allow a user to add rules using predefined rule terms. In addition, certain examples allow the user to add terms to the rule set and to make new rules with the added terms. Each new term added to a rule set has a corresponding abstraction function in a translator for each design type. Thus, the abstraction functions are not design type-neutral.
摘要翻译：一种用于对具有不同设计类型的一个或多个设计表示进行一致性检查的方法和系统。每个设计类型的翻译器都可以从设计类型中立的规则中获取每个设计所需的信息。所描述的示例还允许用户使用预定义的规则术语来添加规则。此外，某些示例允许用户向规则集添加条款，并使用添加的条款创建新规则。添加到规则集中的每个新术语在每个设计类型的翻译器中都具有相应的抽象功能。因此，抽象函数不是设计类型中立的。

3. 发明授权

US07392492B2 Multi-format consistency checking tool 失效
标题翻译：多格式一致性检查工具
公开(公告)号：US07392492B2
公开(公告)日：2008-06-24
申请号：US11242598
申请日：2005-09-30
申请人： Qiang Hong , Jing Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
发明人： Qiang Hong , Jing Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for performing consistency checking of one or more design representations having different design types. A translator for each design type obtains information from each design needed to evaluate rules that are design type-neutral. The described examples also allow a user to add rules using predefined rule terms. In addition, certain examples allow the user to add terms to the rule set and to make new rules with the added terms. Each new term added to a rule set has a corresponding abstraction function in a translator for each design type. Thus, the abstraction functions are not design type-neutral.
摘要翻译：一种用于对具有不同设计类型的一个或多个设计表示进行一致性检查的方法和系统。每个设计类型的翻译器都可以从设计类型中立的规则中获取每个设计所需的信息。所描述的示例还允许用户使用预定义的规则术语来添加规则。此外，某些示例允许用户向规则集添加条款，并使用添加的条款创建新规则。添加到规则集中的每个新术语在每个设计类型的翻译器中都具有相应的抽象功能。因此，抽象函数不是设计类型中立的。

4. 发明授权

US08117576B2 Method for using an equivalence checker to reduce verification effort in a system having analog blocks 失效
标题翻译：使用等价检查器来减少具有模拟块的系统中的验证工作的方法
公开(公告)号：US08117576B2
公开(公告)日：2012-02-14
申请号：US12397298
申请日：2009-03-03
申请人： Kathryn M. Mossawir , Kevin D. Jones
发明人： Kathryn M. Mossawir , Kevin D. Jones
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A computer-implemented method of performing an equivalence check on a mixed-signal circuit is performed on a server system, and includes responding to a verification request. In the method, the following operations are performed. A static analysis is performed on a first netlist, and a synthesizable section and non-synthesizable section of the first netlist are identified. A functional equivalence is determined between the non-synthesizable section of the first netlist and a corresponding non-synthesizable section of a second netlist, and a logical equivalence is determined between the synthesizable section of the first netlist and a corresponding synthesizable section of a second netlist. An equivalence result is provided based on the determined functional equivalence and the determined logical equivalence.
摘要翻译：在服务器系统上执行对混合信号电路进行等价性检查的计算机实现的方法，并且包括响应于验证请求。在该方法中，执行以下操作。在第一网表上执行静态分析，并且识别第一网表的可合成部分和不可合成部分。在第一网表的不可合成部分和第二网表的对应不可合成部分之间确定功能等价，并且在第一网表的可合成部分和第二网表的相应可合成部分之间确定逻辑等价。基于确定的功能等同性和确定的逻辑等价性提供等效结果。

5. 发明申请

US20090228849A1 Method for Using an Equivalence Checker to Reduce Verification Effort in a System Having Analog Blocks 失效
标题翻译：使用等价检查器减少具有模拟块的系统中的验证努力的方法
公开(公告)号：US20090228849A1
公开(公告)日：2009-09-10
申请号：US12397298
申请日：2009-03-03
申请人： Kathryn M. Mossawir , Kevin D. Jones
发明人： Kathryn M. Mossawir , Kevin D. Jones
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A computer-implemented method of performing an equivalence check on a mixed-signal circuit is performed on a server system, and includes responding to a verification request. In the method, the following operations are performed. A static analysis is performed on a first netlist, and a synthesizable section and non-synthesizable section of the first netlist are identified. A functional equivalence is determined between the non-synthesizable section of the first netlist and a corresponding non-synthesizable section of a second netlist, and a logical equivalence is determined between the synthesizable section of the first netlist and a corresponding synthesizable section of a second netlist. An equivalence result is provided based on the determined functional equivalence and the determined logical equivalence.
摘要翻译：在服务器系统上执行对混合信号电路进行等价性检查的计算机实现的方法，并且包括响应于验证请求。在该方法中，执行以下操作。在第一网表上执行静态分析，并且识别第一网表的可合成部分和不可合成部分。在第一网表的不可合成部分和第二网表的对应不可合成部分之间确定功能等价，并且在第一网表的可合成部分和第二网表的相应可合成部分之间确定逻辑等价。基于确定的功能等同性和确定的逻辑等价性提供等效结果。

6. 发明授权

US07643979B2 Method to analyze an analog circuit design with a verification program 失效
标题翻译：用验证程序分析模拟电路设计的方法
公开(公告)号：US07643979B2
公开(公告)日：2010-01-05
申请号：US11334063
申请日：2006-01-17
申请人： Qiang Hong , Kevin D. Jones , Paul Wong
发明人： Qiang Hong , Kevin D. Jones , Paul Wong
IPC分类号： G06F17/50 , G01R31/28
CPC分类号： G06F17/5036
摘要： Data structures and algorithms are provided to automatically generate an analog stimulus to apply to a simulation of the analog DUT. A constraint solver is provided to determine suitable values to use in the stimulus generation. The suitable values are random values within a range of allowed values. For example, a number of different stimuli are generated for successive application to the analog DUT, each with a different magnitude within a range of allowed magnitudes. Data structures and algorithms are provided to monitor analog electrical properties at nodes of the analog DUT. Data structures and algorithms are provided to define constraints on the analog electrical properties and determine whether the constraints were violated. Data structures and algorithms are provided to define simulation coverage conditions in the analog domain and determine whether the defined analog domain coverage conditions have been satisfied.
摘要翻译：提供数据结构和算法以自动生成模拟刺激以应用于模拟DUT的仿真。提供约束求解器以确定在刺激生成中使用的合适值。合适的值是允许值范围内的随机值。例如，产生用于连续施加到模拟DUT的多个不同的刺激，每个激励在允许的幅度范围内具有不同的幅度。提供数据结构和算法来监视模拟DUT的节点处的模拟电气特性。提供数据结构和算法来定义对模拟电气特性的限制，并确定约束是否被违反。提供数据结构和算法来定义模拟域中的模拟覆盖条件，并确定是否满足了定义的模拟域覆盖条件。

7. 发明申请

US20130226238A1 Vertebrae Support Device and Method 审中-公开
标题翻译：脊椎支撑装置及方法
公开(公告)号：US20130226238A1
公开(公告)日：2013-08-29
申请号：US13853826
申请日：2013-03-29
申请人： Kevin D. Jones
发明人： Kevin D. Jones
IPC分类号： A61F5/01
CPC分类号： A61F5/01 , A47C20/027
摘要： A vertebrae support device and method. An embodiment of a method of using the vertebrae support device by a person includes disposing a resting surface of a vertebrae support device on a substantially flat horizontal surface, and lying on the vertebrae support device such that muscles on the left side of a vertebrae column of the person are supported on a first rail of the vertebrae support device, the muscles on the right side of the vertebrae column of the person are supported on a second rail of the vertebrae support device, and the thoracic and lumbar portions of the vertebrae column of the person lying on the vertebrae support device are disposed unsupported in a trough between the first rail and the second rail.
摘要翻译：椎骨支撑装置及方法。由人使用椎骨支撑装置的方法的一个实施例包括将椎骨支撑装置的搁置表面设置在基本上平坦的水平表面上，并且躺在椎骨支撑装置上，使得在椎骨支撑装置左侧的肌肉该人被支撑在椎骨支撑装置的第一轨道上，人的椎骨柱右侧的肌肉被支撑在椎骨支撑装置的第二轨道上，并且椎骨柱的胸部和腰部躺在椎骨支撑装置上的人被设置为不支撑在第一轨道和第二轨道之间的槽中。

8. 发明申请

US20120037163A1 Vertebrae Support Device and Method 有权
标题翻译：脊椎支撑装置及方法
公开(公告)号：US20120037163A1
公开(公告)日：2012-02-16
申请号：US12853734
申请日：2010-08-10
申请人： Kevin D. Jones
发明人： Kevin D. Jones
IPC分类号： A61G15/00
CPC分类号： A61F5/01 , A47C20/027
摘要： A vertebrae support device. The vertebrae support device includes a base made of a yielding material and having resting surface, a rail side, a first lateral side a second lateral side, a head end, and a foot end. A first rail extends from the rail side of the base from the resting surface of the base and adjacent the first lateral side and having a rounded surface opposite the base. A second rail extends from the rail side of the base from the resting surface of the base and adjacent the second lateral side and having a rounded surface opposite the base, a trough depending between the first and second rails and toward the base at least one inch. A headrest is formed on the head end of the base.
摘要翻译：椎骨支撑装置。椎骨支撑装置包括由屈服材料制成并具有搁置表面，轨道侧，第一横向侧，第二横向侧，头端和脚端的基部。第一轨道从基座的轨道侧从基座的搁置表面延伸并且邻近第一侧面并且具有与基座相对的圆形表面。第二轨道从基座的轨道侧从基座的搁置表面延伸并且邻近第二侧面并且具有与基座相对的圆形表面，在第一和第二轨道之间延伸的槽，并且朝向底座至少一英寸。在基座的头端形成头枕。

9. 发明申请

US20100017186A1 Noise Model Method of Predicting Mismatch Effects on Transient Circuit Behaviors 审中-公开
标题翻译：预测不平衡对瞬态电路行为的影响的噪声模型方法
公开(公告)号：US20100017186A1
公开(公告)日：2010-01-21
申请号：US12528616
申请日：2008-02-28
申请人： Jaeha Kim , Mark A. Horowitz , Kevin D. Jones
发明人： Jaeha Kim , Mark A. Horowitz , Kevin D. Jones
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A method of simulating device mismatch effects on transient circuit behaviors utilizes a circuit model corresponding to an electronic circuit. The circuit model includes a plurality of circuit elements and one or more noise sources. The noise sources have noise characteristics that correspond to device mismatch effects associated with the circuit elements. A noise analysis is performed on the circuit model to generate a noisy steady-state waveform of a selected output of the electronic circuit. Then, the noisy steady-state waveform is translated into a prediction of the variation of a respective circuit parameter associated with the electronic circuit.
摘要翻译：模拟对瞬态电路行为的器件失配影响的方法利用与电子电路相对应的电路模型。电路模型包括多个电路元件和一个或多个噪声源。噪声源具有对应于与电路元件相关的器件失配效应的噪声特性。对电路模型执行噪声分析，以产生电子电路的选定输出的噪声稳态波形。然后，将噪声稳态波形转换成与电子电路相关联的各个电路参数的变化的预测。

10. 发明授权

US09746985B1 System and method for detecting, collecting, analyzing, and communicating event-related information 有权
公开(公告)号：US09746985B1
公开(公告)日：2017-08-29
申请号：US13090742
申请日：2011-04-20
申请人： Ahmed A. Humayun , Steven J. Silverstein , Gregory P. Zalasky , Kevin D. Jones
发明人： Ahmed A. Humayun , Steven J. Silverstein , Gregory P. Zalasky , Kevin D. Jones
IPC分类号： G06F3/048 , G06F3/0481 , G06F3/0482 , G06F3/00
CPC分类号： G06F3/0481 , G06F3/005 , G06F3/0482 , G06F17/3087 , G06F17/30994 , G06F19/00 , G06Q10/063 , G06Q10/10 , G06Q10/1091 , G06Q50/01 , G16H50/80 , Y02A90/24
摘要： A system and method involves detecting operational social disruptive events on a global scale, assigning disease or non-disease event staging and warnings to express data in more simplistic terms, modeling data in conjunction with linguistics analysis to establish responsive actions, generating visualization and modeling capabilities for communicating information, and modeling disease or non-disease propagation for containment and forecasting purposes.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式