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1. 发明授权

US07360187B2 Mixed mode verifier 失效
标题翻译：混合模式验证器
公开(公告)号：US07360187B2
公开(公告)日：2008-04-15
申请号：US11242599
申请日：2005-09-30
申请人： Kevin D. Jones , Thomas J. Sheffler , Kathryn M. Mossawir , Qiang Hong , Paul Wong , Jing Jiang
发明人： Kevin D. Jones , Thomas J. Sheffler , Kathryn M. Mossawir , Qiang Hong , Paul Wong , Jing Jiang
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for formally verifying designs having elements from more than a single design domain is described. An example system allows formal verification of a design containing mixed analog and digital subparts. The system may use different proof engines to solve an appropriate sub-partition of the entire design, and may provide a framework for translating between the different domains to create a unified result. For example, a digital proof engine may be used for a digital only subpart, while an analog proof engine may be used for an analog only subpart. The system may use the partitioning results to determine translators between the various domains, and an order in which the proof engines are applied.
摘要翻译：描述了用于正式验证来自多于单个设计域的元件的设计的方法和系统。示例系统允许对包含混合模拟和数字子部件的设计进行形式验证。系统可以使用不同的证明引擎来解决整个设计的适当子分区，并且可以提供用于在不同域之间进行翻译以创建统一结果的框架。例如，数字证明引擎可以用于仅数字的子部件，而模拟证明引擎可以用于仅模拟子部件。系统可以使用分区结果来确定各个域之间的翻译器以及应用证明引擎的顺序。

2. 发明申请

US20080263487A1 Multi-Format Consistency Checking Tool 审中-公开
标题翻译：多格式一致性检查工具
公开(公告)号：US20080263487A1
公开(公告)日：2008-10-23
申请号：US12144457
申请日：2008-06-23
申请人： Qiang Hong , JIng Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
发明人： Qiang Hong , JIng Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for performing consistency checking of one or more design representations having different design types. A translator for each design type obtains information from each design needed to evaluate rules that are design type-neutral. The described examples also allow a user to add rules using predefined rule terms. In addition, certain examples allow the user to add terms to the rule set and to make new rules with the added terms. Each new term added to a rule set has a corresponding abstraction function in a translator for each design type. Thus, the abstraction functions are not design type-neutral.
摘要翻译：一种用于对具有不同设计类型的一个或多个设计表示进行一致性检查的方法和系统。每个设计类型的翻译器都可以从设计类型中立的规则中获取每个设计所需的信息。所描述的示例还允许用户使用预定义的规则术语来添加规则。此外，某些示例允许用户向规则集添加条款，并使用添加的条款创建新规则。添加到规则集中的每个新术语在每个设计类型的翻译器中都具有相应的抽象功能。因此，抽象函数不是设计类型中立的。

3. 发明授权

US07392492B2 Multi-format consistency checking tool 失效
标题翻译：多格式一致性检查工具
公开(公告)号：US07392492B2
公开(公告)日：2008-06-24
申请号：US11242598
申请日：2005-09-30
申请人： Qiang Hong , Jing Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
发明人： Qiang Hong , Jing Jiang , Kevin D. Jones , Kathryn M. Mossawir , Thomas J. Sheffler , Paul Wong
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for performing consistency checking of one or more design representations having different design types. A translator for each design type obtains information from each design needed to evaluate rules that are design type-neutral. The described examples also allow a user to add rules using predefined rule terms. In addition, certain examples allow the user to add terms to the rule set and to make new rules with the added terms. Each new term added to a rule set has a corresponding abstraction function in a translator for each design type. Thus, the abstraction functions are not design type-neutral.
摘要翻译：一种用于对具有不同设计类型的一个或多个设计表示进行一致性检查的方法和系统。每个设计类型的翻译器都可以从设计类型中立的规则中获取每个设计所需的信息。所描述的示例还允许用户使用预定义的规则术语来添加规则。此外，某些示例允许用户向规则集添加条款，并使用添加的条款创建新规则。添加到规则集中的每个新术语在每个设计类型的翻译器中都具有相应的抽象功能。因此，抽象函数不是设计类型中立的。

4. 发明授权

US07643979B2 Method to analyze an analog circuit design with a verification program 失效
标题翻译：用验证程序分析模拟电路设计的方法
公开(公告)号：US07643979B2
公开(公告)日：2010-01-05
申请号：US11334063
申请日：2006-01-17
申请人： Qiang Hong , Kevin D. Jones , Paul Wong
发明人： Qiang Hong , Kevin D. Jones , Paul Wong
IPC分类号： G06F17/50 , G01R31/28
CPC分类号： G06F17/5036
摘要： Data structures and algorithms are provided to automatically generate an analog stimulus to apply to a simulation of the analog DUT. A constraint solver is provided to determine suitable values to use in the stimulus generation. The suitable values are random values within a range of allowed values. For example, a number of different stimuli are generated for successive application to the analog DUT, each with a different magnitude within a range of allowed magnitudes. Data structures and algorithms are provided to monitor analog electrical properties at nodes of the analog DUT. Data structures and algorithms are provided to define constraints on the analog electrical properties and determine whether the constraints were violated. Data structures and algorithms are provided to define simulation coverage conditions in the analog domain and determine whether the defined analog domain coverage conditions have been satisfied.
摘要翻译：提供数据结构和算法以自动生成模拟刺激以应用于模拟DUT的仿真。提供约束求解器以确定在刺激生成中使用的合适值。合适的值是允许值范围内的随机值。例如，产生用于连续施加到模拟DUT的多个不同的刺激，每个激励在允许的幅度范围内具有不同的幅度。提供数据结构和算法来监视模拟DUT的节点处的模拟电气特性。提供数据结构和算法来定义对模拟电气特性的限制，并确定约束是否被违反。提供数据结构和算法来定义模拟域中的模拟覆盖条件，并确定是否满足了定义的模拟域覆盖条件。

5. 发明申请

US20070079267A1 Multi-format consistency checking tool 失效
标题翻译：多格式一致性检查工具
公开(公告)号：US20070079267A1
公开(公告)日：2007-04-05
申请号：US11242598
申请日：2005-09-30
申请人： Qiang Hong , Jing Jiang , Kevin Jones , Kathryn Mossawir , Thomas Sheffler , Paul Wong
发明人： Qiang Hong , Jing Jiang , Kevin Jones , Kathryn Mossawir , Thomas Sheffler , Paul Wong
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for performing consistency checking of one or more design representations having different design types. A translator for each design type obtains information from each design needed to evaluate rules that are design type-neutral. The described examples also allow a user to add rules using predefined rule terms. In addition, certain examples allow the user to add terms to the rule set and to make new rules with the added terms. Each new term added to a rule set has a corresponding abstraction function in a translator for each design type. Thus, the abstraction functions are not design type-neutral.
摘要翻译：一种用于对具有不同设计类型的一个或多个设计表示进行一致性检查的方法和系统。每个设计类型的翻译器都可以从设计类型中立的规则中获取每个设计所需的信息。所描述的示例还允许用户使用预定义的规则术语来添加规则。此外，某些示例允许用户向规则集添加条款，并使用添加的条款创建新规则。添加到规则集中的每个新术语在每个设计类型的翻译器中都具有相应的抽象功能。因此，抽象函数不是设计类型中立的。

6. 发明申请

US20070079268A1 Mixed mode verifier 失效
标题翻译：混合模式验证器
公开(公告)号：US20070079268A1
公开(公告)日：2007-04-05
申请号：US11242599
申请日：2005-09-30
申请人： Kevin Jones , Thomas Sheffler , Kathryn Mossawir , Qiang Hong , Paul Wong , Jing Jiang
发明人： Kevin Jones , Thomas Sheffler , Kathryn Mossawir , Qiang Hong , Paul Wong , Jing Jiang
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method and system for formally verifying designs having elements from more than a single design domain is described. For example, an example system allows formal verification of a design containing mixed analog and digital design.
摘要翻译：描述了用于正式验证来自多于单个设计域的元件的设计的方法和系统。例如，示例系统允许对包含混合模拟和数字设计的设计进行形式验证。

7. 发明申请

US20070168172A1 Method to analyze an analog circuit design with a verification program 失效
标题翻译：用验证程序分析模拟电路设计的方法
公开(公告)号：US20070168172A1
公开(公告)日：2007-07-19
申请号：US11334063
申请日：2006-01-17
申请人： Qiang Hong , Kevin Jones , Paul Wong
发明人： Qiang Hong , Kevin Jones , Paul Wong
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： Data structures and algorithms are provided to automatically generate an analog stimulus to apply to a simulation of the analog DUT. A constraint solver is provided to determine suitable values to use in the stimulus generation. The suitable values are random values within a range of allowed values. For example, a number of different stimuli are generated for successive application to the analog DUT, each with a different magnitude within a range of allowed magnitudes. Data structures and algorithms are provided to monitor analog electrical properties at nodes of the analog DUT. Data structures and algorithms are provided to define constraints on the analog electrical properties and determine whether the constraints were violated. Data structures and algorithms are provided to define simulation coverage conditions in the analog domain and determine whether the defined analog domain coverage conditions have been satisfied.
摘要翻译：提供数据结构和算法以自动生成模拟刺激以应用于模拟DUT的仿真。提供约束求解器以确定在刺激生成中使用的合适值。合适的值是允许值范围内的随机值。例如，产生用于连续施加到模拟DUT的多个不同的刺激，每个激励在允许的幅度范围内具有不同的幅度。提供数据结构和算法来监视模拟DUT的节点处的模拟电气特性。提供数据结构和算法来定义对模拟电气特性的限制，并确定约束是否被违反。提供数据结构和算法来定义模拟域中的模拟覆盖条件，并确定是否满足了定义的模拟域覆盖条件。

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