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1. 发明申请

WO2009150606A3 SEMICONDUCTOR DEVICE COMPRISING A SOLAR CELL, METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND APPARATUS COMPRISING A SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：WO2009150606A3
公开(公告)日：2009-12-17
申请号：PCT/IB2009/052426
申请日：2009-06-08
申请人： NXP B.V. , KONINKLIJKE PHILIPS ELECTRONICS N.V. , FURUKAWA, Yukiko , KLOOTWIJK, Johan Hendrik
发明人： FURUKAWA, Yukiko , KLOOTWIJK, Johan Hendrik
IPC分类号： H01L31/058 , H01L31/18
摘要： The invention relates to a semiconductor device includes a substrate (1000; 2000), a solar cell (1910; 2910) formed on the substrate (1000; 2000) and a battery (1900; 2900) formed on the substrate, the battery comprising a plurality of trench batteries in a plurality of corresponding trenches (1400; 2400) in the substrate (1000; 2000). The solar cell can include a silicon solar cell (1910) comprising a plurality of p-n junctions for, during use, receiving incident light and converting at least part of the received incident light into an electrical current. Alternatively, the solar cell can include an electrochemical cell (2910) for, during use, receiving incident light and converting at least part of the received incident light into an electrical current. The invention further relates to a manufacturing method for a semiconductor device. The invention further relates to an apparatus comprising a semiconductor device.

2. 发明申请

WO2010023575A1 A CAPACITOR AND A METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：电容器及其制造方法
公开(公告)号：WO2010023575A1
公开(公告)日：2010-03-04
申请号：PCT/IB2009/053532
申请日：2009-08-11
申请人： NXP B.V. , FURUKAWA, Yukiko , KOCHUPURACKAL, Jinesh Balakrishna Pillai , KLOOTWIJK, Johan Hendrik , PASVEER, Frank
发明人： FURUKAWA, Yukiko , KOCHUPURACKAL, Jinesh Balakrishna Pillai , KLOOTWIJK, Johan Hendrik , PASVEER, Frank
IPC分类号： H01G4/10 , H01G4/12 , H01G4/20
CPC分类号： H01G4/1227 , H01G4/10 , H01G4/20
摘要： A capacitor (110), wherein the capacitor (110) comprises a capacitor dielectric (112) comprising a dielectric matrix (114) of a first value of permittivity, and a plurality of nanoclusters (116) of a second value of permittivity which is larger than the first value of permittivity which are at least partially embedded in the dielectric matrix (114), wherein the plurality of nanoclusters (116) are formed in the dielectric matrix (114) by spontaneous nucleation.
摘要翻译：一种电容器（110），其中所述电容器（110）包括电容器电介质（112），所述电容器电介质（112）包括介电常数的第一值的介电矩阵（114）和介电常数的第二值的多个纳米团簇（116）比第一介电常数值至少部分地嵌入介质矩阵（114）中，其中多个纳米团簇（116）通过自发成核形成在电介质基体（114）中。

3. 发明申请

WO2006079979A2 A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：WO2006079979A2
公开(公告)日：2006-08-03
申请号：PCT/IB2006/050269
申请日：2006-01-25
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , AVIZA TECHNOLOGY, LTD. , FURUKAWA, Yukiko , MACNEIL, John
发明人： FURUKAWA, Yukiko , MACNEIL, John
CPC分类号： H01L21/31695 , H01L21/02126 , H01L21/02203 , H01L21/02211 , H01L21/02274 , H01L21/0234 , H01L21/02362 , H01L21/31144 , H01L21/3122 , H01L21/3212 , H01L21/76802 , H01L21/7682 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L2221/1047
摘要： This invention relates to a method of manufacturing a semiconductor device. In this method, a semiconductor device is provided comprising a substrate (10), the substrate (10) being covered with a low-k precursor layer (20) having a surface (25). After this step, a partial curing step is performed in which a dense layer (30) is formed at or near the surface (25) of a low-k precursor layer (20). This dense layer (30) can act as a protective layer (30). The low-k precursor material (20) is chosen from a group of materials having the property that they are applicable in a non-cured or partially cured state. The main advantage of this method is that no separate protective layer (30) needs to be provided to the low-k precursor layer (20), because the dense layer (30) is formed out of the low-k precursor layer (20) itself. The dense layer (30) therefore has a good adhesion to the low-k precursor layer (20).
摘要翻译：本发明涉及半导体器件的制造方法。在该方法中，提供了一种半导体器件，其包括衬底（10），衬底（10）被具有表面（25）的低k前体层（20）覆盖。在该步骤之后，进行部分固化步骤，其中在低k前体层（20）的表面（25）处或附近形成致密层（30）。该致密层（30）可用作保护层（30）。低k前体材料（20）选自具有它们可应用于非固化或部分固化状态的性质的一组材料。该方法的主要优点在于，由于致密层（30）由低k前体层（20）形成，所以不需要向低k前体层（20）提供单独的保护层（30）本身。因此，致密层（30）对低k前体层（20）具有良好的粘附性。

4. 发明申请

WO2005013350A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH A BIPOLAR TRANSISTOR AND DEVICE WITH A BIPOLAR TRANSISTOR 审中-公开
标题翻译：用双极晶体管制造半导体器件的方法和具有双极晶体管的器件
公开(公告)号：WO2005013350A1
公开(公告)日：2005-02-10
申请号：PCT/IB2004/051292
申请日：2004-07-26
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , NEUILLY, Francois, I. , DONKERS, Johannes, J., T., M. , AKSEN, Eyup , MELAI, Joost , FURUKAWA, Yukiko
发明人： NEUILLY, Francois, I. , DONKERS, Johannes, J., T., M. , AKSEN, Eyup , MELAI, Joost , FURUKAWA, Yukiko
IPC分类号： H01L21/331
CPC分类号： H01L29/66287 , H01L29/41708 , H01L29/66242
摘要： The invention relates to the manufacturing of a bipolar transistor device (10) in which the emitter is formed using a polycrystalline silicon region (14) which is prevent in a window in an insulating layer (13) and which extends laterally over said insulating layer (13). The silicon region (14) as well as another silicon region (12) bordering the stack of insulating region (13) and silicon region (14) are silicided by means of a metal layer (16) deposited over the structure. The sideface of the stack is provided with means to avoid bridging of the silicides (17) to be formed. According to the invention the means to prevent bridging of the silicides to be formed comprises that the side face of the stack is structured in such a way that the distance between the upper surface of the silicon region (14) and the upper surface the other silicon region (12) along the surface of the side face of the stack is made longer than the total thickness of the insulating layer (13) and the semiconductor layer (14). Through the increased path by either a positive or negative slope of the side face of the stack, the bridging of silicides is avoided. Preferred embodiments relate to how the side face of the stack is structured.
摘要翻译：本发明涉及双极晶体管器件（10）的制造，其中使用在绝缘层（13）的窗口中防止并且在所述绝缘层上横向延伸的多晶硅区域（14）形成发射极 13）。通过沉积在结构上的金属层（16）将硅区域（14）以及与绝缘区域（13）和硅区域（14）接合的另一个硅区域（12）被硅化。堆叠的侧面设置有避免要形成的硅化物（17）的桥接的装置。根据本发明，防止要形成的硅化物的桥接的手段包括：堆叠的侧面以如下方式构成：硅区域（14）的上表面与上表面之间的距离与另一硅使得沿着堆叠侧面的表面的区域（12）比绝缘层（13）和半导体层（14）的总厚度长。通过堆叠侧面的正或负斜率的增加的路径，避免了硅化物的桥接。优选实施例涉及如何构造堆叠的侧面。

5. 发明申请

WO2007125479A2 BIOSENSOR DEVICE 审中-公开
标题翻译：生物传感器设备
公开(公告)号：WO2007125479A2
公开(公告)日：2007-11-08
申请号：PCT/IB2007/051510
申请日：2007-04-24
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , FURUKAWA, Yukiko , ORSEL, Joukje, G. , STAPERT, Hendrik, R.
发明人： FURUKAWA, Yukiko , ORSEL, Joukje, G. , STAPERT, Hendrik, R.
IPC分类号： G01N33/50
CPC分类号： G01N33/5438 , G01N27/3275 , Y10T29/49002
摘要： A biosensor device (10) for detecting of molecules of an analyte in a sample (23) comprising: an identification element (18) comprising at least one self assembling monolayer (26) having a first surface, a transducer element (20) comprising a metal electrode (34) for receiving an electric signal from the reaction of the molecules in the sample with the at least one self assembling monolayer (26), and at least one electronic element (14, 16) for receiving the electric signal from the transducer element (20), for processing, and/or storing the electric signal. The at least one self-assembling monolayer (26) comprises at least one carboxylic acid-group for coupling the at least one self-assembling monolayer (26) to the surface (32) of the metal electrode (34).
摘要翻译：一种用于检测样品（23）中分析物的分子的生物传感器装置（10），包括：识别元件（18），包括至少一个具有第一表面的自组装单层（26），换能器元件（20）金属电极（34），用于从样品中的分子与至少一个自组装单层（26）的反应接收电信号;以及至少一个电子元件（14,16），用于从换能器接收电信号元件（20），用于处理和/或存储电信号。所述至少一个自组装单层（26）包含至少一个用于将所述至少一个自组装单层（26）耦合到所述金属电极（34）的表面（32）的羧酸基团。

6. 发明申请

WO2006067678A1 SEMICONDUCTOR DEVICE WITH A SUPERPARAELECTRIC GATE INSULATOR 审中-公开
标题翻译：具有超级绝缘栅绝缘体的半导体器件
公开(公告)号：WO2006067678A1
公开(公告)日：2006-06-29
申请号：PCT/IB2005/054216
申请日：2005-12-13
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , FURUKAWA, Yukiko , MUTSAERS, Cornelis, A., H., A.
发明人： FURUKAWA, Yukiko , MUTSAERS, Cornelis, A., H., A.
IPC分类号： H01L29/51
CPC分类号： H01L29/7813 , H01L21/31691 , H01L29/516 , H01L29/517 , H01L29/66734
摘要： A semiconductor device includes a channel region 18 of semiconductor, a conductive gate electrode 12 adjacent to the channel region 18 and a gate dielectric 10 between the conductive gate electrode 12 and the channel region 18. The gate dielectric 10 is formed of a material that is a ferroelectric in bulk but in a superparaelectric state. The gate dielectric may be for instance of formula AXO 3 , where A is a group I or Il element, and X is titanium, niobium, zirconium and/or hafnium. Such a gate dielectric 10 may be formed for example by low temperature deposition of the gate dielectric 10 or by using dopants of metal oxides to prevent domain growth, or both.
摘要翻译：半导体器件包括半导体的沟道区域18，与沟道区域18相邻的导电栅电极12和在导电栅电极12与沟道区域18之间的栅极电介质10.栅极电介质10由材料形成一个铁电体，但处于超级电介质状态。栅极电介质可以是例如式AXO 3，其中A是I或II族元素，X是钛，铌，锆和/或铪。这样的栅极电介质10可以例如通过栅极电介质10的低温沉积或通过使用金属氧化物的掺杂剂来防止域生长或二者形成。

7. 发明申请

WO2006064416A1 A SEMICONDUCTOR DEVICE HAVING A RECESS WITH NON-POROUS WALLS IN A POROUS DIELECTRIC AND A METHOD OF MANUFACTURING SUCH A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：具有多孔电介质中的非多孔性凹坑的半导体器件和制造这种半导体器件的方法
公开(公告)号：WO2006064416A1
公开(公告)日：2006-06-22
申请号：PCT/IB2005/054101
申请日：2005-12-07
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , FURUKAWA, Yukiko , MACNEIL, John
发明人： FURUKAWA, Yukiko , MACNEIL, John
IPC分类号： H01L21/768
CPC分类号： H01L21/76814 , H01L21/7682 , H01L21/76826 , H01L21/76831 , H01L2221/1047
摘要： This invention relates to a semiconductor device and a method of manufacturing such a device. An embodiment of the semiconductor device (1) according to the invention comprises a substrate (10), a dielectric layer (21) applied to the substrate (10), the dielectric layer (21) having a recess (50), the recess (50) having walls defined by the dielectric layer (21), the recess (50) being filled with a conductor (90), the conductor (90) being embedded by a barrier layer (85) at least on sidewalls of the conductor (90), while the dielectric layer (21) comprises non-porous regions (75) adjacent to the walls of the recess (50) and porous regions (25) away from the recess (50). The conductor (90) is provided with a capping layer (95). It is an important aspect of the invention that the width W of the non- porous regions (75) is smaller than 40 nanometer. The smaller the width of the modified regions the lower the effective k- value. A further important aspect of the invention is that the modified layers 75 are substantially free of silicon oxide like material.
摘要翻译：本发明涉及一种半导体器件及其制造方法。根据本发明的半导体器件（1）的实施例包括衬底（10），施加到衬底（10）的电介质层（21），电介质层（21）具有凹部（50），凹部 50）具有由介电层（21）限定的壁，凹部（50）填充有导体（90），导体（90）至少在导体（90）的侧壁上被阻挡层（85）嵌入），而电介质层（21）包括与凹部（50）的壁相邻的非多孔区域（75）和远离凹部（50）的多孔区域（25）。导体（90）设置有覆盖层（95）。本发明的一个重要方面是，非多孔区域（75）的宽度W小于40纳米。修改区域的宽度越小，有效k值越低。本发明的另一重要方面是改性层75基本上不含氧化硅类材料。

8. 发明申请

WO2004102279A3 METHOD OF MANUFACTURING AN ELECTRONIC DEVICE 审中-公开
公开(公告)号：WO2004102279A3
公开(公告)日：2004-11-25
申请号：PCT/IB2004/050664
申请日：2004-05-12
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , FURUKAWA, Yukiko , WOLTERS, Robertus, A., M.
发明人： FURUKAWA, Yukiko , WOLTERS, Robertus, A., M.
IPC分类号： G03F7/40
摘要： A method of manufacturing an electronic device is provided wherein an interconnect is made using 193 nm lithography. No deformation of the desired linewidth takes place in that during a plasma gas is used which dissociates in low-weight ions. The electronic device is particularly an integrated circuit.

9. 发明申请

WO2004070831A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED BY USING SUCH A METHOD 审中-公开
标题翻译：制造使用这种方法获得的半导体器件和半导体器件的方法
公开(公告)号：WO2004070831A1
公开(公告)日：2004-08-19
申请号：PCT/IB2004/050026
申请日：2004-01-15
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW, , FURUKAWA, Yukiko
发明人： FURUKAWA, Yukiko
IPC分类号： H01L21/768
CPC分类号： H01L21/76808 , H01L2221/1031
摘要： The invention relates to a method of manufacturing a semiconductor device (10) with a semiconductor body (1) and a substrate (2) comprising at least one semiconductor element (3) and provided with at least one connection region (4) and an overlying stripe-shaped connection conductor (5) which is connected to the connection region (4), which connection conductor and connection region are both recessed in a dielectric material, where subsequently a first dielectric layer (6), a hard mask layer (7), and a second dielectric layer (8) are deposited on the semiconductor body (1), where at the location of the connection region (4) to be formed, a via (44) is formed in the first dielectric layer (6) by means of plasma etching using a plasma containing a compound of carbon and fluor, and in the presence of a patterned fotoresist layer deposited on top of the structure and at the location of the connection conductor (6) to be formed, a trench (55) is formed in the second dielectric layer (8) by means of plasma etching, which via (44) and trench (55) are filled with an electrically conducting material in order to form, respectively, the connection region (4) and the connection conductor (5), and where before the trench (55) is formed, the already formed via (44) is filled with an organic material (20). According to the invention, the material of the first dielectric layer (6) and the etch conditions during formation of the via (44) in the first dielectric layer (6) by plasma etching are chosen such that during etching the via (44), said via (44) is at the same time substantially completely filled with the organic material (20), which organic material (20) is formed from organic material already present within the structure and within the plasma. Relevant conditions - apart from the presence of the resist layer during etching and the use therein of a compound of carbon and fluor - relate to the choice of the material of the first (and second) dielectric layer(s) 6,8 and the power during etching of these layers (6,8).
摘要翻译：本发明涉及一种制造具有半导体本体（1）的半导体器件（10）和包括至少一个半导体元件（3）并具有至少一个连接区域（4）和上覆连接到连接区域（4）的条形连接导体（5），该连接导体和连接区域均凹入介电材料中，随后第一介电层（6），硬掩模层（7），并且在所述半导体主体（1）上沉积第二电介质层（8），其中在要形成的连接区域（4）的位置处，在第一介电层（6）中通过（44）形成通孔（44），通孔使用含有碳和氟化合物的等离子体进行等离子体蚀刻的方法，并且在沉积在结构的顶部和待形成的连接导体（6）的位置处的图案化的光刻胶层存在下，形成沟槽（55）在第二电介质层（8）中形成等离子体蚀刻装置，其通过（44）和沟槽（55）填充有导电材料，以分别形成连接区域（4）和连接导体（5），并且在沟槽（55）之前），已经形成的通孔（44）填充有机材料（20）。根据本发明，选择第一介电层（6）的材料和通过等离子体蚀刻在第一介电层（6）中形成通孔（44）期间的蚀刻条件，使得在蚀刻通孔（44）期间，所述通孔（44）同时基本上完全填充有机材料（20），该有机材料（20）由已经存在于结构内部和等离子体内的有机材料形成。相关条件 - 除了蚀刻期间抗蚀剂层的存在以及碳和氟化合物中的使用 - 涉及第一（和第二）电介质层6,8的材料的选择和功率在蚀刻这些层（6,8）期间。

10. 发明申请

WO2009047669A2 A LIGHT-ACTIVATED DENTIFRICE AND ASSOCIATED LIGHT IRRADIATING TOOTHBRUSH 审中-公开
标题翻译：一种活化的光泽和相关的光照射牙刷
公开(公告)号：WO2009047669A2
公开(公告)日：2009-04-16
申请号：PCT/IB2008/054000
申请日：2008-10-01
申请人： KONINKLIJKE PHILIPS ELECTRONICS, N.V. , U.S. PHILIPS CORPORATION , FURUKAWA, Yukiko , GOTTENBOS, Bart , JANSSEN, Jozef Johannes Maria
发明人： FURUKAWA, Yukiko , GOTTENBOS, Bart , JANSSEN, Jozef Johannes Maria
IPC分类号： A61Q11/00 , A61K8/29 , A46B15/00
CPC分类号： A46B15/0002 , A46B15/0034 , A46B15/0036 , A46B2200/1066 , A61K8/29 , A61K2800/81 , A61N5/0601 , A61N5/0603 , A61N5/062 , A61N5/0624 , A61N2005/0606 , A61N2005/0651 , A61N2005/0662 , A61Q11/00 , A61Q17/005
摘要： A combination of a treatment device (10) having a light source in a head end portion emitting light in the visible range for use inside the mouth with a dentifrice (21) which comprises a mixture of a liquid medium and a powder comprising particles (13) having a titanium nitride (TiN) core (15) with a titanium oxide (TiO 2 ) outer shell (17). The mixture when applied to the teeth and irradiated by the light source in the mouth results in the activation of the TiO 2 , resulting in up to 90% and more of the oral bacteria in contact with the dentifrice and exposed to the light being killed within a given time period.
摘要翻译：治疗装置（10）的组合，其具有在头部端部中的光源，所述头部部分在所述可见范围内发射光以在所述口内使用，所述洁牙剂包括液体介质和包含颗粒的粉末的混合物（13））具有钛氧化物（TiO 2）外壳（17）的氮化钛（TiN）芯（15）。混合物当应用于牙齿并由口腔中的光源照射时，导致TiO 2的活化，导致与洁齿剂接触的口腔细菌高达90％以上，并暴露于在一个给定时间段

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