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1. 发明申请

WO2005059989A1 METHOD TO REDUCE SEEDLAYER TOPOGRAPHY IN BICMOS PROCESS 审中-公开
标题翻译：减少BICMOS工艺中SEEDLAYER TOPOGRAPHY的方法
公开(公告)号：WO2005059989A1
公开(公告)日：2005-06-30
申请号：PCT/IB2004/052742
申请日：2004-12-09
申请人： KONINKLIJKE PHILIPS ELECTRONICS, N.V. , U.S. PHILIPS CORPORATION , DONKERS, Johannes J.T.M. , MAGNEE, Petrus, H., C. , KUNNEN, Eddy , NEUILLY, Francois, I.
发明人： DONKERS, Johannes J.T.M. , MAGNEE, Petrus, H., C. , KUNNEN, Eddy , NEUILLY, Francois, I.
IPC分类号： H01L21/331
CPC分类号： H01L21/8249 , H01L29/66242 , H01L29/66272
摘要： A method for forming an epitaxial base layer in a bipolar device. The method comprises the steps of: providing a structure having a field isolation oxide region (12) adjacent to an active silicon region (10); forming a silicon nitride/silicon stack (14, 16) above the field isolation oxide region (12), wherein the silicon nitride/silicon stack (14, 16) includes a top layer of silicon (14) and a bottom layer of silicon nitride (16); performing an etch to the silicon nitride/silicon stack (14, 16) to form a stepped seed layer, wherein the top layer of silicon is etched laterally at the same time the bottom layer of silicon nitride is etched; and growing an Si/SiGe/Si stack (20) over the stepped seed layer and active region (10).
摘要翻译：一种在双极器件中形成外延基底层的方法。该方法包括以下步骤：提供具有与有源硅区域（10）相邻的场隔离氧化物区域（12）的结构; 在所述场隔离氧化物区域（12）上形成氮化硅/硅堆叠（14,16），其中所述氮化硅/硅堆叠（14,16）包括硅顶层（14）和底层氮化硅（16）; 对所述氮化硅/硅堆叠（14,16）进行蚀刻以形成阶梯式种子层，其中在蚀刻所述底层氮化硅的同时侧向蚀刻所述硅顶层; 以及在所述阶梯式种子层和有源区域（10）上生长Si / SiGe / Si堆叠（20）。

2. 发明申请

WO2005013350A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH A BIPOLAR TRANSISTOR AND DEVICE WITH A BIPOLAR TRANSISTOR 审中-公开
标题翻译：用双极晶体管制造半导体器件的方法和具有双极晶体管的器件
公开(公告)号：WO2005013350A1
公开(公告)日：2005-02-10
申请号：PCT/IB2004/051292
申请日：2004-07-26
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , NEUILLY, Francois, I. , DONKERS, Johannes, J., T., M. , AKSEN, Eyup , MELAI, Joost , FURUKAWA, Yukiko
发明人： NEUILLY, Francois, I. , DONKERS, Johannes, J., T., M. , AKSEN, Eyup , MELAI, Joost , FURUKAWA, Yukiko
IPC分类号： H01L21/331
CPC分类号： H01L29/66287 , H01L29/41708 , H01L29/66242
摘要： The invention relates to the manufacturing of a bipolar transistor device (10) in which the emitter is formed using a polycrystalline silicon region (14) which is prevent in a window in an insulating layer (13) and which extends laterally over said insulating layer (13). The silicon region (14) as well as another silicon region (12) bordering the stack of insulating region (13) and silicon region (14) are silicided by means of a metal layer (16) deposited over the structure. The sideface of the stack is provided with means to avoid bridging of the silicides (17) to be formed. According to the invention the means to prevent bridging of the silicides to be formed comprises that the side face of the stack is structured in such a way that the distance between the upper surface of the silicon region (14) and the upper surface the other silicon region (12) along the surface of the side face of the stack is made longer than the total thickness of the insulating layer (13) and the semiconductor layer (14). Through the increased path by either a positive or negative slope of the side face of the stack, the bridging of silicides is avoided. Preferred embodiments relate to how the side face of the stack is structured.
摘要翻译：本发明涉及双极晶体管器件（10）的制造，其中使用在绝缘层（13）的窗口中防止并且在所述绝缘层上横向延伸的多晶硅区域（14）形成发射极 13）。通过沉积在结构上的金属层（16）将硅区域（14）以及与绝缘区域（13）和硅区域（14）接合的另一个硅区域（12）被硅化。堆叠的侧面设置有避免要形成的硅化物（17）的桥接的装置。根据本发明，防止要形成的硅化物的桥接的手段包括：堆叠的侧面以如下方式构成：硅区域（14）的上表面与上表面之间的距离与另一硅使得沿着堆叠侧面的表面的区域（12）比绝缘层（13）和半导体层（14）的总厚度长。通过堆叠侧面的正或负斜率的增加的路径，避免了硅化物的桥接。优选实施例涉及如何构造堆叠的侧面。

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