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1. 发明授权

US5784187A Wafer level integration of an optical modulator and III-V photodetector 失效
标题翻译：光调制器和III-V光电探测器的晶片级集成
公开(公告)号：US5784187A
公开(公告)日：1998-07-21
申请号：US685174
申请日：1996-07-23
申请人： John E. Cunningham , Joseph E. Ford , Keith Wayne Goossen , James A. Walker
发明人： John E. Cunningham , Joseph E. Ford , Keith Wayne Goossen , James A. Walker
IPC分类号： H01L21/8247 , G02B26/00 , H01L27/115 , H01L27/144 , H01L29/788 , H01L29/792 , G02F1/03
CPC分类号： H01L27/1443 , G02B26/00
摘要： A device having an optical modulation region and a photodetection region formed on a single wafer, and methods for making the device, are disclosed. In one configuration, the device consists of an off-axis nonpolar substrate that has, on one side, a region suitable for modulating an optical signal. The other side of the substrate has a region suitable for photodetection. The region suitable for modulating an optical signal includes a movable layer suspended over the substrate. As the movable layer moves under an applied voltage, the reflectivity of the modulation region changes. The photodetection region consists of a plurality of III-V layers. In a second configuration, the device consists of a III-V substrate that has a region for photodetection disposed on one surface. A region for optical modulation is disposed on the photodetection region.
摘要翻译：公开了具有形成在单个晶片上的光学调制区域和光电检测区域的装置及其制造方法。在一种配置中，该器件由离轴非极性衬底组成，该衬底在一侧具有适于调制光信号的区域。衬底的另一侧具有适于光电检测的区域。适于调制光信号的区域包括悬浮在衬底上的可移动层。随着移动层在施加的电压下移动，调制区域的反射率发生变化。光检测区域由多个III-V层组成。在第二种配置中，器件由具有设置在一个表面上的用于光电检测的区域的III-V衬底组成。用于光学调制的区域设置在光电检测区域上。

2. 发明授权

US5767997A Method and arrangement for a combined modulator/photodetector 失效
标题翻译：组合调制器/光电探测器的方法和装置
公开(公告)号：US5767997A
公开(公告)日：1998-06-16
申请号：US675980
申请日：1996-07-05
申请人： David John Bishop , Keith Wayne Goossen , James A. Walker
发明人： David John Bishop , Keith Wayne Goossen , James A. Walker
IPC分类号： H04B10/24 , H04B10/00
CPC分类号： H04B10/40
摘要： Apparatus and methods for a combined optical modulator/photodetector are disclosed. A modulator chip is attached to a photodetector chip using a non-conductive epoxy or solder. The combined modulator/photodetector can be configured in at least two ways. In one configuration, the modulator is located on the upper surface of a chip that is attached, at its lower surface, to a photodetector containing chip. In another configuration, the modulator is located on the lower surface of the modulator chip, which is again attached at its lower surface to the pbotodetector chip. By combining the modulator and photodetector in the manner described above, they can be placed in a single package, resulting in reduced packaging costs versus a separately packaged modulator and a separately packaged photodetector. Moreover, feedback from the photodetector can used to optimize the operation of micromechanical optical modulators.
摘要翻译：公开了用于组合光调制器/光电检测器的装置和方法。使用非导电环氧树脂或焊料将调制器芯片附接到光电检测器芯片。组合的调制器/光电检测器可以至少两种方式配置。在一种配置中，调制器位于芯片的上表面上，芯片的下表面附接到包含光电检测器的芯片。在另一种配置中，调制器位于调制器芯片的下表面上，该调制器芯片的下表面再次连接到波导检测器芯片。通过以上述方式组合调制器和光电检测器，它们可以放置在单个封装中，从而与单独封装的调制器和单独封装的光电检测器相比降低了封装成本。此外，来自光电检测器的反馈可用于优化微机械光学调制器的操作。

3. 发明授权

US5668023A Composition for off-axis growth sites on non-polar substrates 失效
标题翻译：非极性基质上离轴生长位点的组成
公开(公告)号：US5668023A
公开(公告)日：1997-09-16
申请号：US676989
申请日：1996-07-08
申请人： Keith Wayne Goossen , James A. Walker
发明人： Keith Wayne Goossen , James A. Walker
IPC分类号： C23C14/34 , H01L21/027 , H01L21/20 , H01L21/308 , H01L21/336 , H01L21/365 , H01L29/78 , H01L21/265
CPC分类号： H01L21/3085 , H01L21/0274 , H01L21/3083 , Y10S438/933
摘要： Nonpolar substrates comprising off-axis growth regions for the growth of polar semiconductors, and a method for making such substrates, are disclosed. According to the invention, an erodible material, such as a photoresist, is applied to a substrate at a site and is exposed to radiation at that site which has an linear variation in energy at the surface of the erodible material. Due to this variation in exposure energy, a taper results in the erodible material after development. The tapered region is then etched in a manner which etches both the erodible layer and the underlying substrate. The taper in the erodible layer provides a varying attenuation during the etching process such that the taper of the erodible layer is transferred to the substrate.
摘要翻译：公开了包含用于极性半导体的生长的离轴生长区域的非极性底物及其制造方法。根据本发明，一种可蚀刻的材料，例如光致抗蚀剂，被施加到一个位置处的基底上，并且暴露在该可剥蚀材料表面处的能量线性变化的位置。由于暴露能量的这种变化，锥形导致显影后的可侵蚀材料。然后以蚀刻两个可侵蚀层和下面的衬底的方式蚀刻该锥形区域。可侵蚀层中的锥度在蚀刻工艺期间提供变化的衰减，使得可侵蚀层的锥度被转移到衬底。

4. 发明授权

US5897333A Method for forming integrated composite semiconductor devices 失效
标题翻译：形成集成复合半导体器件的方法
公开(公告)号：US5897333A
公开(公告)日：1999-04-27
申请号：US818813
申请日：1997-03-14
申请人： Keith Wayne Goossen , James A. Walker
发明人： Keith Wayne Goossen , James A. Walker
IPC分类号： H01L21/98 , H01L25/16 , H01L21/30 , H01L21/46
CPC分类号： H01L25/0657 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L25/167 , H01L25/50 , H01L2221/68363 , H01L2224/04042 , H01L2224/81005 , H01L2224/81203 , H01L2225/06513 , H01L24/16 , H01L24/81 , H01L2924/12042 , H01L2924/14 , Y10S148/135 , Y10S438/977
摘要： In an improved method for manufacturing an integrated composite semiconductor device according to the present invention, a semiconductor-based stop-etch layer having holes therein at selected sites is disposed over the epoxy or other flowable hardener used in flip-chip bonding. The hardener underneath the openings in the stop-etch layer is subtantially removed via a dry etch applied therethrough, exposing desired structure, such as bonding pads, formerly covered by the hardener. The epoxy underneath the stop-etch layer is substantially preserved.
摘要翻译：在根据本发明的用于制造集成复合半导体器件的改进方法中，在用于倒装芯片接合的环氧树脂或其它可流动硬化剂上设置在选定位置具有孔的基于半导体的阻挡蚀刻层。通过在其中施加的干蚀刻，在停止蚀刻层中的开口下方的固化剂被去除，暴露出所需的结构，例如以前被固化剂覆盖的键合焊盘。停止蚀刻层下面的环氧树脂基本上被保留。

5. 发明授权

US5858814A Hybrid chip and method therefor 失效
标题翻译：混合芯片及其方法
公开(公告)号：US5858814A
公开(公告)日：1999-01-12
申请号：US766214
申请日：1996-12-12
申请人： Keith Wayne Goossen , James A. Walker
发明人： Keith Wayne Goossen , James A. Walker
IPC分类号： H01L21/68 , H01L21/98 , H01L21/44
CPC分类号： H01L21/6835 , H01L25/50 , H01L2221/68359 , H01L2221/68363 , H01L2224/16 , H01L2924/01078 , H01L2924/01079 , H01L2924/1305
摘要： A hybrid chip having at least two different types of semiconductor devices co-located on a common substrate, and a method therefor, are disclosed. The devices have different multiple epitaxial layer structures so that each different type of device is first grown on a separate appropriately-selected substrate, and then attached to the common substrate. According to the method, a first device is attached to the common substrate using flip-chip bonding methods. Flip-chip bonding involves attaching the device and the substrate at bonding pads, flowing a flowable hardener between the first device and the common substrate and allowing it to harden, and then removing the substrate upon which the first device was grown. The hardener is removed before attaching the second type of device via flip-chip bonding.
摘要翻译：公开了具有共同位于公共基板上的至少两种不同类型的半导体器件的混合芯片及其方法。这些器件具有不同的多个外延层结构，使得每个不同类型的器件首先在单独的适当选择的衬底上生长，然后连接到公共衬底。根据该方法，使用倒装芯片接合方法将第一器件附接到公共衬底。倒装芯片粘合包括将装置和基板连接在接合焊盘处，使可流动的固化剂在第一装置和公共基板之间流动并允许其硬化，然后移除其上生长第一装置的基板。在通过倒装芯片接合连接第二类型的器件之前去除硬化剂。

6. 发明授权

US5468689A Method for preparation of silicon nitride gallium diffusion barrier for use in molecular beam epitaxial growth of gallium arsenide 失效
标题翻译：制备用于砷化镓分子束外延生长的氮化硅镓扩散阻挡层的方法
公开(公告)号：US5468689A
公开(公告)日：1995-11-21
申请号：US153719
申请日：1993-11-16
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
IPC分类号： C23C16/50 , H01L21/203 , H01L21/205 , H01L21/318 , H01L21/02 , H01L21/20
CPC分类号： H01L21/3185 , Y10S438/933
摘要： A technique is described for the preparation of a thin film of a silicon nitride diffusion barrier to gallium on a silicon integrated circuit chip. The technique involves reacting nitrogen and silane in a ratio of 53:1 to 300:1 in a plasma enhanced chemical vapor deposition apparatus. The described technique is of interest for use in the monolithic integration of interconnected GaAs/AlGaAs double heterostructures, modulators and silicon MOSFET structures.
摘要翻译：描述了一种用于在硅集成电路芯片上制备氮化硅扩散阻挡层至镓的薄膜的技术。该技术涉及在等离子体增强化学气相沉积装置中使氮和硅烷以53:1至300:1的比例反应。所描述的技术对于用于互连的GaAs / AlGaAs双异质结构，调制器和硅MOSFET结构的单片集成是有意义的。

7. 发明授权

US5510277A Surface treatment for silicon substrates 失效
标题翻译：硅衬底的表面处理
公开(公告)号：US5510277A
公开(公告)日：1996-04-23
申请号：US268137
申请日：1994-06-29
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
IPC分类号： H01L21/302 , H01L21/203 , H01L21/265 , H01L21/306 , H01L21/3065
CPC分类号： H01L21/02046 , Y10S438/974
摘要： A method for desorbing the surface oxide on a silicon substrate is performed by implanting particles such at atomic or ionic hydrogen into the oxide layer on the silicon substrate. The oxide is then removed by breaking the bonds between the silicon and oxygen atoms within the oxide. The bonds may be broken by heating the substrate, for example. The temperature to which the substrate must be raised is substantially less than the temperature required to desorb an oxide layer that has not undergone an implantation step. In one particular example, the particles implanted into the oxide surface are hydrogen ions generated by electron cyclotron resonance.
摘要翻译：在硅衬底上解吸表面氧化物的方法是通过将诸如原子或离子氢的颗粒注入硅衬底上的氧化物层来进行的。然后通过破坏氧化物内的硅和氧原子之间的键来去除氧化物。例如，可以通过加热衬底来破坏键合。必须升高衬底的温度基本上小于解吸未经植入步骤的氧化物层所需的温度。在一个具体实例中，注入氧化物表面的颗粒是通过电子回旋共振产生的氢离子。

8. 发明授权

US5589404A Monolithically integrated VLSI optoelectronic circuits and a method of fabricating the same 失效
标题翻译：单片集成VLSI光电子电路及其制造方法
公开(公告)号：US5589404A
公开(公告)日：1996-12-31
申请号：US284026
申请日：1994-08-01
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
IPC分类号： G02F1/015 , H01L27/144 , H01L27/15 , H03K19/0952 , H01L31/18
CPC分类号： H01L27/15 , H01L27/1443 , Y10S438/974
摘要： A monolithically integrated, optoelectronic VLSI circuit is fabricated by growing optical devices on the compound semiconductor surface of a VLSI chip or wafer having pre-existing electronic devices formed thereon. In accordance with an illustrative embodiment of the present invention, a large array of surface normal optical modulating devices such as multiple quantum well modulators is grown on an impurity free surface of a VLSI chip having an array of FETs already provided thereon. The growth of such devices takes place at temperatures below 430.degree. C. on a compound semiconductor surface which has a highly ordered atomic structure. An optoelectronic switch constructed in this manner is capable of addressing electronic chips in systems handling 10,000 or more input/output optical beams.
摘要翻译：通过在其上形成有预先存在的电子器件的VLSI芯片或晶片的化合物半导体表面上生长光学器件来制造单片集成的光电VLSI电路。根据本发明的说明性实施例，在具有已经提供在其上的FET阵列的VLSI芯片的无杂质表面上生长诸如多量子阱调制器的大量表面法向光调制器件阵列。在具有高度有序原子结构的化合物半导体表面上，这种器件的生长发生在低于430℃的温度下。以这种方式构造的光电开关能够在处理10,000个或更多个输入/输出光束的系统中寻址电子芯片。

9. 发明授权

US5943454A Freespace optical bypass-exchange switch 失效
标题翻译：自由空间光旁路交换机
公开(公告)号：US5943454A
公开(公告)日：1999-08-24
申请号：US912883
申请日：1997-08-15
申请人： Vladimir A. Aksyuk , David J. Bishop , Joseph E. Ford , James A. Walker
发明人： Vladimir A. Aksyuk , David J. Bishop , Joseph E. Ford , James A. Walker
IPC分类号： G02F1/29 , G02B6/35 , G02B6/26
CPC分类号： G02B6/3514 , G02B6/353 , G02B6/3548 , G02B6/3562
摘要： A bypass-exchange switch for switching the path of at least one optical signal includes a telecentric imaging device for high efficiency coupling of the optical signal into either of two outputs. The switch also includes an optical director for changing the operating mode of the switch from an exchange state to a bypass state wherein the different outputs are selected. The optical director is implemented as a variable reflectivity mirror, or a mechanically-actuated mirror. The switch may include a wavelength selective filter for permanently bypassing or exchanging preselected wavelengths of the optical signals.
摘要翻译：用于切换至少一个光信号的路径的旁路交换开关包括用于将光信号高效耦合到两个输出中的任一个的远心成像装置。开关还包括光导向器，用于将开关的操作模式从交换状态改变到旁路状态，其中选择不同的输出。光学导向器被实现为可变反射镜或机械致动的反射镜。开关可以包括用于永久旁路或交换光信号的预选波长的波长选择滤波器。

10. 发明授权

US5815616A Optical packaging assembly for reflective devices 失效
标题翻译：用于反光装置的光学包装组件
公开(公告)号：US5815616A
公开(公告)日：1998-09-29
申请号：US778119
申请日：1997-01-02
申请人： David J. Bishop , Joseph E. Ford , William M. MacDonald , Rene R. Ruel , James A. Walker
发明人： David J. Bishop , Joseph E. Ford , William M. MacDonald , Rene R. Ruel , James A. Walker
IPC分类号： G02B6/36 , G02B6/42 , G02B6/26
CPC分类号： G02B6/4246 , G02B6/4202 , G02B6/4232
摘要： Packaging for a reflective optical device, methods for manufacturing the packaging, and use of the packaging in an optical communications system are disclosed. The optical package assembly includes an optical package and an optical package subassembly. The optical package receives the optical subassembly, which includes a packaging component attached to a reflective optical device. An end of the optical package receives a optical fiber that is delivered to a fiber alignment region in the packaging component that is in optical communication with the reflective optical device.
摘要翻译：公开了用于反射光学装置的包装，用于制造包装的方法以及在光通信系统中使用包装。光学封装组件包括光学封装和光学封装子组件。光学组件接收光学子组件，其包括附接到反射光学装置的封装部件。光学封装的一端接收光纤，该光纤被传送到与反射型光学器件光学通信的封装部件中的光纤对准区域。

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