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1. 发明授权

US5784187A Wafer level integration of an optical modulator and III-V photodetector 失效
标题翻译：光调制器和III-V光电探测器的晶片级集成
公开(公告)号：US5784187A
公开(公告)日：1998-07-21
申请号：US685174
申请日：1996-07-23
申请人： John E. Cunningham , Joseph E. Ford , Keith Wayne Goossen , James A. Walker
发明人： John E. Cunningham , Joseph E. Ford , Keith Wayne Goossen , James A. Walker
IPC分类号： H01L21/8247 , G02B26/00 , H01L27/115 , H01L27/144 , H01L29/788 , H01L29/792 , G02F1/03
CPC分类号： H01L27/1443 , G02B26/00
摘要： A device having an optical modulation region and a photodetection region formed on a single wafer, and methods for making the device, are disclosed. In one configuration, the device consists of an off-axis nonpolar substrate that has, on one side, a region suitable for modulating an optical signal. The other side of the substrate has a region suitable for photodetection. The region suitable for modulating an optical signal includes a movable layer suspended over the substrate. As the movable layer moves under an applied voltage, the reflectivity of the modulation region changes. The photodetection region consists of a plurality of III-V layers. In a second configuration, the device consists of a III-V substrate that has a region for photodetection disposed on one surface. A region for optical modulation is disposed on the photodetection region.
摘要翻译：公开了具有形成在单个晶片上的光学调制区域和光电检测区域的装置及其制造方法。在一种配置中，该器件由离轴非极性衬底组成，该衬底在一侧具有适于调制光信号的区域。衬底的另一侧具有适于光电检测的区域。适于调制光信号的区域包括悬浮在衬底上的可移动层。随着移动层在施加的电压下移动，调制区域的反射率发生变化。光检测区域由多个III-V层组成。在第二种配置中，器件由具有设置在一个表面上的用于光电检测的区域的III-V衬底组成。用于光学调制的区域设置在光电检测区域上。

2. 发明授权

US5468689A Method for preparation of silicon nitride gallium diffusion barrier for use in molecular beam epitaxial growth of gallium arsenide 失效
标题翻译：制备用于砷化镓分子束外延生长的氮化硅镓扩散阻挡层的方法
公开(公告)号：US5468689A
公开(公告)日：1995-11-21
申请号：US153719
申请日：1993-11-16
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
IPC分类号： C23C16/50 , H01L21/203 , H01L21/205 , H01L21/318 , H01L21/02 , H01L21/20
CPC分类号： H01L21/3185 , Y10S438/933
摘要： A technique is described for the preparation of a thin film of a silicon nitride diffusion barrier to gallium on a silicon integrated circuit chip. The technique involves reacting nitrogen and silane in a ratio of 53:1 to 300:1 in a plasma enhanced chemical vapor deposition apparatus. The described technique is of interest for use in the monolithic integration of interconnected GaAs/AlGaAs double heterostructures, modulators and silicon MOSFET structures.
摘要翻译：描述了一种用于在硅集成电路芯片上制备氮化硅扩散阻挡层至镓的薄膜的技术。该技术涉及在等离子体增强化学气相沉积装置中使氮和硅烷以53:1至300:1的比例反应。所描述的技术对于用于互连的GaAs / AlGaAs双异质结构，调制器和硅MOSFET结构的单片集成是有意义的。

3. 发明授权

US5510277A Surface treatment for silicon substrates 失效
标题翻译：硅衬底的表面处理
公开(公告)号：US5510277A
公开(公告)日：1996-04-23
申请号：US268137
申请日：1994-06-29
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
IPC分类号： H01L21/302 , H01L21/203 , H01L21/265 , H01L21/306 , H01L21/3065
CPC分类号： H01L21/02046 , Y10S438/974
摘要： A method for desorbing the surface oxide on a silicon substrate is performed by implanting particles such at atomic or ionic hydrogen into the oxide layer on the silicon substrate. The oxide is then removed by breaking the bonds between the silicon and oxygen atoms within the oxide. The bonds may be broken by heating the substrate, for example. The temperature to which the substrate must be raised is substantially less than the temperature required to desorb an oxide layer that has not undergone an implantation step. In one particular example, the particles implanted into the oxide surface are hydrogen ions generated by electron cyclotron resonance.
摘要翻译：在硅衬底上解吸表面氧化物的方法是通过将诸如原子或离子氢的颗粒注入硅衬底上的氧化物层来进行的。然后通过破坏氧化物内的硅和氧原子之间的键来去除氧化物。例如，可以通过加热衬底来破坏键合。必须升高衬底的温度基本上小于解吸未经植入步骤的氧化物层所需的温度。在一个具体实例中，注入氧化物表面的颗粒是通过电子回旋共振产生的氢离子。

4. 发明授权

US5589404A Monolithically integrated VLSI optoelectronic circuits and a method of fabricating the same 失效
标题翻译：单片集成VLSI光电子电路及其制造方法
公开(公告)号：US5589404A
公开(公告)日：1996-12-31
申请号：US284026
申请日：1994-08-01
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
IPC分类号： G02F1/015 , H01L27/144 , H01L27/15 , H03K19/0952 , H01L31/18
CPC分类号： H01L27/15 , H01L27/1443 , Y10S438/974
摘要： A monolithically integrated, optoelectronic VLSI circuit is fabricated by growing optical devices on the compound semiconductor surface of a VLSI chip or wafer having pre-existing electronic devices formed thereon. In accordance with an illustrative embodiment of the present invention, a large array of surface normal optical modulating devices such as multiple quantum well modulators is grown on an impurity free surface of a VLSI chip having an array of FETs already provided thereon. The growth of such devices takes place at temperatures below 430.degree. C. on a compound semiconductor surface which has a highly ordered atomic structure. An optoelectronic switch constructed in this manner is capable of addressing electronic chips in systems handling 10,000 or more input/output optical beams.
摘要翻译：通过在其上形成有预先存在的电子器件的VLSI芯片或晶片的化合物半导体表面上生长光学器件来制造单片集成的光电VLSI电路。根据本发明的说明性实施例，在具有已经提供在其上的FET阵列的VLSI芯片的无杂质表面上生长诸如多量子阱调制器的大量表面法向光调制器件阵列。在具有高度有序原子结构的化合物半导体表面上，这种器件的生长发生在低于430℃的温度下。以这种方式构造的光电开关能够在处理10,000个或更多个输入/输出光束的系统中寻址电子芯片。

5. 发明授权

US08772920B2 Interconnection and assembly of three-dimensional chip packages 有权
标题翻译：三维芯片封装的互连和组装
公开(公告)号：US08772920B2
公开(公告)日：2014-07-08
申请号：US13182220
申请日：2011-07-13
申请人： Hiren D. Thacker , John E. Cunningham , Ivan Shubin , Ashok V. Krishnamoorthy
发明人： Hiren D. Thacker , John E. Cunningham , Ivan Shubin , Ashok V. Krishnamoorthy
IPC分类号： H01L23/02
CPC分类号： H01L25/0657 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/18 , H01L25/50 , H01L2224/13005 , H01L2224/13017 , H01L2224/13027 , H01L2224/13109 , H01L2224/13111 , H01L2224/13147 , H01L2224/14181 , H01L2224/14183 , H01L2224/16105 , H01L2224/16108 , H01L2224/16111 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/481 , H01L2224/48227 , H01L2224/73103 , H01L2224/81138 , H01L2224/81899 , H01L2225/06551 , H01L2225/06555 , H01L2225/06593 , H01L2924/01327 , H01L2924/07802 , H01L2924/12042 , H01L2924/01082 , H01L2924/00014 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2924/00
摘要： In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are aligned by positive features that are mechanically coupled to negative features recessed below the surfaces of adjacent semiconductor dies. Moreover, the chip package includes an interposer plate at approximately a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the interposer plate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as solder balls or spring connectors. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the interposer plate.
摘要翻译：在芯片封装中，半导体管芯或芯片（被称为“板堆叠”）的垂直堆叠中的半导体管芯通过机械耦合到相邻半导体管芯的表面下方的负特性的正特征对准。此外，芯片封装包括与板堆叠大致成直角的插入板，其沿着板堆的边缘电耦合到半导体管芯。特别地，靠近插入板的表面（沿着板堆叠的堆叠方向）的电焊盘通过中间导电材料（例如焊料球）电耦合到靠近半导体管芯的边缘的焊盘，弹簧连接器。注意，芯片封装可以促进半导体管芯和插入板之间的信号的高带宽通信。

6. 发明授权

US08670671B2 Energy-efficient optical source 有权
标题翻译：节能光源
公开(公告)号：US08670671B2
公开(公告)日：2014-03-11
申请号：US13361866
申请日：2012-01-30
申请人： Ashok V. Krishnamoorthy , Xuezhe Zheng , John E. Cunningham
发明人： Ashok V. Krishnamoorthy , Xuezhe Zheng , John E. Cunningham
IPC分类号： H04J14/00 , H04J14/02
CPC分类号： H04J14/02 , H04B10/506 , H04J14/0221
摘要： An optical source includes a set of N light sources that provide a corresponding set of N optical signals having N carrier wavelengths. These optical signals are combined into a seed optical signal and transported to a substrate using an optical fiber. This substrate includes a set of K optical amplifiers that amplify the seed optical signal and provide a set of M output optical signals on a corresponding set of M output optical waveguides (where M is less than K). In this way, a total power of the set of M output optical signals may be significantly larger than that of the seed optical signal, thereby ensuring that a majority of a power efficiency of the optical source is associated with power efficiencies of the set of K optical amplifiers instead of power efficiencies of the set of N light sources.
摘要翻译：光源包括一组N个光源，其提供具有N个载波波长的相应的一组N个光信号。这些光信号被组合成种子光信号，并使用光纤传输到基板。该衬底包括一组放大种子光信号的K个放大器，并在相应的一组M个输出光波导（其中M小于K）上提供一组M个输出光信号。以这种方式，一组M个输出光信号的总功率可以显着大于种子光信号的总功率，从而确保光源的大部分功率效率与该组K的功率效率相关联光放大器而不是N组光源的功率效率。

7. 发明授权

US08548287B2 Direct interlayer optical coupler 有权
标题翻译：直接层间光耦合器
公开(公告)号：US08548287B2
公开(公告)日：2013-10-01
申请号：US13293624
申请日：2011-11-10
申请人： Hiren D. Thacker , Xuezhe Zheng , Ivan Shubin , Kannan Raj , John E. Cunningham , Ashok V. Krishnamoorthy
发明人： Hiren D. Thacker , Xuezhe Zheng , Ivan Shubin , Kannan Raj , John E. Cunningham , Ashok V. Krishnamoorthy
IPC分类号： G02B6/12
CPC分类号： G02B6/26 , Y10T29/49826
摘要： In an MCM, an optical signal is conveyed by an optical waveguide disposed on a surface of a first substrate to an optical coupler having a vertical facet. This optical coupler has an optical mode that is different than the optical mode of the optical waveguide. For example, the spatial extent of the optical mode associated with the optical coupler may be larger, thereby reducing optical losses and sensitivity to alignment errors. Then, the optical signal is directly coupled from the vertical facet to a facing vertical facet of an identical optical coupler on another substrate, and the optical signal is conveyed in another optical waveguide disposed on the other substrate.
摘要翻译：在MCM中，光信号由设置在第一基板的表面上的光波导传送到具有垂直面的光耦合器。该光耦合器具有与光波导的光学模式不同的光学模式。例如，与光耦合器相关联的光学模式的空间范围可能更大，从而减少光学损耗和对准误差的灵敏度。然后，光信号从另一基板上的垂直面到同一光耦合器的面向垂直面直接耦合，并且光信号在设置在另一基板上的另一光波导中传送。

8. 发明申请

US20130207261A1 MAINTAINING ALIGNMENT IN A MULTI-CHIP MODULE USING A COMPRESSIBLE STRUCTURE 有权
标题翻译：使用可压缩结构在多芯片模块中维护对齐
公开(公告)号：US20130207261A1
公开(公告)日：2013-08-15
申请号：US13397593
申请日：2012-02-15
申请人： Hiren D. Thacker , Hyung Suk Yang , Ivan Shubin , John E. Cunningham
发明人： Hiren D. Thacker , Hyung Suk Yang , Ivan Shubin , John E. Cunningham
IPC分类号： H01L23/498 , H01L21/50 , H01L23/488
CPC分类号： H01L25/0652 , H01L23/48 , H01L24/16 , H01L24/72 , H01L24/73 , H01L24/90 , H01L24/91 , H01L25/50 , H01L2224/131 , H01L2224/16227 , H01L2224/73201 , H01L2224/73251 , H01L2224/81138 , H01L2224/81815 , H01L2224/9211 , H01L2225/06517 , H01L2225/06527 , H01L2225/06531 , H01L2225/06562 , H01L2225/06593 , H01L2924/15153 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/3511 , H01L2924/37001 , H01L2924/00 , H01L2924/014 , H01L2224/16 , H01L2224/72 , H01L2224/81 , H01L2224/90 , H01L2924/00014 , H01L2924/00012
摘要： An MCM includes a two-dimensional array of facing chips, including island chips and bridge chips that communicate with each other using overlapping connectors. In order to maintain the relative vertical spacing of these connectors, compressible structures are in cavities in a substrate, which house the bridge chips, provide a compressive force on back surfaces of the bridge chips. These compressible structures include a compliant material with shape and volume compression. In this way, the MCM may ensure that facing surfaces of the island chips and the bridge chips, as well as connectors on these surfaces, are approximately coplanar without bending the bridge chips.
摘要翻译： MCM包括面向芯片的二维阵列，包括使用重叠连接器彼此通信的岛芯片和桥芯片。为了保持这些连接器的相对垂直间隔，可压缩结构位于衬底中的空腔中，其容纳桥芯片，在桥芯片的后表面上提供压缩力。这些可压缩结构包括具有形状和体积压缩的柔性材料。以这种方式，MCM可以确保岛芯片和桥芯片的面对表面以及这些表面上的连接器在不弯曲桥接芯片的情况下大致共面。

9. 发明授权

US08467632B2 Waveguide electro-absorption modulator 有权
标题翻译：波导电吸收调制器
公开(公告)号：US08467632B2
公开(公告)日：2013-06-18
申请号：US12986062
申请日：2011-01-06
申请人： Xuezhe Zheng , John E. Cunningham , Ashok V. Krishnamoorthy
发明人： Xuezhe Zheng , John E. Cunningham , Ashok V. Krishnamoorthy
IPC分类号： G02F1/01
CPC分类号： G02F1/025 , G02F2001/0157
摘要： During operation of an electro-absorption modulator, an optical signal is conveyed, using an optical waveguide in the electro-absorption modulator, to a semiconductor layer that substantially fills a gap between two portions of the optical waveguide. Then, the optical signal is electro-absorption modulated by selectively applying a voltage to electrodes that produces an electric field, approximately perpendicular to the midline of the optical waveguide, in the semiconductor layer. These electrodes are coupled to the edges of the semiconductor layer at the periphery along the width of the semiconductor layer by intervening layers. Furthermore, the intervening layers include a material that has a lower index of refraction than the semiconductor layer, and a lower optical absorption than the electrodes.
摘要翻译：在电吸收调制器的操作期间，使用电吸收调制器中的光波导将光信号传送到基本上填充光波导的两个部分之间的间隙的半导体层。然后，通过选择性地向在半导体层中产生大致垂直于光波导的中线的电场的电极施加电压来对光信号进行电吸收调制。这些电极通过中间层沿半导体层的宽度在周边连接到半导体层的边缘。此外，中间层包括具有比半导体层低的折射率的材料，并且具有比电极更低的光学吸收。

10. 发明授权

US08267583B2 Three-dimensional macro-chip including optical interconnects 有权
标题翻译：三维宏片包括光互连
公开(公告)号：US08267583B2
公开(公告)日：2012-09-18
申请号：US12581709
申请日：2009-10-19
申请人： Jin Yao , Xuezhe Zheng , Ashok V. Krishnamoorthy , John E. Cunningham
发明人： Jin Yao , Xuezhe Zheng , Ashok V. Krishnamoorthy , John E. Cunningham
IPC分类号： G02B6/26 , G02B6/34 , G02B6/12
CPC分类号： G02B6/13 , G02B6/12002
摘要： A multi-chip module (MCM), which includes a three-dimensional (3D) stack of chips that are coupled using optical interconnects, is described. In this MCM, disposed on a first surface of a middle chip in the 3D stack, there are: a first optical coupler, an optical waveguide, which is coupled to the first optical coupler, and a second optical coupler, which is coupled to the optical waveguide. The first optical coupler redirects an optical signal from the optical waveguide to a first direction (which is not in the plane of the first surface), or from the first direction to the optical waveguide. Moreover, the second optical coupler redirects the optical signal from the optical waveguide to a second direction (which is not in the plane of the first surface), or from the second direction to the optical waveguide. Note that an optical path associated with the second direction passes through an opening in a substrate in the middle chip.
摘要翻译：描述了包括使用光学互连耦合的三维（3D）芯片堆叠的多芯片模块（MCM）。在该MCM中，设置在3D堆叠中的中间芯片的第一表面上，存在：耦合到第一光耦合器的第一光耦合器，光波导和耦合到第三光耦合器的第二光耦合器，光波导。第一光学耦合器将来自光波导的光信号重定向到第一方向（其不在第一表面的平面中）或从第一方向到光波导。此外，第二光学耦合器将来自光波导的光信号重定向到第二方向（其不在第一表面的平面）或从第二方向到光波导。注意，与第二方向相关联的光路通过中间芯片中的衬底中的开口。

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