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1. 发明授权

US5589404A Monolithically integrated VLSI optoelectronic circuits and a method of fabricating the same 失效
标题翻译：单片集成VLSI光电子电路及其制造方法
公开(公告)号：US5589404A
公开(公告)日：1996-12-31
申请号：US284026
申请日：1994-08-01
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Rajiv N. Pathak , James A. Walker
IPC分类号： G02F1/015 , H01L27/144 , H01L27/15 , H03K19/0952 , H01L31/18
CPC分类号： H01L27/15 , H01L27/1443 , Y10S438/974
摘要： A monolithically integrated, optoelectronic VLSI circuit is fabricated by growing optical devices on the compound semiconductor surface of a VLSI chip or wafer having pre-existing electronic devices formed thereon. In accordance with an illustrative embodiment of the present invention, a large array of surface normal optical modulating devices such as multiple quantum well modulators is grown on an impurity free surface of a VLSI chip having an array of FETs already provided thereon. The growth of such devices takes place at temperatures below 430.degree. C. on a compound semiconductor surface which has a highly ordered atomic structure. An optoelectronic switch constructed in this manner is capable of addressing electronic chips in systems handling 10,000 or more input/output optical beams.
摘要翻译：通过在其上形成有预先存在的电子器件的VLSI芯片或晶片的化合物半导体表面上生长光学器件来制造单片集成的光电VLSI电路。根据本发明的说明性实施例，在具有已经提供在其上的FET阵列的VLSI芯片的无杂质表面上生长诸如多量子阱调制器的大量表面法向光调制器件阵列。在具有高度有序原子结构的化合物半导体表面上，这种器件的生长发生在低于430℃的温度下。以这种方式构造的光电开关能够在处理10,000个或更多个输入/输出光束的系统中寻址电子芯片。

2. 发明授权

US5468689A Method for preparation of silicon nitride gallium diffusion barrier for use in molecular beam epitaxial growth of gallium arsenide 失效
标题翻译：制备用于砷化镓分子束外延生长的氮化硅镓扩散阻挡层的方法
公开(公告)号：US5468689A
公开(公告)日：1995-11-21
申请号：US153719
申请日：1993-11-16
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
IPC分类号： C23C16/50 , H01L21/203 , H01L21/205 , H01L21/318 , H01L21/02 , H01L21/20
CPC分类号： H01L21/3185 , Y10S438/933
摘要： A technique is described for the preparation of a thin film of a silicon nitride diffusion barrier to gallium on a silicon integrated circuit chip. The technique involves reacting nitrogen and silane in a ratio of 53:1 to 300:1 in a plasma enhanced chemical vapor deposition apparatus. The described technique is of interest for use in the monolithic integration of interconnected GaAs/AlGaAs double heterostructures, modulators and silicon MOSFET structures.
摘要翻译：描述了一种用于在硅集成电路芯片上制备氮化硅扩散阻挡层至镓的薄膜的技术。该技术涉及在等离子体增强化学气相沉积装置中使氮和硅烷以53:1至300:1的比例反应。所描述的技术对于用于互连的GaAs / AlGaAs双异质结构，调制器和硅MOSFET结构的单片集成是有意义的。

3. 发明授权

US5510277A Surface treatment for silicon substrates 失效
标题翻译：硅衬底的表面处理
公开(公告)号：US5510277A
公开(公告)日：1996-04-23
申请号：US268137
申请日：1994-06-29
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , James A. Walker
IPC分类号： H01L21/302 , H01L21/203 , H01L21/265 , H01L21/306 , H01L21/3065
CPC分类号： H01L21/02046 , Y10S438/974
摘要： A method for desorbing the surface oxide on a silicon substrate is performed by implanting particles such at atomic or ionic hydrogen into the oxide layer on the silicon substrate. The oxide is then removed by breaking the bonds between the silicon and oxygen atoms within the oxide. The bonds may be broken by heating the substrate, for example. The temperature to which the substrate must be raised is substantially less than the temperature required to desorb an oxide layer that has not undergone an implantation step. In one particular example, the particles implanted into the oxide surface are hydrogen ions generated by electron cyclotron resonance.
摘要翻译：在硅衬底上解吸表面氧化物的方法是通过将诸如原子或离子氢的颗粒注入硅衬底上的氧化物层来进行的。然后通过破坏氧化物内的硅和氧原子之间的键来去除氧化物。例如，可以通过加热衬底来破坏键合。必须升高衬底的温度基本上小于解吸未经植入步骤的氧化物层所需的温度。在一个具体实例中，注入氧化物表面的颗粒是通过电子回旋共振产生的氢离子。

4. 发明授权

US5631472A Accurate in-situ lattice matching by reflection high energy electron diffraction 失效
$Accurate in-situ lattice matching by reflection high energy electron diffraction$
标题翻译：通过反射高能电子衍射准确的原位晶格匹配
公开(公告)号：US5631472A
公开(公告)日：1997-05-20
申请号：US473679
申请日：1995-06-07
申请人： John E. Cunningham , Keith W. Goossen , Rajiv N. Pathak
发明人： John E. Cunningham , Keith W. Goossen , Rajiv N. Pathak
IPC分类号： G02F1/015 , G02B6/12 , G02F1/017 , H01L21/20 , H01L21/203 , H01S3/10 , H01L29/205 , H01L31/0304 , H01L31/105
CPC分类号： G02F1/017 , B82Y20/00 , G02B2006/12142 , G02F2001/01766 , G02F2202/102 , G02F2203/02 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02507 , H01L21/02543 , H01L21/02546 , Y10S438/938
摘要： An in-situ method is disclosed for highly accurate lattice matching using reflection high energy electron diffraction dynamics. The method includes the steps of providing a substrate of a first semiconductor material and initiating growth of a second semiconductor material thereon. The oscillation amplitude of intensity I of waveform cycles is monitored using reflection high energy electron diffraction. A maximum intensity I.sup.+ and a minimum intensity I.sup.- is determined over a predetermined number of waveform cycles. The intensity drop .DELTA.I from initial reflectivity to minimum reflectivity of the waveform cycles is determined and normalized figure of merit FM is calculated for the predetermined number of waveform cycles using the relationship: ##EQU1## The fluxes of the second semiconductor material are then adjusted to maximize FM and optimize matching. A multiple quantum well light modulator is also provided including a semiconductor substrate of InP, a multiple quantum well region, disposed above the InP substrate, composed of InGaAs and having a thickness of about 4 .mu.m. The modulator is characterized by a lattice mismatch of less than 2.times.10.sup.4.
摘要翻译：公开了一种使用反射高能电子衍射动力学进行高精度晶格匹配的现场方法。该方法包括以下步骤：提供第一半导体材料的衬底并且在其上起始第二半导体材料的生长。使用反射高能电子衍射监测波形周期的强度I的振荡幅度。在预定数量的波形周期内确定最大强度I +和最小强度I。确定从初始反射率到波形周期的最小反射率的强度降DELTA I，并且使用以下关系计算预定数量的波形周期的归一化品质因数FM：然后将第二半导体材料的通量调整为最大化FM并优化匹配。还提供了一种多量子阱光调制器，其包括设置在InP衬底上方的InGaAs并具有约4μm厚度的InP的多个量子阱区的InP半导体衬底。调制器的特征在于小于2×104的晶格失配。

5. 发明授权

US5480813A Accurate in-situ lattice matching by reflection high energy electron diffraction 失效
$Accurate in-situ lattice matching by reflection high energy electron diffraction$
标题翻译：通过反射高能电子衍射准确的原位晶格匹配
公开(公告)号：US5480813A
公开(公告)日：1996-01-02
申请号：US263305
申请日：1994-06-21
申请人： John E. Cunningham , Keith W. Goossen , Rajiv N. Pathak
发明人： John E. Cunningham , Keith W. Goossen , Rajiv N. Pathak
IPC分类号： G02F1/015 , G02B6/12 , G02F1/017 , H01L21/20 , H01L21/203 , H01S3/10 , H01L21/205
CPC分类号： G02F1/017 , B82Y20/00 , G02B2006/12142 , G02F2001/01766 , G02F2202/102 , G02F2203/02 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02507 , H01L21/02543 , H01L21/02546 , Y10S438/938
摘要： An in-situ method is disclosed for highly accurate lattice matching using reflection high energy electron diffraction dynamics. The method includes the steps of providing a substrate of a first semiconductor material and initiating growth of a second semiconductor material thereon. The oscillation amplitude of intensity I of waveform cycles is monitored using reflection high energy electron diffraction. A maximum intensity I.sup.+ and a minimum intensity I.sup.- is determined over a predetermined number of waveform cycles. The intensity drop .DELTA.I from initial reflectivity to minimum reflectivity of the waveform cycles is determined and a normalized figure of merit FM is calculated for the predetermined number of waveform cycles using the relationship: ##EQU1## The fluxes of the second semiconductor material are then adjusted to maximize FM and optimize lattice matching. A multiple quantum well light modulator is also provided including a semiconductor substrate of InP, a multiple quantum well region, disposed above the InP substrate, composed of InGaAs and having a thickness of about 4 .mu.m. The modulator is characterized by a lattice mismatch of less than 2.times.10.sup.-4.
摘要翻译：公开了一种使用反射高能电子衍射动力学进行高精度晶格匹配的现场方法。该方法包括以下步骤：提供第一半导体材料的衬底并且在其上起始第二半导体材料的生长。使用反射高能电子衍射监测波形周期强度I的振荡幅度。在预定数量的波形周期内确定最大强度I +和最小强度I。确定从初始反射率到波形周期的最小反射率的强度降DELTA I，并且使用以下关系计算预定数量的波形周期的归一化品质因数FM：然后调整第二半导体材料的通量以最大化FM并优化晶格匹配。还提供了一种多量子阱光调制器，其包括设置在InP衬底上方的InGaAs并具有约4μm厚度的InP的多个量子阱区的InP半导体衬底。调制器的特征在于小于2×10 -4的晶格失配。

6. 发明授权

US5093695A Controllable semiconductor modulator having interleaved contacts 失效
标题翻译：具有互相联系的可控硅半导体调制器
公开(公告)号：US5093695A
公开(公告)日：1992-03-03
申请号：US526084
申请日：1990-05-18
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan
IPC分类号： G02F1/015 , G02F1/017 , H01S5/00
CPC分类号： B82Y20/00 , G02F1/017 , G02F2001/0151 , G02F2203/01 , G02F2203/02
摘要： In a semiconductor optical modulator, two semiconductor materials having different refractive indices are grown in an alternating sequence of layers to form a semiconductor mirror wherein each layer has approximately a quarter wave thickness for a predetermined wavelength. Delta doping is performed at each heterointerface. The delta doping conductivity type alternates from one heterointerface to the next. Lateral surface contacts are selectively made to the n-type heterointerfaces on one edge of the mirror and to the p-type heterointerfaces on the other edge of the mirror. An interleaved ohmic contact structure results within the modulator. By applying a nominally low voltage to the lateral surface contacts, it is possible to effect refractive index changes in the layers so that the mirror performs reflection or transmission of an impinging light beam.

7. 发明授权

US5627383A Optoelectronic devices utilizing multiple quantum well pin structures 失效
标题翻译：利用多个量子阱引脚结构的光电器件
公开(公告)号：US5627383A
公开(公告)日：1997-05-06
申请号：US606509
申请日：1996-02-23
申请人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Michael D. Williams
发明人： John E. Cunningham , Keith W. Goossen , William Y. Jan , Michael D. Williams
IPC分类号： G02F1/015 , G02F1/017 , H01L27/15 , H01L29/06 , H01L31/0352 , H01L31/10 , H01L31/105 , H01S5/042 , H01S5/183 , H01S5/30 , H01S5/34 , H01L31/0328 , H01L31/0336
CPC分类号： B82Y20/00 , G02F1/017 , H01L31/0352 , H01L31/105 , H01S5/0421 , H01S5/18341 , H01S5/305 , H01S5/3054 , H01S5/3428 , Y10S977/759
摘要： Optoelectronic devices such as photodetectors, modulators and lasers with improved optical properties are provided with an atomically smooth transition between the buried conductive layer and quantum-well-diode-containing intrinsic region of a p-i-n structure. The buried conductive layer is grown on an underlying substrate utilizing a surfactant-assisted growth technique. The dopant and dopant concentration are selected, as a function of the thickness of the conductive layer to be formed, so that a surface impurity concentration of from 0.1 to 1 monolayer of dopant atoms is provided. The presence of the impurities promotes atomic ordering at the interface between the conductive layer and the intrinsic region, and subsequently results in sharp barriers between the alternating layers comprising the quantum-well-diodes of the intrinsic layer.
摘要翻译：具有改进的光学性质的诸如光电探测器，调制器和激光器的光电器件在掩埋导电层和含p-i-n结构的量子阱二极管的本征区域之间具有原子平滑的过渡。使用表面活性剂辅助生长技术将掩埋的导电层生长在下面的衬底上。选择掺杂剂和掺杂剂浓度作为要形成的导电层的厚度的函数，使得提供0.1至1个单层掺杂剂原子的表面杂质浓度。杂质的存在促进在导电层和本征区之间的界面处的原子排序，并且随后在包含本征层的量子阱二极管的交替层之间产生尖锐的障碍。

8. 发明授权

US5573975A Surface-normal semiconductor optical cavity devices 失效
标题翻译：表面正常半导体光腔装置
公开(公告)号：US5573975A
公开(公告)日：1996-11-12
申请号：US417878
申请日：1995-04-06
申请人： John E. Cunningham , Keith W. Goossen
发明人： John E. Cunningham , Keith W. Goossen
IPC分类号： G02F1/015 , G02F1/21 , H01L33/10 , H01L33/44 , H01S5/00 , H01S5/183 , H01L21/20
CPC分类号： H01L33/44 , G02F1/218 , H01L33/105 , H01S5/18361 , H01S5/0042
摘要： A semiconductor device is provided that includes an optical cavity that is designed to provide a prescribed resonant optical wavelength. The optical cavity includes a mirror structure deposited on top of a substrate and a multi-layer region such as an electroabsorptive region, for example, deposited over the mirror structure. A partial antireflective coating is deposited over the multi-layer region. The mirror structure and the multilayer region have a thickness variation sufficient to yield a resonant optical wavelength that deviates from the prescribed resonant wavelength. The partial antireflective coating has a non-uniform thickness variation that causes the resonant optical wavelength to shift substantially toward the prescribed resonant optical wavelength.
摘要翻译：提供一种半导体器件，其包括设计成提供规定的谐振光波长的光腔。光学腔包括沉积在基底顶部的反射镜结构和诸如沉积在反射镜结构上的诸如电吸收区的多层区域。部分抗反射涂层沉积在多层区域上。镜面结构和多层区域具有足以产生偏离规定谐振波长的谐振光波长的厚度变化。部分抗反射涂层具有不均匀的厚度变化，其使谐振光波长基本上朝规定的共振光波长移动。

9. 发明授权

US5013685A Method of making a non-alloyed ohmic contact to III-V semiconductors-on-silicon 失效
标题翻译：对硅化物III-V半导体进行非合金欧姆接触的方法
公开(公告)号：US5013685A
公开(公告)日：1991-05-07
申请号：US430558
申请日：1989-11-02
申请人： Tien-Heng Chiu , John E. Cunningham , Keith W. Goossen
发明人： Tien-Heng Chiu , John E. Cunningham , Keith W. Goossen
IPC分类号： H01L21/203 , H01L21/28 , H01L21/285 , H01L29/36 , H01L29/43 , H01L29/45
CPC分类号： H01L29/452 , H01L21/28575 , H01L29/365
摘要： This invention concerns with a non-alloyed ohmic contact to III-V semiconductor material in a III-V semiconductor device on a Si base. The ohmic contact includes at least one set of layers comprising a delta-doped monolayer and a thin layer of undoped III-V semiconductor material which is 2.5 nm or less in thickness, said at least one set of layers being upon a doped III-V semiconductor layer. An epitaxial layer of metal upon an uppermost of the layers of the said set of layers completes the ohmic contact, said metal being capable of wetting the surface of the III-V semiconductor material and of being epitaxially grown on the said III-V semiconductor material. At least the said at least one set of layers and the metal layer are deposited by Molecular Beam Epitaxy, thus avoiding formation of oxides and growing the metal epitaxially so that the metal layer is crystalline at least near the interface between the metal and the semiconductor material. The epitaxial deposition of the metal is conducted at a relatively low temperature of the semiconductor material. In an illustrative embodiment the metal is Al capable of being epitaxially deposited at a temperature within a range of from 10.degree. C. to 100.degree. C., preferably to a temperature ranging from 20.degree. C. to 50.degree. C., with 25.degree. C. being most preferable. The resultant contacts exhibit specific resistance which is lower and higher current passing capabilities which are higher than those of prior art non-alloyed ohmic contacts. However, the most noteworthy advantage of using Al in an integrated opto-electronic circuit comprising a III-V semiconductor device on a Si base, is the avoidance of "purple plague". The "purple plague" may arise when gold-based contacts in III-V semiconductor devices and Al-based contacts in Si-devices being used in an integrated circuit come in contact, especially at higher, e.g. 300.degree. C., temperatures.

10. 发明授权

US5444270A Surface-normal semiconductor optical cavity devices with antireflective layers 失效
标题翻译：具有抗反射层的表面正常半导体光腔装置
公开(公告)号：US5444270A
公开(公告)日：1995-08-22
申请号：US334821
申请日：1994-11-04
申请人： John E. Cunningham , Keith W. Goossen
发明人： John E. Cunningham , Keith W. Goossen
IPC分类号： G02F1/015 , G02F1/21 , H01L33/10 , H01L33/44 , H01S5/00 , H01S5/183 , H01L33/00
CPC分类号： H01L33/44 , G02F1/218 , H01L33/105 , H01S5/18361 , H01S5/0042
摘要： A semiconductor device is provided that includes an optical cavity that is designed to provide a prescribed resonant optical wavelength. The optical cavity includes a mirror structure deposited on top of a substrate and a multi-layer region such as an electroabsorptive region, for example, deposited over the mirror structure. A partial antireflective coating is deposited over the multi-layer region. The mirror structure and the multilayer region have a thickness variation sufficient to yield a resonant optical wavelength that deviates from the prescribed resonant wavelength. The partial antireflective coating has a non-uniform thickness variation that causes the resonant optical wavelength to shift substantially toward the prescribed resonant optical wavelength.
摘要翻译：提供一种半导体器件，其包括设计成提供规定的谐振光波长的光腔。光学腔包括沉积在基底顶部的反射镜结构和诸如沉积在反射镜结构上的诸如电吸收区的多层区域。部分抗反射涂层沉积在多层区域上。镜面结构和多层区域具有足以产生偏离规定谐振波长的谐振光波长的厚度变化。部分抗反射涂层具有不均匀的厚度变化，其使谐振光波长基本上朝规定的共振光波长移动。

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