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1. 发明申请

US20050187867A1 System and method for associating identifiers with transactions 审中-公开
标题翻译：将标识符与事务相关联的系统和方法
公开(公告)号：US20050187867A1
公开(公告)日：2005-08-25
申请号：US11047359
申请日：2005-01-31
申请人： Jeremy Sokolic , Balraj Suneja , Gautam Sinha , Amitava Parial , Sarabjeet Singh , Sanjeev Dheer
发明人： Jeremy Sokolic , Balraj Suneja , Gautam Sinha , Amitava Parial , Sarabjeet Singh , Sanjeev Dheer
IPC分类号： G06F17/30 , G06F17/60
CPC分类号： G06Q20/22 , G06F16/957 , G06Q20/10 , G06Q40/00
摘要： Financial transaction data is retrieved from a financial institution. The financial transaction data includes a transaction value. The transaction value is compared to multiple pre-defined transaction identifiers and associated with one of the transaction identifiers. The financial transaction data and the associated transaction identifier are then stored in a storage mechanism.
摘要翻译：金融交易数据从金融机构检索。金融交易数据包括交易值。将事务值与多个预定义事务标识符进行比较，并与事务标识符之一相关联。然后将金融交易数据和相关联的交易标识符存储在存储机制中。

2. 发明授权

US07383490B2 Methods and apparatus using commutative error detection values for fault isolation in multiple node computers 失效
标题翻译：使用多节点计算机故障隔离交换误差检测值的方法和装置
公开(公告)号：US07383490B2
公开(公告)日：2008-06-03
申请号：US11106069
申请日：2005-04-14
申请人： Gheorghe Almasi , Matthias Augustin Blumrich , Dong Chen , Paul Coteus , Alan Gara , Mark E. Giampapa , Philip Heidelberger , Dirk I. Hoenicke , Sarabjeet Singh , Burkhard D. Steinmacher-Burow , Todd Takken , Pavlos Vranas
发明人： Gheorghe Almasi , Matthias Augustin Blumrich , Dong Chen , Paul Coteus , Alan Gara , Mark E. Giampapa , Philip Heidelberger , Dirk I. Hoenicke , Sarabjeet Singh , Burkhard D. Steinmacher-Burow , Todd Takken , Pavlos Vranas
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： G06F11/1633
摘要： Methods and apparatus perform fault isolation in multiple node computing systems using commutative error detection values for—example, checksums—to identify and to isolate faulty nodes. When information associated with a reproducible portion of a computer program is injected into a network by a node, a commutative error detection value is calculated. At intervals, node fault detection apparatus associated with the multiple node computer system retrieve commutative error detection values associated with the node and stores them in memory. When the computer program is executed again by the multiple node computer system, new commutative error detection values are created and stored in memory. The node fault detection apparatus identifies faulty nodes by comparing commutative error detection values associated with reproducible portions of the application program generated by a particular node from different runs of the application program. Differences in values indicate a possible faulty node.
摘要翻译：方法和设备使用交换性错误检测值（例如，校验和）识别和隔离故障节点，在多个节点计算系统中执行故障隔离。当与计算机程序的可再现部分相关联的信息被节点注入到网络中时，计算交换性错误检测值。每隔一段时间，与多节点计算机系统相关联的节点故障检测装置检索与节点相关联的交换错误检测值并将其存储在存储器中。当多节点计算机系统再次执行计算机程序时，创建新的交换错误检测值并将其存储在存储器中。节点故障检测装置通过比较与来自应用程序的不同运行的特定节点生成的应用程序的可再现部分相关联的交换错误检测值来识别故障节点。值的差异表示可能的故障节点。

3. 发明申请

US20110111073A1 RECOVERY OF HYDROPHOBIC PEPTIDES FROM OILS 有权
标题翻译：从油中回收疏水性肽
公开(公告)号：US20110111073A1
公开(公告)日：2011-05-12
申请号：US12747160
申请日：2008-12-22
申请人： Martin J. Reaney , Yunhua Jia , Jianheng Shen , Cynthia Schock , Nancy Tyler , Jim Elder , Sarabjeet Singh
发明人： Martin J. Reaney , Yunhua Jia , Jianheng Shen , Cynthia Schock , Nancy Tyler , Jim Elder , Sarabjeet Singh
IPC分类号： A61K36/55 , A61K38/12 , A61P35/00 , A61P31/12 , A61P29/00
CPC分类号： A61K36/55 , A23D9/00 , A23D9/007 , A61K38/00 , C07K1/145 , C07K1/16 , C07K1/20 , C07K7/64 , C11B1/06 , C11B1/102 , C11B3/006 , C11B3/10
摘要： Methods for separation and recovery of individual cyclic peptides from plant materials, said method comprising the steps of: (a) extracting an oil from a plant material; (b) separating the extracted oil into a non-polar fraction and a polar fraction; (c) separation and recovery of cyclic peptides from the non-polar fraction, and (d) separation and recovery of cyclic peptides from the polar fraction. The methods are suitable for separation and recovery of individual cyclolinopeptides from flax seed oil. Individual cyclolinopeptides are useful for modulation physiological disorders associated with apoptosis. Modified flaxseed oils may be produced by comingling flaxseed oils absent cyclolinopeptides, with at least one cyclolinopeptide separated and recovered with the methods disclosed herein.
摘要翻译：用于从植物材料分离和回收单个环肽的方法，所述方法包括以下步骤：（a）从植物材料中提取油; （b）将提取的油分离成非极性馏分和极性馏分; （c）从非极性级分分离和回收环肽，和（d）从极性级分分离和回收环肽。该方法适用于从亚麻籽油中分离和回收单个环亚麻肽。单个环亚麻肽可用于调节与细胞凋亡相关的生理紊乱。修饰的亚麻籽油可以通过不含环亚麻肽的亚麻籽油来制备，至少一种环亚麻肽用本文公开的方法分离和回收。

4. 发明申请

US20060248370A1 Methods and apparatus using commutative error detection values for fault isolation in multiple node computers 失效
标题翻译：使用多节点计算机故障隔离交换误差检测值的方法和装置
公开(公告)号：US20060248370A1
公开(公告)日：2006-11-02
申请号：US11106069
申请日：2005-04-14
申请人： Gheorghe Almasi , Matthias Blumrich , Dong Chen , Paul Coteus , Alan Gara , Mark Giampapa , Philip Heidelberger , Dirk Hoenicke , Sarabjeet Singh , Burkhard Steinmacher-Burow , Todd Takken , Pavlos Vranas
发明人： Gheorghe Almasi , Matthias Blumrich , Dong Chen , Paul Coteus , Alan Gara , Mark Giampapa , Philip Heidelberger , Dirk Hoenicke , Sarabjeet Singh , Burkhard Steinmacher-Burow , Todd Takken , Pavlos Vranas
IPC分类号： G06F11/00
CPC分类号： G06F11/1633
摘要： The present invention concerns methods and apparatus for performing fault isolation in multiple node computing systems using commutative error detection values—for example, checksums—to identify and to isolate faulty nodes. In the present invention nodes forming the multiple node computing system are networked together and during program execution communicate with one another by transmitting information through the network. When information associated with a reproducible portion of a computer program is injected into the network by a node, a commutative error detection value is calculated and stored in commutative error detection apparatus associated with the node. At intervals, node fault detection apparatus associated with the multiple node computer system retrieve commutative error detection values saved in the commutative error detection apparatus associated with the node and stores them in memory. When the computer program is executed again by the multiple node computer system, new commutative error detection values are created; the node fault detection apparatus retrieves them and stores them in memory. The node fault detection apparatus identifies faulty nodes by comparing commutative error detection values associated with reproducible portions of the application program generated by a particular node from different runs of the application program. Differences in commutative error detection values indicate that the node may be faulty.
摘要翻译：本发明涉及在多节点计算系统中使用交换性错误检测值（例如校验和）识别和隔离故障节点来执行故障隔离的方法和装置。在本发明中，形成多节点计算系统的节点被联网在一起，并且在程序执行期间通过网络传送信息彼此通信。当与计算机程序的可再现部分相关联的信息被节点注入到网络中时，计算交换性错误检测值并将其存储在与节点相关联的交换错误检测装置中。间歇地，与多节点计算机系统相关联的节点故障检测装置检索保存在与节点相关联的交换性错误检测装置中的交换性错误检测值，并将其存储在存储器中。当多节点计算机系统再次执行计算机程序时，创建新的交换错误检测值; 节点故障检测装置检索它们并将其存储在存储器中。节点故障检测装置通过比较与来自应用程序的不同运行的特定节点生成的应用程序的可再现部分相关联的交换错误检测值来识别故障节点。交换性错误检测值的差异表明节点可能有故障。

5. 发明申请

US20090302916A1 Low Power and Full Swing Pseudo CML Latched Logic-Gates 审中-公开
标题翻译：低功耗和全摆幅伪CML锁存逻辑门
公开(公告)号：US20090302916A1
公开(公告)日：2009-12-10
申请号：US12133602
申请日：2008-06-05
申请人： Sarabjeet Singh
发明人： Sarabjeet Singh
IPC分类号： H03K3/00
CPC分类号： H03K19/0016 , H03K19/018514 , H03K19/09432
摘要： “Negative And” (NAND) logic gate metal oxide semiconductor field effect transistor (MOSFET) switch(es) incorporated in the first stage of a “pseudo” current mode logic (CML) latch to provide a low-resistance (or high-resistance) circuit path to the output depending on the input voltage. This/these switch(es) are also used to deactivate the first stage of the circuit during the second half of a timing clock cycle, so as to permit the first stage to be activated only during the first half of a clock cycle. “Cross-coupled” inverter(s) are also used in the second stage of the circuit to provide acceptable “rail-to-rail” output voltage differential “swing” using less current. In addition, the second stage also has MOSFET switch(es) which activate only during the second half of a timing clock cycle and are deactivated during the first half of a clock cycle, which requires use of less current and thus reduces power consumption.
摘要翻译：并联在“伪”电流模式逻辑（CML）锁存器的第一级中的“负极”（NAND）逻辑栅极金属氧化物半导体场效应晶体管（MOSFET）开关，以提供低电阻（或高电阻）根据输入电压输出的电路路径。这个/这些开关也用于在定时时钟周期的后半段期间去激活电路的第一级，从而允许第一级仅在时钟周期的前半部分被激活。 “交叉耦合”逆变器也用于电路的第二阶段，以使用更少的电流来提供可接受的“轨到轨”输出电压差“摆幅”。另外，第二级还具有仅在定时时钟周期的后半段激活的MOSFET开关，并且在时钟周期的前半部分期间被激活，这需要使用更少的电流并因此降低功耗。

6. 发明申请

US20090302893A1 High Speed "Pseudo" Current Mode Logic (CML) Integrated Circuit Memory Latch 审中-公开
标题翻译：高速“伪”电流模式逻辑（CML）集成电路存储器锁存器
公开(公告)号：US20090302893A1
公开(公告)日：2009-12-10
申请号：US12133620
申请日：2008-06-05
申请人： Sarabjeet Singh
发明人： Sarabjeet Singh
IPC分类号： H03K19/20
CPC分类号： H03K19/09432 , H03K19/096
摘要： “Negative And” (NAND) logic gate metal oxide semiconductor field effect transistor (MOSFET) switch(es) are incorporated in the first stage of a “pseudo” current mode logic (CML) latch to provide a low-resistance (or high-resistance) circuit path to the output depending on the input voltage. These switch(es) are also used to deactivate (or “switch-off”) the first stage of the circuit during the second half of a timing clock cycle, so as to permit the first stage to be activated (or “switched-on”) only during the first half of a clock cycle. “Cross-coupled” inverter(s) are also used in the second stage of the circuit to provide acceptable “rail-to-rail” output voltage differential “swing” using less current. In addition, the second stage also has MOSFET switch(es) which activate (or “switch-on”) only during the second half of a timing clock cycle and are deactivated (or “switched-off”) during the first half of a clock cycle, which (in combination with operation of the first stage circuit) requires use of less current and thus reduces power consumption.
摘要翻译： “负”（NAND）逻辑栅极金属氧化物半导体场效应晶体管（MOSFET）开关并入“伪”电流模式逻辑（CML）锁存器的第一级，以提供低电阻（或高电平）电阻）根据输入电压到输出的电路路径。这些开关还用于在定时时钟周期的后半段期间停用（或“关闭”）电路的第一级，从而允许第一级被激活（或“接通”） “）只在一个时钟周期的前半段。 “交叉耦合”逆变器也用于电路的第二阶段，以使用更少的电流来提供可接受的“轨到轨”输出电压差“摆幅”。此外，第二级还具有仅在定时时钟周期的后半段激活（或“接通”）MOSFET开关，并且在第一级的第一半期间被去激活（或“关断”）时钟周期（与第一级电路的操作相结合）需要使用更少的电流，从而降低功耗。

7. 发明授权

US08383172B2 Recovery of hydrophobic peptides from oils 有权
标题翻译：从油中回收疏水性肽
公开(公告)号：US08383172B2
公开(公告)日：2013-02-26
申请号：US12747160
申请日：2008-12-22
申请人： Martin J. Reaney , Yunhua Jia , Jianheng Shen , Cynthia Schock , Nancy Tyler , Jim Elder , Sarabjeet Singh
发明人： Martin J. Reaney , Yunhua Jia , Jianheng Shen , Cynthia Schock , Nancy Tyler , Jim Elder , Sarabjeet Singh
IPC分类号： A61K36/00 , A61K36/55
CPC分类号： A61K36/55 , A23D9/00 , A23D9/007 , A61K38/00 , C07K1/145 , C07K1/16 , C07K1/20 , C07K7/64 , C11B1/06 , C11B1/102 , C11B3/006 , C11B3/10
摘要： Methods for separation and recovery of individual cyclic peptides from plant materials, said method comprising the steps of: (a) extracting an oil from a plant material; (b) separating the extracted oil into a non-polar fraction and a polar fraction; (c) separation and recovery of cyclic peptides from the non-polar fraction, and (d) separation and recovery of cyclic peptides from the polar fraction. The methods are suitable for separation and recovery of individual cyclolinopeptides from flax seed oil. Individual cyclolinopeptides are useful for modulation physiological disorders associated with apoptosis. Modified flaxseed oils may be produced by commingling flaxseed oils absent cyclolinopeptides, with at least one cyclolinopeptide separated and recovered with the methods disclosed herein.
摘要翻译：用于从植物材料分离和回收单个环肽的方法，所述方法包括以下步骤：（a）从植物材料中提取油; （b）将提取的油分离成非极性馏分和极性馏分; （c）从非极性级分分离和回收环肽，和（d）从极性级分分离和回收环肽。该方法适用于从亚麻籽油中分离和回收单个环亚麻肽。单个环亚麻肽可用于调节与细胞凋亡相关的生理紊乱。改性亚麻籽油可以通过将没有环亚麻肽的亚麻籽油混合制备，至少一种环亚麻肽用本文公开的方法分离和回收。

8. 发明申请

US20090302915A1 Low Power and Full Rail-to-Rail Swing Pseudo CML Latch 审中-公开
标题翻译：低功率和全轨道至轨道摆动伪CML锁存器
公开(公告)号：US20090302915A1
公开(公告)日：2009-12-10
申请号：US12133573
申请日：2008-06-05
申请人： Sarabjeet Singh
发明人： Sarabjeet Singh
IPC分类号： H03K3/00
CPC分类号： H03K3/356139 , H03K3/35625
摘要： The incorporation of MOS (metal oxide semiconductor) switches in the first stage of a CML latch, which act to bring about a significant savings in current usage, and thus lower power, as well as full rail-to-rail output swing. This/these switch(es) are also used to deactivate the first stage of the circuit during the second half of a timing clock cycle, so as to permit the first stage to be activated only during the first half of a clock cycle. “Cross-coupled” inverter(s) are also used in the second stage of the circuit to provide acceptable “rail-to-rail” output voltage differential “swing” using less current. In addition, the second stage also has MOSFET switch(es) which activate only during the second half of a timing clock cycle and are deactivated during the first half of a clock cycle, which requires use of less current and thus reduces power consumption.
摘要翻译：在CML锁存器的第一级中并入MOS（金属氧化物半导体）开关，其可以显着地节省电流使用，从而降低功率，以及完全的轨至轨输出摆幅。这个/这些开关也用于在定时时钟周期的后半段期间去激活电路的第一级，从而允许第一级仅在时钟周期的前半部分被激活。 “交叉耦合”逆变器也用于电路的第二阶段，以使用更少的电流来提供可接受的“轨到轨”输出电压差“摆幅”。另外，第二级还具有仅在定时时钟周期的后半段激活的MOSFET开关，并且在时钟周期的前半部分期间被激活，这需要使用更少的电流并因此降低功耗。

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