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    • 1. 发明申请
    • PROTECT DIODES FOR HYBRID-ORIENTATION SUBSTRATE STRUCTURES
    • 用于混合基底结构的保护二极管
    • US20070293025A1
    • 2007-12-20
    • US11849489
    • 2007-09-04
    • James AdkissonJeffrey GambinoAlain LoiseauKirk Peterson
    • James AdkissonJeffrey GambinoAlain LoiseauKirk Peterson
    • H01L21/04
    • H01L27/1203H01L21/823807H01L21/823878H01L21/84H01L27/0255H01L27/0922H01L27/1207H01L29/045
    • A semiconductor structure fabrication method. First, a semiconductor structure is provided including (a) a semiconductor block having a first semiconductor material doped with a first doping polarity and having a first lattice orientation, and (b) a semiconductor region on the semiconductor block, wherein the semiconductor region is physically isolated from the semiconductor block by a dielectric region, and wherein the semiconductor region includes a second semiconductor material (i) doped with a second doping polarity opposite to the first doping polarity and (ii) having a second lattice orientation different from the first lattice orientation. Next, first and second gate stacks are formed on the semiconductor block and the semiconductor region, respectively. Then, (i) first and second S/D regions are simultaneously formed in the semiconductor block on opposing sides of the first gate stack and (ii) first and second discharge prevention semiconductor regions in the semiconductor block.
    • 半导体结构制造方法。 首先,提供半导体结构,其包括:(a)具有掺杂有第一掺杂极性且具有第一晶格取向的第一半导体材料的半导体块,以及(b)半导体块上的半导体区域,其中半导体区域是物理上的 并且其中所述半导体区域包括掺杂有与所述第一掺杂极性相反的第二掺杂极性的第二半导体材料(i)和(ii)具有不同于所述第一晶格取向的第二晶格取向 。 接下来,分别在半导体块和半导体区域上形成第一和第二栅极叠层。 然后,(i)第一和第二S / D区域同时形成在半导体块中的第一栅极堆叠的相对侧上,以及(ii)半导体块中的第一和第二放电预防半导体区域。
    • 4. 发明申请
    • PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES
    • 用于收集电子和孔的像素传感器单元
    • US20070029581A1
    • 2007-02-08
    • US11161535
    • 2005-08-08
    • James AdkissonAndres BryantJohn Ellis-MonaghanMark JaffeJeffrey JohnsonAlain Loiseau
    • James AdkissonAndres BryantJohn Ellis-MonaghanMark JaffeJeffrey JohnsonAlain Loiseau
    • H01L27/148
    • H01L27/14603H01L27/14609H01L27/14689H01L31/035281
    • The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
    • 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域,用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域,而第二输入端耦合到p型收集阱区域,其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。
    • 8. 发明申请
    • A DAMASCENE COPPER WIRING IMAGE SENSOR
    • DAMASCENE铜接线图像传感器
    • US20060113622A1
    • 2006-06-01
    • US10904807
    • 2004-11-30
    • James AdkissonJeffrey GambinoMark JaffeRobert LeidyAnthony Stamper
    • James AdkissonJeffrey GambinoMark JaffeRobert LeidyAnthony Stamper
    • H01L31/00
    • H01L27/14685H01L21/76819H01L21/76834H01L21/76838H01L27/14621H01L27/14627H01L27/14636H01L27/14687
    • An image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material. Prior to depositing the refill dielectric, a layer of either reflective or absorptive material is formed along the sidewalls of the etched opening to improve sensitivity of the pixels by either reflecting light to the underlying photodiode or by eliminating light reflections.
    • 一种图像传感器阵列和制造方法,其中传感器包括铜(Cu)金属化水平,允许结合更薄的层间电介质叠层,改进的厚度均匀性,以产生呈现增加的光敏度的像素阵列。 在传感器阵列中,每个Cu金属化层包括在每个阵列像素之间的位置处形成的Cu金属线结构,并且阻挡材料层形成在穿过像素光路的每个Cu金属线结构上。 通过实现单掩模或自对准掩模方法,进行单次蚀刻以完全去除穿过光路的层间电介质层和阻挡层。 然后将蚀刻的开口用电介质材料重新填充。 在沉积再充填电介质之前,沿蚀刻开口的侧壁形成反射或吸收材料层,以通过将光反射到下面的光电二极管或通过消除光反射来提高像素的灵敏度。