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1. 发明申请

US20070145438A1 PIXEL SENSOR CELL HAVING REDUCED PINNING LAYER BARRIER POTENTIAL AND METHOD THEREOF 有权
标题翻译：具有减少的钉扎层障碍物的像素传感器电池及其方法
公开(公告)号：US20070145438A1
公开(公告)日：2007-06-28
申请号：US11681454
申请日：2007-03-02
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
IPC分类号： H01L31/113
CPC分类号： H01L27/14689 , H01L27/14603 , H01L27/14609 , H01L31/0352
摘要： A pixel sensor cell structure and method of manufacture. The pixel cell comprises a doped layer formed adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
摘要翻译：像素传感器单元结构及其制造方法。像素单元包括与传输栅极结构的第一侧相邻形成的用于耦合收集阱区和沟道区的掺杂层。减少了由钉扎层引起的对电荷转移的电势障碍干扰。

2. 发明申请

US20060226456A1 PIXEL SENSOR CELL HAVING REDUCED PINNING LAYER BARRIER POTENTIAL AND METHOD THEREOF 有权
标题翻译：具有减少的钉扎层障碍物的像素传感器电池及其方法
公开(公告)号：US20060226456A1
公开(公告)日：2006-10-12
申请号：US10907570
申请日：2005-04-06
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
IPC分类号： H01L31/113
CPC分类号： H01L27/14689 , H01L27/14603 , H01L27/14609 , H01L31/0352
摘要： A pixel sensor cell structure and method of manufacture. The pixel cell comprises a doped layer formed adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
摘要翻译：像素传感器单元结构及其制造方法。像素单元包括与传输栅极结构的第一侧相邻形成的用于耦合收集阱区和沟道区的掺杂层。减少了由钉扎层引起的对电荷转移的电势障碍干扰。

3. 发明申请

US20070184614A1 RECESSED GATE FOR A CMOS IMAGE SENSOR 有权
标题翻译： CMOS图像传感器的接收门
公开(公告)号：US20070184614A1
公开(公告)日：2007-08-09
申请号：US11735223
申请日：2007-04-13
申请人： James Adkisson , John Ellis-Monaghan , Mark Jaffe , Jerome Lasky
发明人： James Adkisson , John Ellis-Monaghan , Mark Jaffe , Jerome Lasky
IPC分类号： H01L21/336
CPC分类号： H01L27/14603 , H01L27/14601 , H01L27/14689 , H01L29/66621
摘要： A novel CMOS image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate having an upper surface, a gate comprising a dielectric layer formed on the substrate and a gate conductor formed on the gate dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. A portion of the bottom of the gate conductor is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region thereby eliminating any potential barrier interference caused by the pinning layer.
摘要翻译：一种新颖的CMOS图像传感器单元结构及其制造方法。成像传感器包括具有上表面的基板，包括形成在基板上的电介质层的栅极和形成在栅极电介质层上的栅极导体，形成在基板表面附近的第一导电类型的集合阱层栅极导体的第一侧，形成在基板表面上的集电阱顶部的第二导电类型的钉扎层，以及邻近栅极导体的第二侧形成的第一导电类型的扩散区域，栅极导体形成沟道收集阱层和扩散区域之间的区域。栅极导体的底部的一部分在衬底的表面下方凹进。优选地，栅极导体的一部分在钉扎层的底表面处或下方凹陷到深度，使得收集阱与沟道区相交，从而消除由钉扎层引起的任何潜在的屏障干扰。

4. 发明申请

US20060124976A1 RECESSED GATE FOR AN IMAGE SENSOR 有权
标题翻译：图像传感器的门
公开(公告)号：US20060124976A1
公开(公告)日：2006-06-15
申请号：US10905097
申请日：2004-12-15
申请人： James Adkisson , John Ellis-Monaghan , Mark Jaffe , Jerome Lasky
发明人： James Adkisson , John Ellis-Monaghan , Mark Jaffe , Jerome Lasky
IPC分类号： H01L31/113 , H01L29/76 , H01L29/94
CPC分类号： H01L27/14603 , H01L27/14601 , H01L27/14689 , H01L29/66621
摘要： A novel image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate, a gate comprising a dielectric layer and gate conductor formed on the dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. Part of the gate conductor bottom is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region.
摘要翻译：一种新颖的图像传感器单元结构及其制造方法。成像传感器包括基板，包括电介质层和形成在电介质层上的栅极导体的栅极，形成在与栅极导体的第一侧相邻的基板的表面下面的第一导电类型的收集阱层，钉扎层在基板表面上形成在集合阱顶部的第二导电类型的第一导电类型的扩散区和在栅极导体的第二侧附近形成的第一导电类型的扩散区，栅极导体在集电阱层和扩散区之间形成沟道区。栅极导体底部的一部分凹陷在基板的表面下方。优选地，栅极导体的一部分在钉扎层的底表面处或下方凹陷到使得收集阱与沟道区相交的深度。

5. 发明申请

US20070296006A1 STRUCTURE FOR PIXEL SENSOR CELL THAT COLLECTS ELECTRONS AND HOLES 失效
标题翻译：用于收集电子和孔的像素传感器单元的结构
公开(公告)号：US20070296006A1
公开(公告)日：2007-12-27
申请号：US11850776
申请日：2007-09-06
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
IPC分类号： H01L31/00
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14689 , H01L31/035281 , H01L31/1037
摘要： The present invention relates to a design structure for a pixel sensor cell. The pixel sensor cell approximately doubles the available signal for a given quanta of light. A design structure for a pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
摘要翻译：本发明涉及一种像素传感器单元的设计结构。像素传感器单元对于给定的光量大约使可用信号加倍。具有降低的复杂度的像素传感器单元的设计结构包括形成在基板的表面下面的n型收集阱区域，用于收集电子辐射产生的电子撞击在像素传感器单元上，以及p型收集阱区域用于收集由撞击光子产生的孔的基板的表面。具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小的第一输入和第二输入的信号。

6. 发明申请

US20070029581A1 PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES 失效
标题翻译：用于收集电子和孔的像素传感器单元
公开(公告)号：US20070029581A1
公开(公告)日：2007-02-08
申请号：US11161535
申请日：2005-08-08
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
IPC分类号： H01L27/148
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14689 , H01L31/035281
摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
摘要翻译：本发明是像素传感器单元及其制造方法。像素传感器单元对于给定的光量大约使可用信号加倍。本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上产生的电子以及形成在基板表面下方的p型收集阱区域用于收集由撞击光子产生的孔。具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小的第一输入和第二输入的信号。

7. 发明申请

US20070187787A1 PIXEL SENSOR STRUCTURE INCLUDING LIGHT PIPE AND METHOD FOR FABRICATION THEREOF 审中-公开
标题翻译：像素传感器结构包括光管及其制造方法
公开(公告)号：US20070187787A1
公开(公告)日：2007-08-16
申请号：US11276160
申请日：2006-02-16
申请人： Kristin Ackerson , James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Timothy Hoague , Mark Jaffe , Robert Leidy , Matthew Moon , Richard Passel
发明人： Kristin Ackerson , James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Timothy Hoague , Mark Jaffe , Robert Leidy , Matthew Moon , Richard Passel
IPC分类号： H01L27/14
CPC分类号： H01L27/14643 , H01L27/14625 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L27/14687 , H01L27/14689
摘要： A pixel for an image sensor includes a photosensor located within a substrate. A patterned dielectric layer having an aperture registered with the photosensor is located over the substrate. A lens structure is located over the dielectric layer and also registered with the photosensor. A liner layer is located contiguously upon a top surface of the dielectric layer, and the sidewalls and bottom of the aperture. The liner layer provides for enhanced reflection for off-axis incoming light and enhanced capture thereof by the photosensor. When the aperture does not provide a dielectric layer border for a metallization layer embedded within the dielectric layer, an exposed edge of the metallization layer may be chamfered.
摘要翻译：用于图像传感器的像素包括位于衬底内的光电传感器。具有与光电传感器对准的孔径的图案化电介质层位于衬底上。透镜结构位于电介质层上方并且还与光电传感器配准。衬垫层连续地定位在电介质层的顶表面上，孔的侧壁和底部。衬垫层为离轴入射光提供增强的反射，并且通过光电传感器增强其捕获。当孔径不为嵌入在电介质层内的金属化层提供介电层边界时，金属化层的暴露边缘可以被倒角。

8. 发明申请

US20060186505A1 IMAGE SENSOR CELLS 有权
标题翻译：图像传感器细胞
公开(公告)号：US20060186505A1
公开(公告)日：2006-08-24
申请号：US10906510
申请日：2005-02-23
申请人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
发明人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
IPC分类号： H01L31/06
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14641 , H01L27/14643 , H01L31/035281
摘要： A structure (and method for forming the same) for an image sensor cell. The structure includes (a) a semiconductor substrate; (b) a charge collection well on the substrate, the charge collection well comprising a semiconductor material doped with a first doping polarity; (c) a surface pinning layer on and in direct physical contact with the charge collection well, the surface pinning layer comprising a semiconductor material doped with a second doping polarity opposite to the first doping polarity; and (d) an electrically conducting push electrode being in direct physical contact with the surface pinning layer but not being in direct physical contact with the charge collection well.
摘要翻译：用于图像传感器单元的结构（及其形成方法）。该结构包括（a）半导体衬底; （b）在所述衬底上的电荷收集阱，所述电荷收集阱包括掺杂有第一掺杂极性的半导体材料; （c）与电荷收集阱直接物理接触的表面钉扎层，所述表面钉扎层包括掺杂有与第一掺杂极性相反的第二掺杂极性的半导体材料; 和（d）与表面钉扎层直接物理接触但不与电荷收集阱直接物理接触的导电推动电极。

9. 发明申请

US20070108485A1 IMAGE SENSOR CELLS 失效
标题翻译：图像传感器细胞
公开(公告)号：US20070108485A1
公开(公告)日：2007-05-17
申请号：US11619024
申请日：2007-01-02
申请人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
发明人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
IPC分类号： H01L31/113 , H01L21/00
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14641 , H01L27/14643 , H01L31/035281
摘要： A structure (and method for forming the same) for an image sensor cell. The method includes providing a semiconductor substrate. Then, a charge collection well is formed in the semiconductor substrate, the charge collection well comprising dopants of a first doping polarity. Next, a surface pinning layer is formed in the charge collection well, the surface pinning layer comprising dopants of a second doping polarity opposite to the first doping polarity. Then, an electrically conductive push electrode is formed in direct physical contact with the surface pinning layer but not in direct physical contact with the charge collection well. Then, a transfer transistor is formed on the semiconductor substrate. The transfer transistor includes first and second source/drain regions and a channel region. The first and second source/drain regions comprise dopants of the first doping polarity. The first source/drain region is in direct physical contact with the charge collection well.
摘要翻译：用于图像传感器单元的结构（及其形成方法）。该方法包括提供半导体衬底。然后，在半导体衬底中形成电荷收集阱，电荷收集阱包含第一掺杂极性的掺杂剂。接下来，在电荷收集阱中形成表面钉扎层，表面钉扎层包括与第一掺杂极性相反的第二掺杂极性的掺杂剂。然后，导电的推动电极形成为与表面钉扎层直接物理接触，但不与电荷收集阱直接物理接触。然后，在半导体衬底上形成传输晶体管。传输晶体管包括第一和第二源极/漏极区域和沟道区域。第一和第二源/漏区包括第一掺杂极性的掺杂剂。第一源极/漏极区域与电荷收集阱直接物理接触。

10. 发明申请

US20070158711A1 CMOS SENSORS HAVING CHARGE PUSHING REGIONS 失效
标题翻译：具有充电推动区域的CMOS传感器
公开(公告)号：US20070158711A1
公开(公告)日：2007-07-12
申请号：US11275497
申请日：2006-01-10
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Jeffrey Johnson , Jerome Lasky , Richard Rassel
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Jeffrey Johnson , Jerome Lasky , Richard Rassel
IPC分类号： H01L31/113 , H01L27/148 , H01L29/768
CPC分类号： H01L27/1462 , H01L27/14603 , H01L27/1463
摘要： Structures and method for forming the same. The semiconductor structure comprises a photo diode that includes a first semiconductor region and a second semiconductor region. The first and second semiconductor regions are doped with a first and second doping polarities, respectively, and the first and second doping polarities are opposite. The semiconductor structure also comprises a transfer gate that comprises (i) a first extension region, (ii) a second extension region, and (iii) a floating diffusion region. The first and second extension regions are in direct physical contact with the photo diode and the floating diffusion region, respectively. The semiconductor structure further comprises a charge pushing region. The charge pushing region overlaps the first semiconductor region and does not overlap the floating diffusion region. The charge pushing region comprises a transparent and electrically conducting material.
摘要翻译：结构及其形成方法。该半导体结构包括包含第一半导体区域和第二半导体区域的光电二极管。第一和第二半导体区域分别掺杂有第一和第二掺杂极性，并且第一和第二掺杂极性相反。半导体结构还包括传输门，其包括（i）第一延伸区，（ii）第二延伸区和（iii）浮动扩散区。第一和第二延伸区分别与光电二极管和浮动扩散区直接物理接触。半导体结构还包括电荷推送区域。电荷推送区域与第一半导体区域重叠，并且不与浮动扩散区域重叠。电荷推送区域包括透明且导电的材料。

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