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1. 发明申请

US20070158711A1 CMOS SENSORS HAVING CHARGE PUSHING REGIONS 失效
标题翻译：具有充电推动区域的CMOS传感器
公开(公告)号：US20070158711A1
公开(公告)日：2007-07-12
申请号：US11275497
申请日：2006-01-10
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Jeffrey Johnson , Jerome Lasky , Richard Rassel
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Jeffrey Johnson , Jerome Lasky , Richard Rassel
IPC分类号： H01L31/113 , H01L27/148 , H01L29/768
CPC分类号： H01L27/1462 , H01L27/14603 , H01L27/1463
摘要： Structures and method for forming the same. The semiconductor structure comprises a photo diode that includes a first semiconductor region and a second semiconductor region. The first and second semiconductor regions are doped with a first and second doping polarities, respectively, and the first and second doping polarities are opposite. The semiconductor structure also comprises a transfer gate that comprises (i) a first extension region, (ii) a second extension region, and (iii) a floating diffusion region. The first and second extension regions are in direct physical contact with the photo diode and the floating diffusion region, respectively. The semiconductor structure further comprises a charge pushing region. The charge pushing region overlaps the first semiconductor region and does not overlap the floating diffusion region. The charge pushing region comprises a transparent and electrically conducting material.
摘要翻译：结构及其形成方法。该半导体结构包括包含第一半导体区域和第二半导体区域的光电二极管。第一和第二半导体区域分别掺杂有第一和第二掺杂极性，并且第一和第二掺杂极性相反。半导体结构还包括传输门，其包括（i）第一延伸区，（ii）第二延伸区和（iii）浮动扩散区。第一和第二延伸区分别与光电二极管和浮动扩散区直接物理接触。半导体结构还包括电荷推送区域。电荷推送区域与第一半导体区域重叠，并且不与浮动扩散区域重叠。电荷推送区域包括透明且导电的材料。

2. 发明申请

US20070145438A1 PIXEL SENSOR CELL HAVING REDUCED PINNING LAYER BARRIER POTENTIAL AND METHOD THEREOF 有权
标题翻译：具有减少的钉扎层障碍物的像素传感器电池及其方法
公开(公告)号：US20070145438A1
公开(公告)日：2007-06-28
申请号：US11681454
申请日：2007-03-02
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
IPC分类号： H01L31/113
CPC分类号： H01L27/14689 , H01L27/14603 , H01L27/14609 , H01L31/0352
摘要： A pixel sensor cell structure and method of manufacture. The pixel cell comprises a doped layer formed adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
摘要翻译：像素传感器单元结构及其制造方法。像素单元包括与传输栅极结构的第一侧相邻形成的用于耦合收集阱区和沟道区的掺杂层。减少了由钉扎层引起的对电荷转移的电势障碍干扰。

3. 发明申请

US20060226456A1 PIXEL SENSOR CELL HAVING REDUCED PINNING LAYER BARRIER POTENTIAL AND METHOD THEREOF 有权
标题翻译：具有减少的钉扎层障碍物的像素传感器电池及其方法
公开(公告)号：US20060226456A1
公开(公告)日：2006-10-12
申请号：US10907570
申请日：2005-04-06
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
IPC分类号： H01L31/113
CPC分类号： H01L27/14689 , H01L27/14603 , H01L27/14609 , H01L31/0352
摘要： A pixel sensor cell structure and method of manufacture. The pixel cell comprises a doped layer formed adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
摘要翻译：像素传感器单元结构及其制造方法。像素单元包括与传输栅极结构的第一侧相邻形成的用于耦合收集阱区和沟道区的掺杂层。减少了由钉扎层引起的对电荷转移的电势障碍干扰。

4. 发明申请

US20080108170A1 CMOS IMAGER WITH CU WIRING AND METHOD OF ELIMINATING HIGH REFLECTIVITY INTERFACES THEREFROM 失效
标题翻译：具有CU布线的CMOS成像器和消除其高反射性接口的方法
公开(公告)号：US20080108170A1
公开(公告)日：2008-05-08
申请号：US11959841
申请日：2007-12-19
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Richard Rassel , Anthony Stamper
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Richard Rassel , Anthony Stamper
IPC分类号： H01L21/04
CPC分类号： H01L27/14636 , H01L21/76819 , H01L21/76834 , H01L27/14621 , H01L27/14625 , H01L27/14627 , H01L27/14629 , H01L27/14645 , H01L27/14683
摘要： A CMOS image sensor and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack to result in a pixel array exhibiting increased light sensitivity. The CMOS image sensor includes structures having a minimum thickness of barrier layer metal that traverses the optical path of each pixel in the sensor array or, that have portions of barrier layer metal selectively removed from the optical paths of each pixel, thereby minimizing reflectance. That is, by implementing various block or single mask methodologies, portions of the barrier layer metal are completely removed at locations of the optical path for each pixel in the array. In a further embodiment, the barrier metal layer may be formed atop the Cu metallization by a self-aligned deposition.
摘要翻译： CMOS图像传感器和制造方法，其中传感器包括铜（Cu）金属化水平，允许结合较薄的层间电介质堆叠以产生呈现增加的光灵敏度的像素阵列。 CMOS图像传感器包括具有穿过传感器阵列中的每个像素的光路的阻挡层金属的最小厚度的结构，或者具有从每个像素的光路中选择性地去除的阻挡层金属的部分，从而使反射率最小化的结构。也就是说，通过实现各种块或单掩模方法，在阵列中的每个像素的光路的位置处完全去除了阻挡层金属的部分。在另一个实施例中，阻挡金属层可以通过自对准沉积形成在Cu金属化之上。

5. 发明申请

US20060110905A1 HIGH SURFACE AREA ALUMINUM BOND PAD FOR THROUGH-WAFER CONNECTIONS TO AN ELECTRONIC PACKAGE 有权
标题翻译：高表面积的铝合金焊盘，用于通过电缆连接到电子包装
公开(公告)号：US20060110905A1
公开(公告)日：2006-05-25
申请号：US10904677
申请日：2004-11-23
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Richard Rassel , Edmund Sprogis
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Richard Rassel , Edmund Sprogis
IPC分类号： H01L21/44 , H01L21/50
CPC分类号： H01L24/02 , H01L23/3114 , H01L23/481 , H01L2224/0401 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1461 , H01L2924/3011 , H01L2924/00
摘要： A bond pad for effecting through-wafer connections to an integrated circuit or electronic package and method of producing thereof. The bond pad includes a high surface area aluminum bond pad in order to resultingly obtain a highly reliable, low resistance connection between bond pad and electrical leads.
摘要翻译：用于实现通过晶片连接到集成电路或电子封装的接合焊盘及其制造方法。接合焊盘包括高表面积铝键合焊盘，以便得到接合焊盘和电引线之间的高度可靠的低电阻连接。

6. 发明申请

US20070108485A1 IMAGE SENSOR CELLS 失效
标题翻译：图像传感器细胞
公开(公告)号：US20070108485A1
公开(公告)日：2007-05-17
申请号：US11619024
申请日：2007-01-02
申请人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
发明人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
IPC分类号： H01L31/113 , H01L21/00
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14641 , H01L27/14643 , H01L31/035281
摘要： A structure (and method for forming the same) for an image sensor cell. The method includes providing a semiconductor substrate. Then, a charge collection well is formed in the semiconductor substrate, the charge collection well comprising dopants of a first doping polarity. Next, a surface pinning layer is formed in the charge collection well, the surface pinning layer comprising dopants of a second doping polarity opposite to the first doping polarity. Then, an electrically conductive push electrode is formed in direct physical contact with the surface pinning layer but not in direct physical contact with the charge collection well. Then, a transfer transistor is formed on the semiconductor substrate. The transfer transistor includes first and second source/drain regions and a channel region. The first and second source/drain regions comprise dopants of the first doping polarity. The first source/drain region is in direct physical contact with the charge collection well.
摘要翻译：用于图像传感器单元的结构（及其形成方法）。该方法包括提供半导体衬底。然后，在半导体衬底中形成电荷收集阱，电荷收集阱包含第一掺杂极性的掺杂剂。接下来，在电荷收集阱中形成表面钉扎层，表面钉扎层包括与第一掺杂极性相反的第二掺杂极性的掺杂剂。然后，导电的推动电极形成为与表面钉扎层直接物理接触，但不与电荷收集阱直接物理接触。然后，在半导体衬底上形成传输晶体管。传输晶体管包括第一和第二源极/漏极区域和沟道区域。第一和第二源/漏区包括第一掺杂极性的掺杂剂。第一源极/漏极区域与电荷收集阱直接物理接触。

7. 发明申请

US20070194397A1 PHOTO-SENSOR AND PIXEL ARRAY WITH BACKSIDE ILLUMINATION AND METHOD OF FORMING THE PHOTO-SENSOR 有权
标题翻译：具有背光照明的照相传感器和像素阵列以及形成照相传感器的方法
公开(公告)号：US20070194397A1
公开(公告)日：2007-08-23
申请号：US11276218
申请日：2006-02-17
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Alan Loiseau , Richard Rassel
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Alan Loiseau , Richard Rassel
IPC分类号： H01L31/0232 , H01L31/00
CPC分类号： H01L27/14643 , H01L27/14621 , H01L27/1463 , H01L27/1464 , H01L27/14689
摘要： An imaging sensor with an array of FET pixels and method of forming the imaging sensor. Each pixel is a semiconductor island, e.g., N-type silicon on a Silicon on insulator (SOI) wafer. FETs are formed in one photodiode electrode, e.g., a P-well cathode. A color filter may be attached to an opposite surface of island. A protective layer (e.g., glass or quartz) or window is fixed to the pixel array at the color filters. The image sensor may be illuminated from the backside with cell wiring above the cell. So, an optical signal passes through the protective layer is filtered by the color filters and selectively sensed by a corresponding photo-sensor.
摘要翻译：具有FET像素阵列的成像传感器和形成成像传感器的方法。每个像素是半导体岛，例如绝缘体上硅（SOI）晶片上的N型硅。 FET形成在一个光电二极管电极中，例如P阱阴极。滤色器可以附接到岛的相对表面。保护层（例如，玻璃或石英）或窗口在滤色器处固定到像素阵列。图像传感器可以从背面照亮，电池布线在电池单元上方。因此，通过保护层的光学信号被滤色器过滤并被相应的光电传感器选择性地感测。

8. 发明申请

US20060186505A1 IMAGE SENSOR CELLS 有权
标题翻译：图像传感器细胞
公开(公告)号：US20060186505A1
公开(公告)日：2006-08-24
申请号：US10906510
申请日：2005-02-23
申请人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
发明人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
IPC分类号： H01L31/06
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14641 , H01L27/14643 , H01L31/035281
摘要： A structure (and method for forming the same) for an image sensor cell. The structure includes (a) a semiconductor substrate; (b) a charge collection well on the substrate, the charge collection well comprising a semiconductor material doped with a first doping polarity; (c) a surface pinning layer on and in direct physical contact with the charge collection well, the surface pinning layer comprising a semiconductor material doped with a second doping polarity opposite to the first doping polarity; and (d) an electrically conducting push electrode being in direct physical contact with the surface pinning layer but not being in direct physical contact with the charge collection well.
摘要翻译：用于图像传感器单元的结构（及其形成方法）。该结构包括（a）半导体衬底; （b）在所述衬底上的电荷收集阱，所述电荷收集阱包括掺杂有第一掺杂极性的半导体材料; （c）与电荷收集阱直接物理接触的表面钉扎层，所述表面钉扎层包括掺杂有与第一掺杂极性相反的第二掺杂极性的半导体材料; 和（d）与表面钉扎层直接物理接触但不与电荷收集阱直接物理接触的导电推动电极。

9. 发明申请

US20060138480A1 A CMOS IMAGER WITH CU WIRING AND METHOD OF ELIMINATING HIGH REFLECTIVITY INTERFACES THEREFROM 有权
标题翻译：具有CU接线的CMOS成像器和消除其高反射性接口的方法
公开(公告)号：US20060138480A1
公开(公告)日：2006-06-29
申请号：US10905277
申请日：2004-12-23
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Richard Rassel , Anthony Stamper
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Richard Rassel , Anthony Stamper
IPC分类号： H01L31/113 , H01L31/0232 , H01L31/00
CPC分类号： H01L27/14636 , H01L21/76819 , H01L21/76834 , H01L27/14621 , H01L27/14625 , H01L27/14627 , H01L27/14629 , H01L27/14645 , H01L27/14683
摘要： An image sensor and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack to result in a pixel array exhibiting increased light sensitivity. The image sensor includes structures having a minimum thickness of barrier layer metal that traverses the optical path of each pixel in the sensor array or, that have portions of barrier layer metal selectively removed from the optical paths of each pixel, thereby minimizing reflectance. That is, by implementing various block or single mask methodologies, portions of the barrier layer metal are completely removed at locations of the optical path for each pixel in the array. In a further embodiment, the barrier metal layer may be formed atop the Cu metallization by a self-aligned deposition.
摘要翻译：一种图像传感器和制造方法，其中传感器包括铜（Cu）金属化水平，允许结合较薄的层间电介质堆叠以产生呈现增加的光敏度的像素阵列。图像传感器包括具有穿过传感器阵列中的每个像素的光路的阻挡层金属的最小厚度的结构，或者具有从每个像素的光路中选择性地去除的阻挡层金属的部分，从而使反射率最小化。也就是说，通过实现各种块或单掩模方法，在阵列中的每个像素的光路的位置处完全去除了阻挡层金属的部分。在另一个实施例中，阻挡金属层可以通过自对准沉积形成在Cu金属化之上。

10. 发明申请

US20070184614A1 RECESSED GATE FOR A CMOS IMAGE SENSOR 有权
标题翻译： CMOS图像传感器的接收门
公开(公告)号：US20070184614A1
公开(公告)日：2007-08-09
申请号：US11735223
申请日：2007-04-13
申请人： James Adkisson , John Ellis-Monaghan , Mark Jaffe , Jerome Lasky
发明人： James Adkisson , John Ellis-Monaghan , Mark Jaffe , Jerome Lasky
IPC分类号： H01L21/336
CPC分类号： H01L27/14603 , H01L27/14601 , H01L27/14689 , H01L29/66621
摘要： A novel CMOS image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate having an upper surface, a gate comprising a dielectric layer formed on the substrate and a gate conductor formed on the gate dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. A portion of the bottom of the gate conductor is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region thereby eliminating any potential barrier interference caused by the pinning layer.
摘要翻译：一种新颖的CMOS图像传感器单元结构及其制造方法。成像传感器包括具有上表面的基板，包括形成在基板上的电介质层的栅极和形成在栅极电介质层上的栅极导体，形成在基板表面附近的第一导电类型的集合阱层栅极导体的第一侧，形成在基板表面上的集电阱顶部的第二导电类型的钉扎层，以及邻近栅极导体的第二侧形成的第一导电类型的扩散区域，栅极导体形成沟道收集阱层和扩散区域之间的区域。栅极导体的底部的一部分在衬底的表面下方凹进。优选地，栅极导体的一部分在钉扎层的底表面处或下方凹陷到深度，使得收集阱与沟道区相交，从而消除由钉扎层引起的任何潜在的屏障干扰。

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