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1. 发明申请

US20070161230A1 UV curing of low-k porous dielectrics 有权
标题翻译：低k多孔电介质的UV固化
公开(公告)号：US20070161230A1
公开(公告)日：2007-07-12
申请号：US11328596
申请日：2006-01-10
申请人： I-I Chen , Tien-I Bao , Shwang-Ming Cheng , Chen-Hua Yu
发明人： I-I Chen , Tien-I Bao , Shwang-Ming Cheng , Chen-Hua Yu
IPC分类号： H01L21/4763 , H01L21/469
CPC分类号： H01L21/76826 , H01L21/7682 , H01L21/76825 , H01L2221/1047
摘要： A method of manufacturing a semiconductor device having a low-k dielectric layer is provided. An embodiment comprises forming a dielectric layer on a substrate, wherein the layer comprises a pore generating material dispersed in an uncured matrix. A second step comprises forming pores in the uncured matrix by irradiating the layer with radiation having a first wavelength. After pore forming, a third step comprises cross-linking the dielectric by irradiating it at a second wavelength, the second being less than the first. In an embodiment, the irradiating wavelengths comprise ultra-violet radiation. Embodiments may further include repairing processing damage wherein the damage includes dangling bonds or silanol formation. The repairing includes annealing in a carbon-containing ambient such as C2H4, C3H6, or hexamethyldisilazane (HMDS).
摘要翻译：提供一种制造具有低k电介质层的半导体器件的方法。一个实施方案包括在基底上形成介电层，其中该层包含分散在未固化的基质中的孔产生材料。第二步骤包括通过用具有第一波长的辐射照射该层来在未固化的基质中形成孔。在成孔之后，第三步骤包括通过以第二波长照射电介质来交联电介质，第二步小于第一波长。在一个实施例中，照射波长包括紫外辐射。实施方案可以进一步包括修复处理损伤，其中损伤包括悬挂键或硅烷醇形成。修复包括在含碳环境中退火，例如C 2 H 4 H 3，C 3 H 6，或六甲基二硅氮烷（HMDS）。

2. 发明授权

US07465676B2 Method for forming dielectric film to improve adhesion of low-k film 有权
标题翻译：用于形成介电膜以改善低k膜的粘附性的方法
公开(公告)号：US07465676B2
公开(公告)日：2008-12-16
申请号：US11409658
申请日：2006-04-24
申请人： Fang Wen Tsai , I-I Chen , Zhen-Cheng Wu , Chih-Lung Lin , Tien-I Bao , Shwang-Ming Jeng , Chen-Hua Yu
发明人： Fang Wen Tsai , I-I Chen , Zhen-Cheng Wu , Chih-Lung Lin , Tien-I Bao , Shwang-Ming Jeng , Chen-Hua Yu
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/76832 , H01L21/76843
摘要： A semiconductor structure having improved adhesion between a low-k dielectric layer and the underlying layer and a method for forming the same are provided. The semiconductor substrate includes a dielectric layer over a semiconductor substrate, an adhesion layer on the dielectric layer wherein the adhesion layer comprises a transition sub-layer over an initial sub-layer, and wherein the transition sub-layer has a composition that gradually changes from a lower portion to an upper portion. A low-k dielectric layer is formed on the adhesion layer. Damascene openings are formed in the low-k dielectric layer. A top portion of the transition sub-layer has a composition substantially similar to a composition of the low-k dielectric layer. A bottom portion of the transition sub-layer has a composition substantially similar to a composition of the initial sub-layer.
摘要翻译：提供了具有改善的低k电介质层和下层之间的粘附性的半导体结构及其形成方法。所述半导体衬底包括半导体衬底上的电介质层，所述电介质层上的粘合层，其中所述粘合层包含初始子层上的过渡子层，并且其中所述过渡子层具有逐渐从下部到上部。在粘合层上形成低k电介质层。在低k电介质层中形成镶嵌开口。过渡子层的顶部具有与低k电介质层的组成基本相似的组成。过渡子层的底部具有与初始子层的组成基本相似的组成。

3. 发明申请

US20080188074A1 Peeling-free porous capping material 审中-公开
标题翻译：无剥离多孔封盖材料
公开(公告)号：US20080188074A1
公开(公告)日：2008-08-07
申请号：US11728623
申请日：2007-03-27
申请人： I-I Chen , Fang Wen Tsai , Zhen-Cheng Wu , Tien-I Bao , Shwang-Ming Jeng , Chen-Hua Yu
发明人： I-I Chen , Fang Wen Tsai , Zhen-Cheng Wu , Tien-I Bao , Shwang-Ming Jeng , Chen-Hua Yu
IPC分类号： H01L21/4763
CPC分类号： H01L21/7682 , H01L21/76829 , H01L21/76835 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a cap layer for an interconnect structure is provided. The method includes providing a substrate; depositing a low-k dielectric layer comprising a first porogen over the substrate; depositing a low-k cap layer comprising a second porogen on the low-k dielectric layer; and curing the low-k dielectric layer and the low-k cap layer simultaneously to remove the first and the second porogens, so that a first porosity in the low-k dielectric layer and a second porosity in the low-k cap layer are created. The second porosity is preferably less than the first porosity. Preferably, the low-k dielectric layer and the low-k cap layer comprise a common set of precursors and porogens, and are in-situ performed.
摘要翻译：提供一种用于形成互连结构的盖层的方法。该方法包括提供基板; 在衬底上沉积包含第一致孔剂的低k电介质层; 在低k电介质层上沉积包含第二致孔剂的低k覆盖层; 并且同时固化低k电介质层和低k覆盖层以除去第一和第二致孔剂，从而产生低k电介质层中的第一孔隙和低k覆盖层中的第二孔隙率。第二孔隙率优选小于第一孔隙率。优选地，低k电介质层和低k覆盖层包含一组共同的前体和致孔剂，并且原位进行。

4. 发明申请

US20070249159A1 Method for forming dielectric film to improve adhesion of low-k film 有权
标题翻译：用于形成介电膜以改善低k膜的粘附性的方法
公开(公告)号：US20070249159A1
公开(公告)日：2007-10-25
申请号：US11409658
申请日：2006-04-24
申请人： Fang Tsai , I-I Chen , Zhen-Cheng Wu , Chih-Lung Lin , Tien-I Bao , Shwang-Ming Jeng , Chen-Hua Yu
发明人： Fang Tsai , I-I Chen , Zhen-Cheng Wu , Chih-Lung Lin , Tien-I Bao , Shwang-Ming Jeng , Chen-Hua Yu
IPC分类号： H01L21/4763
CPC分类号： H01L21/76832 , H01L21/76843
摘要： A semiconductor structure having improved adhesion between a low-k dielectric layer and the underlying layer and a method for forming the same are provided. The semiconductor substrate includes a dielectric layer over a semiconductor substrate, an adhesion layer on the dielectric layer wherein the adhesion layer comprises a transition sub-layer over an initial sub-layer, and wherein the transition sub-layer has a composition that gradually changes from a lower portion to an upper portion. A low-k dielectric layer is formed on the adhesion layer. Damascene openings are formed in the low-k dielectric layer. A top portion of the transition sub-layer has a composition substantially similar to a composition of the low-k dielectric layer. A bottom portion of the transition sub-layer has a composition substantially similar to a composition of the initial sub-layer.
摘要翻译：提供了具有改进的低k电介质层和下层之间的粘附性的半导体结构及其形成方法。所述半导体衬底包括半导体衬底上的电介质层，所述电介质层上的粘合层，其中所述粘合层包含初始子层上的过渡子层，并且其中所述过渡子层具有逐渐从下部到上部。在粘合层上形成低k电介质层。在低k电介质层中形成镶嵌开口。过渡子层的顶部具有与低k电介质层的组成基本相似的组成。过渡子层的底部具有与初始子层的组成基本相似的组成。

5. 发明授权

US07482265B2 UV curing of low-k porous dielectrics 有权
标题翻译：低k多孔电介质的UV固化
公开(公告)号：US07482265B2
公开(公告)日：2009-01-27
申请号：US11328596
申请日：2006-01-10
申请人： I-I Chen , Tien-I Bao , Shwang-Ming Cheug , Chen-Hua Yu
发明人： I-I Chen , Tien-I Bao , Shwang-Ming Cheug , Chen-Hua Yu
IPC分类号： H01L21/469
CPC分类号： H01L21/76826 , H01L21/7682 , H01L21/76825 , H01L2221/1047
摘要： A method of manufacturing a semiconductor device having a low-k dielectric layer is provided. An embodiment comprises forming a dielectric layer on a substrate, wherein the layer comprises a pore generating material dispersed in an uncured matrix. A second step comprises forming pores in the uncured matrix by irradiating the layer with radiation having a first wavelength. After pore forming, a third step comprises cross-linking the dielectric by irradiating it at a second wavelength, the second being less than the first. In an embodiment, the irradiating wavelengths comprise ultra-violet radiation. Embodiments may further include repairing processing damage wherein the damage includes dangling bonds or silanol formation. The repairing includes annealing in a carbon-containing ambient such as C2H4, C3H6, or hexamethyldisilazane (HMDS).
摘要翻译：提供一种制造具有低k电介质层的半导体器件的方法。一个实施方案包括在基底上形成介电层，其中该层包含分散在未固化的基质中的孔产生材料。第二步骤包括通过用具有第一波长的辐射照射该层来在未固化的基质中形成孔。在成孔之后，第三步骤包括通过以第二波长照射电介质来交换电介质，第二步小于第一波长。在一个实施例中，照射波长包括紫外辐射。实施方案可以进一步包括修复处理损伤，其中损伤包括悬挂键或硅烷醇形成。修复包括在含碳环境如C2H4，C3H6或六甲基二硅氮烷（HMDS）中的退火。

6. 发明申请

US20080116578A1 Initiation layer for reducing stress transition due to curing 审中-公开
标题翻译：起始层，用于减少由于固化而引起的应力转变
公开(公告)号：US20080116578A1
公开(公告)日：2008-05-22
申请号：US11602857
申请日：2006-11-21
申请人： Kuan-Chen Wang , Zhen-Cheng Wu , Fang Wen Tsai , Yih-Hsing Lo , I-I Chen , Tien-I Bao , Shwang-Ming Jeng
发明人： Kuan-Chen Wang , Zhen-Cheng Wu , Fang Wen Tsai , Yih-Hsing Lo , I-I Chen , Tien-I Bao , Shwang-Ming Jeng
IPC分类号： H01L23/50 , H01L21/44
CPC分类号： H01L21/76834 , H01L21/76825 , H01L21/76832 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit includes an etch stop layer over a substrate; a UV blocker layer on the etch stop layer, wherein the UV blocker layer has a high extinction coefficient; and a low-k dielectric layer on the UV blocker layer.
摘要翻译：集成电路包括在衬底上的蚀刻停止层; 在所述蚀刻停止层上的UV阻挡层，其中所述UV阻挡层具有高消光系数; 和UV阻挡层上的低k电介质层。

7. 发明授权

US07094705B2 Multi-step plasma treatment method to improve CU interconnect electrical performance 有权
标题翻译：多级等离子处理方法提高CU互连电气性能
公开(公告)号：US07094705B2
公开(公告)日：2006-08-22
申请号：US10762186
申请日：2004-01-20
申请人： Keng-Chu Lin , Hui-Lin Chang , I-I Chen , Yung-Chen Lu , Syun-Ming Jeng
发明人： Keng-Chu Lin , Hui-Lin Chang , I-I Chen , Yung-Chen Lu , Syun-Ming Jeng
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/76888 , H01L21/321 , H01L21/76826 , H01L21/76829 , H01L21/76838 , H01L21/7684
摘要： A method for plasma treating an exposed copper surface and dielectric insulating layer in a semiconductor device manufacturing process including providing a semiconductor wafer having a process surface including an exposed copper portion and an exposed dielectric insulating layer portion; plasma treating in a first plasma treatment process, the process surface with a first plasma including ammonia (NH3) and nitrogen (N2) plasma to form a copper nitride layer overlying the exposed copper portion; and, plasma treating in a second plasma treatment process the process surface with a second plasma including oxygen (O2).
摘要翻译：一种在半导体器件制造工艺中等离子体处理暴露的铜表面和介电绝缘层的方法，包括提供具有包括暴露的铜部分和暴露的介电绝缘层部分的工艺表面的半导体晶片; 在第一等离子体处理过程中进行等离子体处理，所述工艺表面具有包含氨（NH 3）3和氮（N 2 O 3）等离子体的第一等离子体，以形成覆盖的氮化铜层暴露的铜部分; 以及在第二等离子体处理过程中进行等离子体处理，所述工艺表面具有包含氧（O 2 O 2）的第二等离子体。

8. 发明申请

US20050158999A1 Multi-step plasma treatment method to improve CU interconnect electrical performance 有权
标题翻译：多级等离子处理方法提高CU互连电气性能
公开(公告)号：US20050158999A1
公开(公告)日：2005-07-21
申请号：US10762186
申请日：2004-01-20
申请人： Keng-Chu Lin , Hui-Lin Chang , I-I Chen , Yung-Chen Lu , Syug-Ming Jang
发明人： Keng-Chu Lin , Hui-Lin Chang , I-I Chen , Yung-Chen Lu , Syug-Ming Jang
IPC分类号： H01L21/321 , H01L21/768 , H01L21/04 , H01L21/469 , H01L21/4763
CPC分类号： H01L21/76888 , H01L21/321 , H01L21/76826 , H01L21/76829 , H01L21/76838 , H01L21/7684
摘要： A method for plasma treating an exposed copper surface and dielectric insulating layer in a semiconductor device manufacturing process including providing a semiconductor wafer having a process surface including an exposed copper portion and an exposed dielectric insulating layer portion; plasma treating in a first plasma treatment process, the process surface with a first plasma including ammonia (NH3) and nitrogen (N2) plasma to form a copper nitride layer overlying the exposed copper portion; and, plasma treating in a second plasma treatment process the process surface with a second plasma including oxygen (O2).
摘要翻译：一种在半导体器件制造工艺中等离子体处理暴露的铜表面和介电绝缘层的方法，包括提供具有包括暴露的铜部分和暴露的介电绝缘层部分的工艺表面的半导体晶片; 在第一等离子体处理过程中进行等离子体处理，所述工艺表面具有包含氨（NH 3）3和氮（N 2 O 3）等离子体的第一等离子体，以形成覆盖的氮化铜层暴露的铜部分; 以及在第二等离子体处理过程中进行等离子体处理，所述工艺表面具有包含氧（O 2 O 2）的第二等离子体。

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