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1. 发明授权

US08610589B2 Noise suppression techniques in high precision long-term frequency/timing measurements 有权
标题翻译：高精度长期频率/时序测量中的噪声抑制技术
公开(公告)号：US08610589B2
公开(公告)日：2013-12-17
申请号：US12710334
申请日：2010-02-22
申请人： Hua Wang , Seyed Ali Hajimiri , Shouhei Kousai
发明人： Hua Wang , Seyed Ali Hajimiri , Shouhei Kousai
IPC分类号： G08B21/00 , G01R13/34
CPC分类号： G01R29/26 , G01R31/31709
摘要： A frequency/timing measurement apparatus includes a reference source having a reference source output terminal. At least one target source has a target source output terminal. The at least one target source is communicatively coupled to the reference source. A frequency timing measurement block has a first input terminal electrically coupled to the reference source output terminal. A second input terminal is electrically coupled to the target source output terminal and at least one output terminal. The frequency timing measurement block is configured to perform a noise shaping technique to reduce measurement error attributable to a phase noise that is correlated between the reference source and the target source, and to provide a reduced correlated noise measurement at the at least one output terminal. A method to reduce correlated noise is also described.
摘要翻译：频率/定时测量装置包括具有参考源输出端的参考源。至少一个目标源具有目标源输出端。至少一个目标源通信地耦合到参考源。频率定时测量块具有电耦合到参考源输出端的第一输入端。第二输入端子电耦合到目标源输出端子和至少一个输出端子。频率定时测量块被配置为执行噪声整形技术以减少归因于在参考源和目标源之间相关的相位噪声的测量误差，并且在至少一个输出端子处提供减小的相关噪声测量。还描述了一种降低相关噪声的方法。

2. 发明申请

US20100245100A1 NOISE SUPPRESSION TECHNIQUES IN HIGH PRECISION LONG-TERM FREQUENCY/TIMING MEASUREMENTS 有权
标题翻译：噪声抑制技术在高精度长期频率/时序测量
公开(公告)号：US20100245100A1
公开(公告)日：2010-09-30
申请号：US12710334
申请日：2010-02-22
申请人： Hua Wang , Seyed Ali Hajimiri , Shouhei Kousai
发明人： Hua Wang , Seyed Ali Hajimiri , Shouhei Kousai
IPC分类号： G08B21/00 , G01R13/34
CPC分类号： G01R29/26 , G01R31/31709
摘要： A frequency/timing measurement apparatus includes a reference source having a reference source output terminal. At least one target source has a target source output terminal. The at least one target source is communicatively coupled to the reference source. A frequency timing measurement block has a first input terminal electrically coupled to the reference source output terminal. A second input terminal is electrically coupled to the target source output terminal and at least one output terminal. The frequency timing measurement block is configured to perform a noise shaping technique to reduce measurement error attributable to a phase noise that is correlated between the reference source and the target source, and to provide a reduced correlated noise measurement at the at least one output terminal. A method to reduce correlated noise is also described.
摘要翻译：频率/定时测量装置包括具有参考源输出端的参考源。至少一个目标源具有目标源输出端。至少一个目标源通信地耦合到参考源。频率定时测量块具有电耦合到参考源输出端的第一输入端。第二输入端子电耦合到目标源输出端子和至少一个输出端子。频率定时测量块被配置为执行噪声整形技术以减少归因于在参考源和目标源之间相关的相位噪声的测量误差，并且在至少一个输出端子处提供减小的相关噪声测量。还描述了一种降低相关噪声的方法。

3. 发明申请

US20100090745A1 Octave-range, watt-level, fully-integrated CMOS switching power mixer array for linearization and back-off-efficiency improvement 有权
标题翻译：八度范围，功率级，全集成CMOS开关功率混频器阵列，用于线性化和退避效率的提高
公开(公告)号：US20100090745A1
公开(公告)日：2010-04-15
申请号：US12586471
申请日：2009-09-22
申请人： Shouhei Kousai , Seyed Ali Hajimiri
发明人： Shouhei Kousai , Seyed Ali Hajimiri
IPC分类号： G06G7/12
CPC分类号： G06G7/12
摘要： Power mixer arrays for providing watt-level power in mobile systems. In one embodiment, a fully-integrated octave-range CMOS power mixer that occupies only 2.6 mm2 using a 130 nm semiconductor process has been demonstrated. The power mixer provides an output power of +31.5 dBm into an external 50 Ω load with a power added efficiency (PAE) of 44% at 1.8 GHz and a full power gain compression of only 0.4 dB.
摘要翻译：用于在移动系统中提供功率级功率的功率混频器阵列。在一个实施例中，已经证明了使用130nm半导体工艺仅占2.6mm 2的完全集成的八度范围CMOS功率混合器。功率混频器的输出功率为+31.5 dBm到外部的50Ω 负载在1.8 GHz的功率增加效率（PAE）为44％，全功率增益压缩仅为0.4 dB。

4. 发明授权

US08378732B2 Octave-range, watt-level, fully-integrated CMOS switching power mixer array for linearization and back-off-efficiency improvement 有权
标题翻译：八度范围，功率级，全集成CMOS开关功率混频器阵列，用于线性化和退避效率的提高
公开(公告)号：US08378732B2
公开(公告)日：2013-02-19
申请号：US12586471
申请日：2009-09-22
申请人： Shouhei Kousai , Seyed Ali Hajimiri
发明人： Shouhei Kousai , Seyed Ali Hajimiri
IPC分类号： G06G7/16
CPC分类号： G06G7/12
摘要： Power mixer arrays for providing watt-level power in mobile systems. In one embodiment, a fully-integrated octave-range CMOS power mixer that occupies only 2.6 mm2 using a 130 nm semiconductor process has been demonstrated. The power mixer provides an output power of +31.5 dBm into an external 50 Ω load with a power added efficiency (PAE) of 44% at 1.8 GHz and a full power gain compression of only 0.4 dB.
摘要翻译：用于在移动系统中提供功率级功率的功率混频器阵列。在一个实施例中，已经证明了使用130nm半导体工艺仅占2.6mm 2的完全集成的八度范围CMOS功率混合器。功率混频器的输出功率为+31.5 dBm到外部的50Ω 负载在1.8 GHz的功率增加效率（PAE）为44％，全功率增益压缩仅为0.4 dB。

5. 发明授权

US09117931B2 Semiconductor device with a resonator using acoustic standing wave excited in semiconductor crystal 有权
标题翻译：具有在半导体晶体中激发的声驻波的谐振器的半导体器件
公开(公告)号：US09117931B2
公开(公告)日：2015-08-25
申请号：US13685859
申请日：2012-11-27
申请人： Kazuhide Abe , Atsuko Iida , Kazuhiko Itaya , Junji Wadatsumi , Shouhei Kousai
发明人： Kazuhide Abe , Atsuko Iida , Kazuhiko Itaya , Junji Wadatsumi , Shouhei Kousai
IPC分类号： H01L29/84 , H03H9/24 , H03H9/02
CPC分类号： H01L29/84 , H01L2924/1461 , H03H9/2405 , H03H2009/02314
摘要： A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.
摘要翻译：根据实施例的半导体器件具有：半导体衬底; 形成在所述半导体衬底上的声谐振器，具有包括通过耗尽层与所述衬底电绝缘的杂质的半导体层，并且被配置为基于在所述半导体层中激发的声驻波以预定的谐振频率谐振; 温度检测器，形成在所述半导体衬底上，并被配置为检测所述半导体衬底的温度; 计算单元，其形成在所述半导体基板上，并且被配置为基于由所述温度检测器检测到的温度进行温度补偿的计算，所述杂质的种类和所述杂质的浓度; 以及控制器，其形成在所述半导体基板上，并且被配置为基于所述计算单元的计算结果来控制所述共振频率。

6. 发明授权

US08849219B2 DA converter and wireless communication apparatus 有权
标题翻译： DA转换器和无线通信装置
公开(公告)号：US08849219B2
公开(公告)日：2014-09-30
申请号：US13599413
申请日：2012-08-30
申请人： Jun Deguchi , Shouhei Kousai , Yousuke Hagiwara , Masamichi Suzuki , Atsuhiro Kinoshita , Takao Marukame
发明人： Jun Deguchi , Shouhei Kousai , Yousuke Hagiwara , Masamichi Suzuki , Atsuhiro Kinoshita , Takao Marukame
IPC分类号： H04B1/38 , H03M1/66 , H03M1/10 , H03M1/74
CPC分类号： H03M1/66 , H03M1/1061 , H03M1/745
摘要： In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n−1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.
摘要翻译：通常，根据一个实施例，配置成将包括n（n> 1）位的数字信号转换为模拟电流以从输出端输出模拟电流的DA转换器包括n个电压 - 电流转换器。它们中的每一个对应于数字信号的每个位，并且被配置为根据相应的位产生电流。第k（k是0到n-1的整数）电压 - 电流转换器包括阈值电压可调的第一晶体管。第一晶体管包括半导体衬底，第一扩散区，第二扩散区，绝缘膜，电荷累积膜和栅极。

7. 发明授权

US08836315B2 Resistance signal generating circuit with n temperature characteristic adjusting elements 有权
标题翻译：具有n个温度特性调节元件的电阻信号发生电路
公开(公告)号：US08836315B2
公开(公告)日：2014-09-16
申请号：US13423794
申请日：2012-03-19
申请人： Yuji Satoh , Shouhei Kousai , Hiroyuki Kobayashi
发明人： Yuji Satoh , Shouhei Kousai , Hiroyuki Kobayashi
IPC分类号： G05F3/16 , G05F3/20 , G05F3/30
CPC分类号： G05F3/30
摘要： According to one embodiment, a reference signal generating circuit includes a first nonlinear element that generates a first reference voltage, a second nonlinear element that generates a second reference voltage, a current controlling circuit that controls a current flowing to the first nonlinear element and a current flowing to the second nonlinear element based on an output voltage of the current controlling circuit itself, and N temperature characteristic adjusting elements (N is an integer of 2 or larger) that individually adjust the temperature characteristics of the output voltage of the current controlling circuit.
摘要翻译：根据一个实施例，参考信号发生电路包括产生第一参考电压的第一非线性元件，产生第二参考电压的第二非线性元件，控制流向第一非线性元件的电流的电流控制电路和电流基于电流控制电路本身的输出电压流动到第二非线性元件，以及分别调节电流控制电路的输出电压的温度特性的N个温度特性调整元件（N是2以上的整数）。

8. 发明授权

US08742844B2 Power amplifier device 有权
标题翻译：功率放大器装置
公开(公告)号：US08742844B2
公开(公告)日：2014-06-03
申请号：US13604370
申请日：2012-09-05
申请人： Shouhei Kousai
发明人： Shouhei Kousai
IPC分类号： H03G3/20
CPC分类号： H03F1/3247 , H03F3/195 , H03F3/245 , H03F2200/411 , H03G3/3042
摘要： A power amplifier device includes an input terminal for a RF input signal. The power amplifier device includes an output terminal a RF output signal. The power amplifier device includes a first power amplifier connected to the input terminal, amplifies the RF input signal with a first gain, and outputs a first amplified signal. The power amplifier device includes a second power amplifier that amplifies a signal on the basis of the first amplified signal and outputs a second amplified signal with a second gain. The power amplifier device includes a low-pass filter or a band-pass filter that filters the second amplified signal. The power amplifier device includes an amplitude comparator to compare the first amplitude of the first comparison signal generated from the RF input signal with the second amplitude of the second comparison signal generated from the filtered signal and to output an amplitude comparison signal.
摘要翻译：功率放大器装置包括用于RF输入信号的输入端。功率放大器装置包括输出端子，RF输出信号。功率放大器装置包括连接到输入端的第一功率放大器，以第一增益放大RF输入信号，并输出第一放大信号。功率放大器装置包括：第二功率放大器，其基于第一放大信号放大信号，并输出具有第二增益的第二放大信号。功率放大器装置包括对第二放大信号进行滤波的低通滤波器或带通滤波器。功率放大器装置包括幅度比较器，用于将从RF输入信号产生的第一比较信号的第一幅度与从滤波信号产生的第二比较信号的第二幅度进行比较，并输出幅度比较信号。

9. 发明申请

US20120142287A1 OSCILLATOR CIRCUIT, RADIO COMMUNICATION DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT 失效
标题翻译：振荡器电路，无线电通信设备和半导体集成电路
公开(公告)号：US20120142287A1
公开(公告)日：2012-06-07
申请号：US13231638
申请日：2011-09-13
申请人： Shouhei Kousai
发明人： Shouhei Kousai
IPC分类号： H03L5/00 , H04B1/40 , H03L7/00
CPC分类号： H03K3/0231
摘要： According to one embodiment, an oscillator circuit includes a first comparator circuit, a second comparator circuit, a first voltage control circuit, a second voltage control circuit, a clock generation circuit. The first comparator circuit is configured to compare a first voltage with a first threshold voltage to generate a first comparison result. The second comparator circuit is configured to compare a second voltage with a second threshold voltage to generate a second comparison result. The first voltage control circuit is configured to decrease the first voltage by a first voltage value in synchronization with timing when the first comparison result changes. The second voltage control circuit is configured to decrease the second voltage by a second voltage value in synchronization with timing when the second comparison result changes.
摘要翻译：根据一个实施例，振荡器电路包括第一比较器电路，第二比较器电路，第一电压控制电路，第二电压控制电路，时钟发生电路。第一比较器电路被配置为将第一电压与第一阈值电压进行比较以产生第一比较结果。第二比较器电路被配置为将第二电压与第二阈值电压进行比较以产生第二比较结果。第一电压控制电路被配置为与第一比较结果改变的定时同步地将第一电压降低第一电压值。第二电压控制电路被配置为与第二比较结果改变的定时同步地将第二电压降低第二电压值。

10. 发明申请

US20110235689A1 POWER AMPLIFIER AND SEMICONDUCTOR INTEGRATED CIRCUIT 失效
标题翻译：功率放大器和半导体集成电路
公开(公告)号：US20110235689A1
公开(公告)日：2011-09-29
申请号：US12886699
申请日：2010-09-21
申请人： Shouhei Kousai
发明人： Shouhei Kousai
IPC分类号： H04L5/16 , H03F3/16
CPC分类号： H04L27/2601 , H03F1/0261 , H03F3/195 , H03F3/24 , H03F3/3028 , H03F3/45183 , H03F2200/102 , H03F2200/27 , H03F2200/405 , H03F2200/451 , H03F2200/462 , H03F2200/78 , H03F2203/45366 , H03F2203/45466 , H03F2203/45644 , H03F2203/45646
摘要： In general, according to one embodiment, a power amplifier includes an envelope detector, a limiter, and a combiner. The envelope detector is configured to sense an envelope component of an input signal. The limiter includes a PMOS (Positive channel Metal Oxide Semiconductor) transistor and an NMOS (Negative channel Metal Oxide Semiconductor) transistor. The PMOS transistor is configured to sense a phase component of the input signal. The phase component has a second-order distortion controlled within a predetermined range with respect to the input signal. The NMOS transistor is configured to sense a phase component of the input signal. The phase component has the same second-order distortion as the phase component sensed by the PMOS transistor. The combiner is configured to combine the envelope component sensed by the envelope detector and the phase component sensed by the limiter to generate an output signal.
摘要翻译：通常，根据一个实施例，功率放大器包括包络检测器，限幅器和组合器。包络检测器被配置为感测输入信号的包络分量。限幅器包括PMOS（正通道金属氧化物半导体）晶体管和NMOS（负通道金属氧化物半导体）晶体管。 PMOS晶体管被配置为感测输入信号的相位分量。相位分量具有相对于输入信号控制在预定范围内的二阶失真。 NMOS晶体管被配置为感测输入信号的相位分量。相位分量具有与由PMOS晶体管感测的相位分量相同的二阶失真。组合器被配置为组合由包络检测器感测的包络分量和由限幅器感测的相位分量以产生输出信号。

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