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    • 1. 发明授权
    • Microelectromechanical accelerometer for automotive applications
    • 用于汽车应用的微机电加速度计
    • US06199874B1
    • 2001-03-13
    • US08568845
    • 1995-12-07
    • Gregory J. GalvinTimothy J. DavisNoel C. MacDonald
    • Gregory J. GalvinTimothy J. DavisNoel C. MacDonald
    • B60G1700
    • G01P15/131B81B2201/0235B81B2203/051B81C1/00619B81C2201/0132G01P1/006G01P15/0802G01P15/125G01P2015/0814G01P2015/0817
    • A micromechanical capacitive accelerometer is provided from a single silicon wafer. The basic structure of the micromechanical accelerometer is etched in the wafer to form a released portion in the substrate, and the released and remaining portions of the substrate are coated with metal under conditions sufficient to form a micromechanical capacitive accelerometer. The substrate is preferably etched using reactive-ion etching for at least the first etch step in the process that forms the basic structure, although in another preferred embodiment, all etching is reactive-ion etching. The accelerometer also may comprise a signal-conditioned accelerometer wherein signal-conditioning circuitry is provided on the same wafer from which the accelerometer is formed, and VLSI electronics may be integrated on the same wafer from which the accelerometer is formed. The micromechanical capacitive accelerometer can be used for airbag deployment, active suspension control, active steering control, anti-lock braking, and other control systems requiring accelerometers having high sensitivity, extreme accuracy and resistance to out of plane forces.
    • 从单个硅晶片提供微机电电容式加速度计。 在晶片中蚀刻微机械加速度计的基本结构,以在衬底中形成释放部分,并且在足以形成微机械电容式加速度计的条件下,用金属涂覆衬底的释放和剩余部分。 在形成基本结构的工艺中,优选使用反应离子蚀刻对至少第一蚀刻步骤蚀刻衬底,尽管在另一优选实施例中,所有蚀刻都是反应离子蚀刻。 加速度计还可以包括信号调节加速度计,其中信号调节电路设置在与其形成加速度计的同一晶片上,并且VLSI电子器件可以集成在形成加速度计的相同晶片上。 微机电容加速度计可用于安全气囊部署,主动悬架控制,主动转向控制,防抱死制动以及需要具有高灵敏度,极高精度和抗平面外力的加速度计的其他控制系统。
    • 2. 发明授权
    • Micromechanical accelerometer for automotive applications
    • 用于汽车应用的微机械加速度计
    • US06149190A
    • 2000-11-21
    • US030641
    • 1998-04-03
    • Gregory J. GalvinTimothy J. DavisNoel C. MacDonald
    • Gregory J. GalvinTimothy J. DavisNoel C. MacDonald
    • B81B3/00B81C1/00B81C99/00G01P1/00G01P15/08G01P15/125G01P15/13B60R21/32G01P15/25
    • G01P15/131B81C1/00619G01P1/006G01P15/0802G01P15/125B81B2201/0235B81B2203/051B81C2201/0132G01P2015/0814
    • A micromechanical capacitive accelerometer is provided from a single silicon wafer. The basic structure of the micromechanical accelerometer is etched in the wafer to form a released portion in the substrate, and the released and remaining portions of the substrate are coated with metal under conditions sufficient to form a micromechanical capacitive accelerometer. The substrate is preferably etched using reactive-ion etching for at least the first etch step in the process that forms the basic structure, although in another preferred embodiment, all etching is reactive-ion etching. The accelerometer also may comprise a signal-conditioned accelerometer wherein signal-conditioning circuitry is provided on the same wafer from which the accelerometer is formed, and VLSI electronics may be integrated on the same wafer from which the accelerometer is formed. The micromechanical capacitive accelerometer can be used for airbag deployment, active suspension control, active steering control, anti-lock braking, and other control systems requiring accelerometers having high sensitivity, extreme accuracy and resistance to out of plane forces.
    • 从单个硅晶片提供微机电电容式加速度计。 在晶片中蚀刻微机械加速度计的基本结构,以在衬底中形成释放部分,并且在足以形成微机械电容式加速度计的条件下,用金属涂覆衬底的释放和剩余部分。 在形成基本结构的工艺中,优选使用反应离子蚀刻对至少第一蚀刻步骤蚀刻衬底,尽管在另一优选实施例中,所有蚀刻都是反应离子蚀刻。 加速度计还可以包括信号调节加速度计,其中信号调节电路设置在与其形成加速度计的同一晶片上,并且VLSI电子器件可以集成在形成加速度计的相同晶片上。 微机电容加速度计可用于安全气囊部署,主动悬架控制,主动转向控制,防抱死制动以及需要具有高灵敏度,极高精度和抗平面外力的加速度计的其他控制系统。
    • 4. 发明授权
    • Methods of fabricating MEMS and microfluidic devices using latent masking technique
    • 使用潜屏蔽技术制造MEMS和微流体器件的方法
    • US06780336B2
    • 2004-08-24
    • US10004463
    • 2001-11-02
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • B81C100
    • B05B5/00H01J49/0018H01J49/167Y10S438/942
    • Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes. The fourth aspect provides a process sequence that incorporates all three fundamental aspects to fabricate an integrated liquid chromatography (LC)/electrospray ionization (ESI) device. The fifth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an ESI device. The sixth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an LC device. The process improvements described provide increased manufacturing yield and design latitude in comparison to previously disclosed methods of fabrication.
    • 公开了本发明的三个基本和三个派生方面。 三个基本方面各自公开了可以整合到完整过程中的过程序列。 第一方面,被指定为“潜屏蔽”,定义了在固定材料(例如氧化硅)中的掩模,该掩模在定义之后被保持为静止,而执行中间处理操作。 然后将潜在氧化物图案用于掩模蚀刻。 指定为“同时多级蚀刻(SMILE)”的第二方面提供了一种处理顺序,其中在蚀刻到下面的材料中第一图案可相对于第二图案被赋予高级开始,使得第一图案可以是 蚀刻成更深,更浅或与第二图案相同的深度。 指定为“延迟LOCOS”的第三方面提供了在过程的一个阶段定义接触孔图案的方法,然后在稍后阶段使用限定的图案来打开接触孔。 第四方面提供了一个整合三个基本方面来制造液相色谱(LC)/电喷雾离子化(ESI)装置的方法。 第五方面提供了一种结合两个基本方面来制造ESI装置的过程序列。 第六方面提供了一种结合两个基本方面来制造LC器件的过程序列。 与先前公开的制造方法相比,所描述的工艺改进提供了增加的制造产量和设计自由度。
    • 5. 发明授权
    • Method for fabricating ESI device using smile and delayed LOCOS techniques
    • 使用微笑和延迟LOCOS技术制造ESI器件的方法
    • US06706200B2
    • 2004-03-16
    • US10004300
    • 2001-11-02
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • B81B702
    • B05B5/00H01J49/0018H01J49/167Y10S438/942
    • Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes. The fourth aspect provides a process sequence that incorporates all three fundamental aspects to fabricate an integrated liquid chromatography (LC)/electrospray ionization (ESI) device. The fifth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an ESI device. The sixth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an LC device. The process improvements described provide increased manufacturing yield and design latitude in comparison to previously disclosed methods of fabrication.
    • 公开了本发明的三个基本和三个派生方面。 三个基本方面各自公开了可以整合到完整过程中的过程序列。 第一方面,被指定为“潜屏蔽”,定义了在固定材料(例如氧化硅)中的掩模,该掩模在定义之后被保持为静止,而执行中间处理操作。 然后将潜在氧化物图案用于掩模蚀刻。 指定为“同时多级蚀刻(SMILE)”的第二方面提供了一种处理顺序,其中在蚀刻到下面的材料中第一图案可相对于第二图案被赋予高级开始,使得第一图案可以是 蚀刻成更深,更浅或与第二图案相同的深度。 指定为“延迟LOCOS”的第三方面提供了在过程的一个阶段定义接触孔图案的方法,然后在稍后阶段使用限定的图案来打开接触孔。 第四方面提供了一个整合三个基本方面来制造液相色谱(LC)/电喷雾离子化(ESI)装置的方法。 第五方面提供了一种结合两个基本方面来制造ESI装置的过程序列。 第六方面提供了一种结合两个基本方面来制造LC器件的过程序列。 与先前公开的制造方法相比,所描述的工艺改进提供了增加的制造产量和设计自由度。
    • 6. 发明授权
    • Method for fabricating LC device using latent masking and delayed LOCOS techniques
    • 使用潜屏蔽和延迟LOCOS技术制造LC器件的方法
    • US06702950B2
    • 2004-03-09
    • US10004299
    • 2001-11-02
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • B81C100
    • B05B5/00H01J49/0018H01J49/167Y10S438/942
    • Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes. The fourth aspect provides a process sequence that incorporates all three fundamental aspects to fabricate an integrated liquid chromatography (LC)/electrospray ionization (ESI) device. The fifth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an ESI device. The sixth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an LC device. The process improvements described provide increased manufacturing yield and design latitude in comparison to previously disclosed methods of fabrication.
    • 公开了本发明的三个基本和三个派生方面。 三个基本方面各自公开了可以整合到完整过程中的过程序列。 第一方面,被指定为“潜屏蔽”,定义了在固定材料(例如氧化硅)中的掩模,该掩模在定义之后被保持为静止,而执行中间处理操作。 然后将潜在氧化物图案用于掩模蚀刻。 指定为“同时多级蚀刻(SMILE)”的第二方面提供了一种处理顺序,其中在蚀刻到下面的材料中第一图案可相对于第二图案被赋予高级开始,使得第一图案可以是 蚀刻成更深,更浅或与第二图案相同的深度。 指定为“延迟LOCOS”的第三方面提供了在过程的一个阶段定义接触孔图案的方法,然后在稍后阶段使用限定的图案来打开接触孔。 第四方面提供了一个整合三个基本方面来制造液相色谱(LC)/电喷雾离子化(ESI)装置的方法。 第五方面提供了一种结合两个基本方面来制造ESI装置的过程序列。 第六方面提供了一种结合两个基本方面来制造LC器件的过程序列。 与先前公开的制造方法相比,所描述的工艺改进提供了增加的制造产量和设计自由度。
    • 8. 发明授权
    • Method for fabricating ESI device using smile and delayed LOCOS techniques
    • 使用微笑和延迟LOCOS技术制造ESI器件的方法
    • US06969470B2
    • 2005-11-29
    • US10692457
    • 2003-10-23
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • G01N37/00B01D15/08B05B5/00B81B1/00B81C1/00H01L21/302H01L21/3065B81B7/02
    • B05B5/00H01J49/0018H01J49/167Y10S438/942
    • Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes. The fourth aspect provides a process sequence that incorporates all three fundamental aspects to fabricate an integrated liquid chromatography (LC)/electrrospray ionization (ESI) device. The fifth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an ESI device. The sixth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an LC device. The process improvements described provide increased manufacturing yield and design latitude in comparison to previously disclosed methods of fabrication.
    • 公开了本发明的三个基本和三个派生方面。 三个基本方面各自公开了可以整合到完整过程中的过程序列。 第一方面,被指定为“潜屏蔽”,定义了在固定材料(例如氧化硅)中的掩模,该掩模在定义之后被保持为静止,而执行中间处理操作。 然后将潜在氧化物图案用于掩模蚀刻。 指定为“同时多级蚀刻(SMILE)”的第二方面提供了一种处理顺序,其中在蚀刻到下面的材料中第一图案可相对于第二图案被赋予高级开始,使得第一图案可以是 蚀刻成更深,更浅或与第二图案相同的深度。 指定为“延迟LOCOS”的第三方面提供了在过程的一个阶段定义接触孔图案的方法,然后在稍后阶段使用限定的图案来打开接触孔。 第四方面提供了一个整合液相色谱(LC)/电喷雾离子化(ESI)装置的所有三个基本方面的过程序列。 第五方面提供了一种结合两个基本方面来制造ESI装置的过程序列。 第六方面提供了一种结合两个基本方面来制造LC器件的过程序列。 与先前公开的制造方法相比,所描述的工艺改进提供了增加的制造产量和设计自由度。
    • 10. 发明授权
    • Method of fabricating integrated LC/ESI device using smile, latent masking, and delayed locos techniques.
    • 使用微笑,潜屏蔽和延迟定位技术制造集成LC / ESI器件的方法。
    • US06673253B2
    • 2004-01-06
    • US10004493
    • 2001-11-02
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • James E. MoonTimothy J. DavisGregory J. GalvinKevin A. ShawPaul C. WaldropSharlene A. Wilson
    • B81B702
    • B05B5/00H01J49/0018H01J49/167Y10S438/942
    • Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes. The fourth aspect provides a process sequence that incorporates all three fundamental aspects to fabricate an integrated liquid chromatography (LC)/electrospray ionization (ESI) device. The fifth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an ESI device. The sixth aspect provides a process sequence that incorporates two of the fundamental aspects to fabricate an LC device. The process improvements described provide increased manufacturing yield and design latitude in comparison to previously disclosed methods of fabrication.
    • 公开了本发明的三个基本和三个派生方面。 三个基本方面各自公开了可以整合到完整过程中的过程序列。 第一方面,被指定为“潜屏蔽”,定义了在固定材料(例如氧化硅)中的掩模,该掩模在定义之后被保持为静止,而执行中间处理操作。 然后将潜在氧化物图案用于掩模蚀刻。 指定为“同时多级蚀刻(SMILE)”的第二方面提供了一种处理顺序,其中在蚀刻到下面的材料中第一图案可相对于第二图案被赋予高级开始,使得第一图案可以是 蚀刻成更深,更浅或与第二图案相同的深度。 指定为“延迟LOCOS”的第三方面提供了在过程的一个阶段定义接触孔图案的方法,然后在稍后阶段使用限定的图案来打开接触孔。 第四方面提供了一个整合三个基本方面来制造液相色谱(LC)/电喷雾离子化(ESI)装置的方法。 第五方面提供了一种结合两个基本方面来制造ESI装置的过程序列。 第六方面提供了一种结合两个基本方面来制造LC器件的过程序列。 与先前公开的制造方法相比,所描述的工艺改进提供了增加的制造产量和设计自由度。