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1. 发明授权

US07705416B2 Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material 有权
标题翻译：在单晶半导体材料的晶片中形成水平埋入通道或空腔的方法
公开(公告)号：US07705416B2
公开(公告)日：2010-04-27
申请号：US10667113
申请日：2003-09-18
申请人： Gabriele Barlocchi , Flavio Villa
发明人： Gabriele Barlocchi , Flavio Villa
IPC分类号： H01L29/00
CPC分类号： H01L21/2007 , H01L21/30608 , H01L21/3086 , H01L21/76251 , H01L21/76262 , H01L21/764
摘要： A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.
摘要翻译：在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。因此，腔体被单晶材料完全包围。从该晶片开始，可以形成薄膜。原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

2. 发明申请

US20070252224A1 Integrated Chemical Microreactor With Large Area Channels and Manufacturing Process Thereof 有权
标题翻译：具有大面积通道的综合化学微反应器及其制造工艺
公开(公告)号：US20070252224A1
公开(公告)日：2007-11-01
申请号：US11743062
申请日：2007-05-01
申请人： Gabriele Barlocchi , Ubaldo Mastromatteo , Flavio Villa
发明人： Gabriele Barlocchi , Ubaldo Mastromatteo , Flavio Villa
IPC分类号： H01L29/00 , H01L21/00
CPC分类号： B01J19/0093 , B01J2219/00783 , B01J2219/00828 , Y10T436/114998
摘要： The microreactor has a body of semiconductor material; a large area buried channel extending in the body and having walls; a coating layer of insulating material coating the walls of the channel; a diaphragm extending on top of the body and upwardly closing the channel. The diaphragm is formed by a semiconductor layer completely encircling mask portions of insulating material.
摘要翻译：微反应器具有半导体材料体; 一个大面积的埋藏通道延伸到身体并具有墙壁; 覆盖通道壁的绝缘材料的涂层; 一个在主体顶部延伸并向上封闭通道的隔膜。隔膜由完全环绕绝缘材料的掩模部分的半导体层形成。

3. 发明授权

US07071073B2 Process for manufacturing low-cost and high-quality SOI substrates 有权
公开(公告)号：US07071073B2
公开(公告)日：2006-07-04
申请号：US10331189
申请日：2002-12-26
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/76
CPC分类号： H01L21/76262 , H01L21/31662 , H01L21/76208
摘要： For manufacturing an SOI substrate, the following steps are carried out: providing a wafer of semiconductor material; forming, inside the wafer, a plurality of passages forming a labyrinthine cavity and laterally delimiting a plurality of pillars of semiconductor material; and oxidizing the pillars of semiconductor material to form a buried insulating layer. For forming the labyrinthine cavity, a trench is first formed in a substrate; an epitaxial layer is grown, which closes the trench at the top; the wafer is annealed so as to deform the pillars and cause them to assume a minimum-energy handlebar-like shape, and a peripheral portion of the wafer is removed to reach the labyrinthine cavity, and side inlet openings are formed in the labyrinthine cavity. Oxidation is performed by feeding an oxidizing fluid through the side inlet openings.

4. 发明授权

US07009154B2 Process for manufacturing integrated chemical microreactors of semiconductor material 有权
公开(公告)号：US07009154B2
公开(公告)日：2006-03-07
申请号：US10784509
申请日：2004-02-23
申请人： Flavio Villa , Ubaldo Mastromatteo , Gabriele Barlocchi , Mauro Cattaneo
发明人： Flavio Villa , Ubaldo Mastromatteo , Gabriele Barlocchi , Mauro Cattaneo
IPC分类号： C12M1/34 , G01N33/487 , H05B3/02
CPC分类号： B81C1/00119 , B01J19/0093 , B01L3/5027 , B01L3/502707 , B01L7/52 , B01L7/525 , B01L2200/12 , B01L2300/0645 , B01L2300/1827 , B01L2300/185 , B01L2300/1883 , B81B2201/0214 , B81B2201/051 , B81B2203/0315 , B81B2203/0338 , B81C2201/053
摘要： The microreactor is completely integrated and is formed by a semiconductor body having a surface and housing at least one buried channel accessible from the surface of the semiconductor body through two trenches. A heating element extends above the surface over the channel and a resist region extends above the heating element and defines an inlet reservoir and an outlet reservoir. The reservoirs are connected to the trenches and have, in cross-section, a larger area than the trenches. The outlet reservoir has a larger area than the inlet reservoir. A sensing electrode extends above the surface and inside the outlet reservoir.

5. 发明授权

US06710311B2 Process for manufacturing integrated chemical microreactors of semiconductor material 有权
公开(公告)号：US06710311B2
公开(公告)日：2004-03-23
申请号：US09874382
申请日：2001-06-04
申请人： Flavio Villa , Ubaldo Mastromatteo , Gabriele Barlocchi , Mauro Cattaneo
发明人： Flavio Villa , Ubaldo Mastromatteo , Gabriele Barlocchi , Mauro Cattaneo
IPC分类号： C12M134
CPC分类号： B81C1/00119 , B01J19/0093 , B01L3/5027 , B01L3/502707 , B01L7/52 , B01L7/525 , B01L2200/12 , B01L2300/0645 , B01L2300/1827 , B01L2300/185 , B01L2300/1883 , B81B2201/0214 , B81B2201/051 , B81B2203/0315 , B81B2203/0338 , B81C2201/053
摘要： The microreactor is completely integrated and is formed by a semiconductor body having a surface and housing at least one buried channel accessible from the surface of the semiconductor body through two trenches. A heating element extends above the surface over the channel and a resist region extends above the heating element and defines an inlet reservoir and an outlet reservoir. The reservoirs are connected to the trenches and have, in cross-section, a larger area than the trenches. The outlet reservoir has a larger area than the inlet reservoir. A sensing electrode extends above the surface and inside the outlet reservoir.

6. 发明授权

US06362070B1 Process for manufacturing a SOI wafer with buried oxide regions without cusps 失效
标题翻译：用于制造具有埋藏氧化物区域的SOI晶片的方法，而不具有尖端
公开(公告)号：US06362070B1
公开(公告)日：2002-03-26
申请号：US09558934
申请日：2000-04-26
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L2176
CPC分类号： H01L21/02238 , H01L21/02299 , H01L21/31662 , H01L21/32 , H01L21/76208 , H01L21/76248
摘要： A process for manufacturing a SOI wafer with buried oxide regions without cusps that includes forming, in a wafer of monocrystalline semiconductor material, trenches extending between, and delimiting laterally, protruding regions; forming masking regions, implanted with nitrogen ions, the masking regions surrounding completely the tips of the protruding regions; and forming retarding regions on the bottom of the trenches, wherein nitrogen is implanted at a lower dose than the masking regions. A thermal oxidation is then carried out and starts at the bottom portion of the protruding regions and then proceeds downwards; thereby, a continuous region of buried oxide is formed and is overlaid by non-oxidized regions corresponding to the tips of the protruding regions and forming nucleus regions for a subsequent epitaxial growth. The masking regions and the retarding regions are formed through two successive implants, including an angle implant, wherein the protruding regions shield the bottom portions of the adjacent protruding regions, as well as the bottom of the trenches, and a vertical implant is made perpendicularly to the wafer.
摘要翻译：一种用于制造具有埋藏氧化物区域而没有尖端的SOI晶片的方法，包括在单晶半导体材料的晶片中形成在横向延伸并限定突出区域的沟槽; 形成掩蔽区域，注入氮离子，掩蔽区域完全围绕突出区域的尖端; 以及在沟槽的底部形成延迟区域，其中以比掩蔽区域低的剂量注入氮。然后进行热氧化，并从突出区域的底部开始，然后向下移动; 由此，形成了埋入氧化物的连续区域，并且由对应于突出区域的尖端的非氧化区域覆盖并形成用于随后的外延生长的核区域。掩模区域和延迟区域通过两个连续的植入物形成，包括角度注入，其中突出区域屏蔽相邻突出区域的底部以及沟槽的底部，垂直植入物垂直于晶圆。

7. 发明授权

US06350657B1 Inexpensive method of manufacturing an SOI wafer 有权
标题翻译：制造SOI晶片的廉价方法
公开(公告)号：US06350657B1
公开(公告)日：2002-02-26
申请号：US09359870
申请日：1999-07-26
申请人： Ubaldo Mastromatteo , Flavio Villa , Gabriele Barlocchi
发明人： Ubaldo Mastromatteo , Flavio Villa , Gabriele Barlocchi
IPC分类号： H01L21311
CPC分类号： H01L21/3065 , H01L21/7624 , H01L21/76262
摘要： A method of manufacturing an SOI (silicon on insulator) wafer includes the step of selective anisotropic etching to form, in the substrate, trenches which extend to a predetermined depth from a major surface of the substrate and between which pillar portions of the substrate are defined. The method further includes the step of selective isotropic etching to enlarge the trenches, starting at a predetermined distance from the major surface, thus reducing the thicknesses of the pillar portions of the substrate between adjacent trenches. Also, the method includes the steps of selective oxidation to convert the pillar portions of reduced thickness of the substrate into silicon dioxide and to fill the trenches with silicon dioxide, starting substantially from the predetermined distance, and epitaxial growth of a silicon layer on the major surface of the substrate. The method permits more freedom in the selection of the dimensional ratios between the trenches and the pillars and thus enables the necessary crystallographic quality of the epitaxial layer to be achieved, ensuring a continuous buried oxide layer.
摘要翻译：制造SOI（绝缘体上硅）晶片的方法包括选择性各向异性蚀刻的步骤，以在衬底中形成从衬底的主表面延伸到预定深度并且在衬底的哪个柱部分被限定的沟槽之间。该方法还包括选择性各向同性蚀刻步骤，以从主表面预定距离开始扩大沟槽，从而减小相邻沟槽之间的衬底的柱部分的厚度。此外，该方法包括以下步骤：选择性氧化以将衬底的厚度的柱部分转换为二氧化硅，并且以基本上从预定距离开始的二氧化硅填充沟槽，以及主层上的硅层的外延生长基板的表面。该方法允许在选择沟槽和柱之间的尺寸比例时更多的自由度，并且因此能够实现外延层的必要的晶体学质量，确保连续的掩埋氧化物层。

8. 发明授权

US08334188B2 Process for manufacturing a wafer by annealing of buried channels 有权
标题翻译：掩埋通道退火制造晶圆的工艺
公开(公告)号：US08334188B2
公开(公告)日：2012-12-18
申请号：US12791553
申请日：2010-06-01
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/76
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

9. 发明申请

US20080036030A1 Process for manufacturing a wafer by annealing of buried channels 有权
标题翻译：掩埋通道退火制造晶圆的工艺
公开(公告)号：US20080036030A1
公开(公告)日：2008-02-14
申请号：US11904745
申请日：2007-09-28
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L29/00 , H01L21/764
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

10. 发明申请

US20070126071A1 Process for manufacturing thick suspended structures of semiconductor material 有权
标题翻译：用于制造半导体材料的厚悬浮结构的方法
公开(公告)号：US20070126071A1
公开(公告)日：2007-06-07
申请号：US11541376
申请日：2006-09-27
申请人： Pietro Corona , Flavio Villa , Gabriele Barlocchi
发明人： Pietro Corona , Flavio Villa , Gabriele Barlocchi
IPC分类号： H01L29/84 , H01L21/00
CPC分类号： B81C1/00158 , B81B2201/025 , B81B2203/0109 , B81B2203/0315
摘要： A process for manufacturing a suspended structure of semiconductor material envisages the steps of: providing a monolithic body of semiconductor material having a front face; forming a buried cavity within the monolithic body, extending at a distance from the front face and delimiting, with the front face, a surface region of the monolithic body, said surface region having a first thickness; carrying out a thickening thermal treatment such as to cause a migration of semiconductor material of the monolithic body towards the surface region and thus form a suspended structure above the buried cavity, the suspended structure having a second thickness greater than the first thickness. The thickening thermal treatment is an annealing treatment.
摘要翻译：制造半导体材料的悬浮结构的方法设想的步骤：提供具有正面的半导体材料的整体; 在所述整体式主体内形成掩埋空腔，所述掩埋腔在所述前表面的一定距离处延伸并且与所述前表面一起界定所述整体式主体的表面区域，所述表面区域具有第一厚度; 进行增稠热处理，使得整体式体的半导体材料朝向表面区域移动，从而在掩埋空腔之上形成悬浮结构，该悬浮结构的第二厚度大于第一厚度。增稠热处理是退火处理。

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