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    • 1. 发明授权
    • Wafer fabrication system providing measurement data screening
    • 晶圆制造系统提供测量数据筛选
    • US06446022B1
    • 2002-09-03
    • US09252402
    • 1999-02-18
    • Elfido Coss, Jr.Brian K. CussonMike Simpson
    • Elfido Coss, Jr.Brian K. CussonMike Simpson
    • G01N3700
    • G05B19/41875G05B2219/32191G05B2219/35489Y02P90/18Y02P90/20Y02P90/22
    • A wafer fabrication system is presented including a measurement system which screens measurement data prior to dissemination. The measurement system may include an equipment interface computer coupled between a measurement tool and a work-in-process (WIP) server. The measurement tool may perform one of possibly several measurement procedures (i.e., “recipes”) upon one or more semiconductor wafers processed as a lot, thereby producing measurement data. The WIP server may select the measurement recipe and store the measurement data. The equipment interface computer may receive the measurement data produced by the measurement tool and compare the measurement data to a predetermined range of acceptable values in order to determine if the measurement data is within the range of acceptable values. The equipment interface computer may display the measurement data upon a display device such that any portion of the measurement data not within the range of acceptable values is visually flagged (e.g., displayed in flashing type, in bold type, in a color which differs from surrounding text, with a background color which differs from surrounding text, etc.). The equipment interface computer may allow an operator to modify the measurement data, then generate a signal indicating acceptance of the measurement data. Upon receiving the signal indicating acceptance, the equipment interface computer may provide the measurement data to the WIP server. The equipment interface computer may also respond to the acceptance signal by providing the measurement data to an entity server and/or a statistical process control (SPC) server.
    • 提出了一种晶片制造系统,其包括在传播之前屏蔽测量数据的测量系统。 测量系统可以包括耦合在测量工具和在制品(WIP)服务器之间的设备接口计算机。 测量工具可以在一批或多个经批处理的半导体晶片上执行可能的几个测量过程(即“配方”)之一,由此产生测量数据。 WIP服务器可以选择测量配方并存储测量数据。 设备接口计算机可以接收由测量工具产生的测量数据,并将测量数据与可接受值的预定范围进行比较,以便确定测量数据是否在可接受值的范围内。 设备接口计算机可以在显示设备上显示测量数据,使得不在可接受值范围内的测量数据的任何部分被视觉标记(例如,以闪烁类型,粗体显示,颜色不同于周围的颜色 文字,背景颜色不同于周围文字等)。 设备接口计算机可以允许操作者修改测量数据,然后产生指示接收测量数据的信号。 在接收到指示接受的信号时,设备接口计算机可以向WIP服务器提供测量数据。 设备接口计算机还可以通过向实体服务器和/或统计过程控制(SPC)服务器提供测量数据来响应接受信号。
    • 3. 发明授权
    • Identifying a cause of a fault based on a process controller output
    • 根据过程控制器输出识别出故障的原因
    • US06778873B1
    • 2004-08-17
    • US10210640
    • 2002-07-31
    • Jin WangElfido Coss, Jr.Brian K. CussonAlexander J. PasadynMichael L. MillerNaomi M. JenkinsChristopher A. Bode
    • Jin WangElfido Coss, Jr.Brian K. CussonAlexander J. PasadynMichael L. MillerNaomi M. JenkinsChristopher A. Bode
    • G06F1900
    • G05B19/4184G05B23/0281G05B2219/31357G05B2219/31363G05B2219/32201Y02P90/14Y02P90/22
    • A method and apparatus is provided for identifying a cause of a fault based on controller output. The method comprises processing at least one workpiece under a direction of the controller and detecting a fault associated with the processing of the at least one workpiece. The method further includes determining a plurality of possible causes of the detected fault, identifying a more likely possible cause out of the plurality of possible causes, providing fault information associated with the identified more likely possible cause to the controller. The method further includes providing fault information associated with the identified more likely possible cause to the controller. The method further comprises adjusting the processing of one or more workpieces to be processed next based on the fault information provided to the controller. The method further includes generating prediction data associated with processing of the next workpieces, and comparing the prediction data to processing data associated with the processing of the next workpieces to identify a possible cause of the fault.
    • 提供了一种基于控制器输出来识别故障原因的方法和装置。 该方法包括在控制器的方向上处理至少一个工件,并检测与至少一个工件的处理相关的故障。 该方法还包括确定检测到的故障的多个可能的原因,从多个可能的原因中识别更可能的可能原因,将与所识别的更可能的可能原因相关联的故障信息提供给控制器。 该方法还包括向控制器提供与所识别的更可能的可能原因相关联的故障信息。 该方法还包括基于提供给控制器的故障信息来调整接下来要处理的一个或多个待处理工件的处理。 该方法还包括生成与下一个工件的处理相关联的预测数据,以及将预测数据与与下一个工件的处理相关联的处理数据进行比较,以识别故障的可能原因。
    • 8. 发明授权
    • Advanced process control of the manufacture of an oxide-nitride-oxide stack of a memory device, and system for accomplishing same
    • 存储器件的氧化物 - 氮化物 - 氧化物堆叠的制造的先进工艺控制和用于实现其的系统
    • US06953697B1
    • 2005-10-11
    • US10277357
    • 2002-10-22
    • Howard E. CastleRobert J. ChongBrian K. CussonEric O. Green
    • Howard E. CastleRobert J. ChongBrian K. CussonEric O. Green
    • H01L21/66H01L21/8247
    • H01L22/12Y10S438/954
    • The present invention is generally directed to an advanced process control of the manufacture of memory devices, and a system for accomplishing same. In one illustrative embodiment, the method comprises performing at least one process operation to form at least one layer of an oxide-nitride-oxide stack of a memory cell, the stack being comprised of a first layer of oxide positioned above a first layer of polysilicon, a layer of silicon nitride positioned above the first layer of oxide, and a second layer of oxide positioned above the layer of silicon nitride. The method further comprises measuring at least one characteristic of at least one of the first layer of polysilicon, the first oxide layer, the layer of silicon nitride, and the second layer of oxide and adjusting at least one parameter of at least one process operation used to form at least one of the first oxide layer, the layer of silicon nitride and the second oxide layer if the measured at least one characteristic is not within acceptable limits.
    • 本发明一般涉及存储器件的制造的高级过程控制和用于实现其的系统。 在一个说明性实施例中,该方法包括执行至少一个处理操作以形成存储器单元的氧化物 - 氮化物 - 氧化物堆叠的至少一层,所述堆叠由位于第一多晶硅层之上的第一层氧化物 位于第一氧化物层之上的氮化硅层和位于氮化硅层上方的第二层氧化物。 该方法还包括测量第一多晶硅层,第一氧化物层,氮化硅层和第二氧化物层中的至少一个的至少一个特征,并且调整使用的至少一个工艺操作的至少一个参数 如果所测量的至少一个特性不在可接受的限度内,则形成第一氧化物层,氮化硅层和第二氧化物层中的至少一个。
    • 9. 发明授权
    • Method of controlling wafer charging effects due to manufacturing processes
    • 控制由于制造工艺造成的晶片充电效应的方法
    • US06800562B1
    • 2004-10-05
    • US10382139
    • 2003-03-05
    • Brian K. CussonThomas J. Sonderman
    • Brian K. CussonThomas J. Sonderman
    • H01L21461
    • H01L22/20
    • The present invention is generally directed to various methods of controlling wafer charging effects due to manufacturing processes, and a system for performing same. In one illustrative embodiment, the method comprises identifying a process metric associated with a process operation that is capable of generating a charge that is stored in at least one of a process layer and a feature formed above a substrate. In other embodiments, the method involves establishing a metric for a plasma-based process operation. The methods include establishing an allowable range for the process metric based upon data obtained from at least one electrical test performed on at least one semiconductor device subjected to the process operation, performing the process operation and indicating an alarm condition if the process metric associated with the process operation is not within the allowable range.
    • 本发明一般涉及由于制造过程而控制晶片充电效果的各种方法,以及用于执行它们的系统。 在一个说明性实施例中,该方法包括识别与能够产生存储在处理层和形成于衬底上的特征中的至少一个中的电荷的过程操作相关联的过程度量。 在其他实施例中,该方法包括建立基于等离子体的处理操作的度量。 所述方法包括基于从至少一个进行过程操作的半导体器件执行的至少一个电气测试获得的数据来建立过程度量的允许范围,执行处理操作并指示报警条件,如果与 过程操作不在允许的范围内。