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1. 发明授权

US08877591B2 Methods of manufacturing vertical structure nonvolatile memory devices 有权
标题翻译：制造垂直结构非易失性存储器件的方法
公开(公告)号：US08877591B2
公开(公告)日：2014-11-04
申请号：US14092191
申请日：2013-11-27
申请人： Byeong-in Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
发明人： Byeong-in Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
IPC分类号： H01L21/336 , H01L29/78 , G11C16/04 , H01L29/66 , H01L29/792 , H01L27/115 , H01L29/788
CPC分类号： H01L29/66666 , G11C16/0466 , G11C16/0483 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/66833 , H01L29/7827 , H01L29/7889 , H01L29/7926
摘要： A vertical structure nonvolatile memory device can include a channel layer that extends in a vertical direction on a substrate. A memory cell string includes a plurality of transistors that are disposed on the substrate in the vertical direction along a vertical sidewall of the channel layer. At least one of the plurality of transistors includes at least one recess in a gate of the transistor into which at least one protrusion, which includes the channel layer, extends.
摘要翻译：垂直结构的非易失性存储器件可以包括在衬底上沿垂直方向延伸的沟道层。存储单元串包括沿着沟道层的垂直侧壁在垂直方向上设置在基板上的多个晶体管。多个晶体管中的至少一个晶体管包括在晶体管的栅极中的至少一个凹部，至少一个包括沟道层的突起延伸到该凹槽中。

2. 发明申请

US20130301350A1 Vertical Structure Nonvolatile Memory Device 审中-公开
标题翻译：垂直结构非易失性存储器件
公开(公告)号：US20130301350A1
公开(公告)日：2013-11-14
申请号：US13939912
申请日：2013-07-11
申请人： Byeong-In Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
发明人： Byeong-In Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
IPC分类号： H01L29/78 , G11C16/04
CPC分类号： H01L29/66666 , G11C16/0466 , G11C16/0483 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/66833 , H01L29/7827 , H01L29/7889 , H01L29/7926
摘要： A vertical structure nonvolatile memory device can include a channel layer that extends in a vertical direction on a substrate. A memory cell string includes a plurality of transistors that are disposed on the substrate in the vertical direction along a vertical sidewall of the channel layer. At least one of the plurality of transistors includes at least one recess in a gate of the transistor into which at least one protrusion, which includes the channel layer, extends.
摘要翻译：垂直结构的非易失性存储器件可以包括在衬底上沿垂直方向延伸的沟道层。存储单元串包括沿着沟道层的垂直侧壁在垂直方向上设置在基板上的多个晶体管。多个晶体管中的至少一个晶体管包括在晶体管的栅极中的至少一个凹部，至少一个包括沟道层的突起延伸到该凹槽中。

3. 发明授权

US08513729B2 Vertical structure nonvolatile memory devices 有权
标题翻译：垂直结构非易失性存储器件
公开(公告)号：US08513729B2
公开(公告)日：2013-08-20
申请号：US13152684
申请日：2011-06-03
申请人： Byeong-in Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
发明人： Byeong-in Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
IPC分类号： H01L29/792 , H01L29/78
CPC分类号： H01L29/66666 , G11C16/0466 , G11C16/0483 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/66833 , H01L29/7827 , H01L29/7889 , H01L29/7926
摘要： A vertical structure nonvolatile memory device can include a channel layer that extends in a vertical direction on a substrate. A memory cell string includes a plurality of transistors that are disposed on the substrate in the vertical direction along a vertical sidewall of the channel layer. At least one of the plurality of transistors includes at least one recess in a gate of the transistor into which at least one protrusion, which includes the channel layer, extends.
摘要翻译：垂直结构的非易失性存储器件可以包括在衬底上沿垂直方向延伸的沟道层。存储单元串包括沿着沟道层的垂直侧壁在垂直方向上设置在基板上的多个晶体管。多个晶体管中的至少一个晶体管包括在晶体管的栅极中的至少一个凹部，至少一个包括沟道层的突起延伸到该凹槽中。

4. 发明申请

US20140087534A1 METHODS OF MANUFACTURING VERTICAL STRUCTURE NONVOLATILE MEMORY DEVICES 有权
标题翻译：制造垂直结构非易失性存储器件的方法
公开(公告)号：US20140087534A1
公开(公告)日：2014-03-27
申请号：US14092191
申请日：2013-11-27
申请人： Byeong-in Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
发明人： Byeong-in Choe , Sung-il Chang , Chang-seok Kang , Jin-soo Lim
IPC分类号： H01L29/66
CPC分类号： H01L29/66666 , G11C16/0466 , G11C16/0483 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/66833 , H01L29/7827 , H01L29/7889 , H01L29/7926
摘要： A vertical structure nonvolatile memory device can include a channel layer that extends in a vertical direction on a substrate. A memory cell string includes a plurality of transistors that are disposed on the substrate in the vertical direction along a vertical sidewall of the channel layer. At least one of the plurality of transistors includes at least one recess in a gate of the transistor into which at least one protrusion, which includes the channel layer, extends.
摘要翻译：垂直结构的非易失性存储器件可以包括在衬底上沿垂直方向延伸的沟道层。存储单元串包括沿着沟道层的垂直侧壁在垂直方向上设置在基板上的多个晶体管。多个晶体管中的至少一个晶体管包括在晶体管的栅极中的至少一个凹部，至少一个包括沟道层的突起延伸到该凹槽中。

5. 发明授权

US08133784B2 Method of fabricating non-volatile memory device having vertical structure 有权
标题翻译：制造具有垂直结构的非易失性存储器件的方法
公开(公告)号：US08133784B2
公开(公告)日：2012-03-13
申请号：US12588534
申请日：2009-10-19
申请人： Dew-ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
发明人： Dew-ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
IPC分类号： H01L21/8238 , H01L21/336 , H01L21/8236
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582
摘要： A method of fabricating a non-volatile memory device according to an example embodiment may include etching a plurality of sacrificial films and insulation films to form a plurality of first openings that expose a plurality of first portions of a semiconductor substrate. A plurality of channel layers may be formed in the plurality of first openings so as to coat the plurality of first portions of the semiconductor substrate and side surfaces of the plurality of first openings. A plurality of insulation pillars may be formed on the plurality of channel layers so as to fill the plurality of first openings. The plurality of sacrificial films and insulation films may be further etched to form a plurality of second openings that expose a plurality of second portions of the semiconductor substrate. A plurality of side openings may be formed by removing the plurality of sacrificial films. A plurality of gate dielectric films may be formed on surfaces of the plurality of side openings. A plurality of gate electrodes may be formed on the plurality of gate dielectric films so as to fill the plurality of side openings.
摘要翻译：根据示例性实施例的制造非易失性存储器件的方法可以包括蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第一部分的多个第一开口。可以在多个第一开口中形成多个沟道层，以便涂覆半导体衬底的多个第一部分和多个第一开口的侧表面。可以在多个通道层上形成多个绝缘柱，以填充多个第一开口。可以进一步蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第二部分的多个第二开口。可以通过去除多个牺牲膜来形成多个侧开口。多个栅极电介质膜可以形成在多个侧面开口的表面上。可以在多个栅极电介质膜上形成多个栅电极，以填充多个侧开口。

6. 发明申请

US20100248439A1 Method of fabricating non-volatile memory device having vertical structure 有权
标题翻译：制造具有垂直结构的非易失性存储器件的方法
公开(公告)号：US20100248439A1
公开(公告)日：2010-09-30
申请号：US12588534
申请日：2009-10-19
申请人： Dew-Ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
发明人： Dew-Ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582
摘要： A method of fabricating a non-volatile memory device according to an example embodiment may include etching a plurality of sacrificial films and insulation films to form a plurality of first openings that expose a plurality of first portions of a semiconductor substrate. A plurality of channel layers may be formed in the plurality of first openings so as to coat the plurality of first portions of the semiconductor substrate and side surfaces of the plurality of first openings. A plurality of insulation pillars may be formed on the plurality of channel layers so as to fill the plurality of first openings. The plurality of sacrificial films and insulation films may be further etched to form a plurality of second openings that expose a plurality of second portions of the semiconductor substrate. A plurality of side openings may be formed by removing the plurality of sacrificial films. A plurality of gate dielectric films may be formed on surfaces of the plurality of side openings. A plurality of gate electrodes may be formed on the plurality of gate dielectric films so as to fill the plurality of side openings.
摘要翻译：根据示例性实施例的制造非易失性存储器件的方法可以包括蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第一部分的多个第一开口。可以在多个第一开口中形成多个沟道层，以便涂覆半导体衬底的多个第一部分和多个第一开口的侧表面。可以在多个通道层上形成多个绝缘柱，以填充多个第一开口。可以进一步蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第二部分的多个第二开口。可以通过去除多个牺牲膜来形成多个侧开口。多个栅极电介质膜可以形成在多个侧面开口的表面上。可以在多个栅极电介质膜上形成多个栅电极，以填充多个侧开口。

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