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1. 发明授权

US07561465B2 Methods and systems for recovering data in a nonvolatile memory array 有权
标题翻译：用于在非易失性存储器阵列中恢复数据的方法和系统
公开(公告)号：US07561465B2
公开(公告)日：2009-07-14
申请号：US11724774
申请日：2007-03-16
申请人： Bryan William Hancock , Nicholas H. Tripsas , Richard C. Blish, II
发明人： Bryan William Hancock , Nicholas H. Tripsas , Richard C. Blish, II
IPC分类号： G11C16/06
CPC分类号： G11C16/3404 , G11C11/5671 , G11C16/3418 , G11C16/3422 , G11C16/3431 , G11C2029/0411
摘要： One embodiment of the invention relates to a method for refreshing a nonvolatile memory array. In the method, a threshold voltage of a multi-bit memory cell is analyzed to determine if it has drifted outside of a number of allowable voltage windows, wherein each allowable voltage windows corresponds to a different multi-bit value. If the threshold voltage of the cell has drifted outside of the number of allowable voltage states, then the cell is recovered by adjusting at least one voltage boundary of at least one of the number of allowable voltage states.
摘要翻译：本发明的一个实施例涉及一种用于刷新非易失性存储器阵列的方法。在该方法中，分析多位存储单元的阈值电压以确定其是否漂移在许多允许电压窗口之外，其中每个可允许电压窗对应于不同的多位值。如果电池的阈值电压漂移在容许电压状态数之外，则通过调节至少一个容许电压状态数量的至少一个电压边界来恢复电池。

2. 发明申请

US20080175054A1 Methods and systems for memory devices 有权
标题翻译：存储器件的方法和系统
公开(公告)号：US20080175054A1
公开(公告)日：2008-07-24
申请号：US11724774
申请日：2007-03-16
申请人： Bryan William Hancock , Nicholas H. Tripsas , Richard C. Blish
发明人： Bryan William Hancock , Nicholas H. Tripsas , Richard C. Blish
IPC分类号： G11C16/06 , G11C11/34 , G11C29/00 , G11C7/00 , G11C16/04
CPC分类号： G11C16/3404 , G11C11/5671 , G11C16/3418 , G11C16/3422 , G11C16/3431 , G11C2029/0411
摘要： One embodiment of the invention relates to a method for refreshing a nonvolatile memory array. In the method, a threshold voltage of a multi-bit memory cell is analyzed to determine if it has drifted outside of a number of allowable voltage windows, wherein each allowable voltage windows corresponds to a different multi-bit value. If the threshold voltage of the cell has drifted outside of the number of allowable voltage states, then the cell is recovered by adjusting at least one voltage boundary of at least one of the number of allowable voltage states.
摘要翻译：本发明的一个实施例涉及一种用于刷新非易失性存储器阵列的方法。在该方法中，分析多位存储单元的阈值电压以确定其是否漂移在许多允许电压窗口之外，其中每个可允许电压窗对应于不同的多位值。如果电池的阈值电压漂移在容许电压状态数之外，则通过调节至少一个容许电压状态数量的至少一个电压边界来恢复电池。

3. 发明授权

US08044387B1 Semiconductor device built on plastic substrate 有权
标题翻译：半导体器件内置塑料基板
公开(公告)号：US08044387B1
公开(公告)日：2011-10-25
申请号：US10885959
申请日：2004-07-07
申请人： Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Nicholas H. Tripsas
发明人： Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Nicholas H. Tripsas
IPC分类号： H01L35/24
CPC分类号： H01L51/0591 , G11C13/0016 , G11C2213/71 , H01L27/285 , H01L51/0097
摘要： Disclosed are semiconductor memory devices containing a plastic substrate and at least one active device supported by the plastic substrate, the active device containing an organic semiconductor material. The semiconductor memory devices containing a plastic substrate may further contain a polymer dielectric and/or a conductive polymer.
摘要翻译：公开了包含塑料基板和由塑料基板支撑的至少一个有源器件的半导体存储器件，该有源器件含有有机半导体材料。包含塑料基板的半导体存储器件还可以包含聚合物电介质和/或导电聚合物。

4. 发明授权

US07696017B1 Memory device with a selection element and a control line in a substantially similar layer 有权
标题翻译：具有选择元件和控制线的存储器件在基本相似的层中
公开(公告)号：US07696017B1
公开(公告)日：2010-04-13
申请号：US12141180
申请日：2008-06-18
申请人： Nicholas H. Tripsas , Suzette Paugrle
发明人： Nicholas H. Tripsas , Suzette Paugrle
IPC分类号： H01L21/82
CPC分类号： H01L27/1021 , H01L27/101
摘要： The invention facilitates manufacture of semiconductor memory components by reducing the number of layers required to implement a semiconductor memory device. The invention provides for a selection element to be formed in the same layer as one of the control lines (e.g. one of the wordline and bitline). In one embodiment of the invention, a diode is implemented as the selection element within the same layer as one of the control lines. Production of the selection element within the same layer as one of the wordline and bitline reduces problems associated with vertical stacking, increases device yield and reduces related production costs. The invention also provides an efficient method of producing memory devices with the selection element in the same layer as one of the control lines.
摘要翻译：本发明有利于通过减少实现半导体存储器件所需的层数来制造半导体存储器组件。本发明提供了一种选择元件，其形成在与控制线之一（例如字线和位线之一）相同的层中。在本发明的一个实施例中，二极管被实现为与控制线之一在同一层内的选择元件。生产作为字线和位线之一的同一层内的选择元件可减少与垂直堆叠相关的问题，提高了设备产量并降低了相关生产成本。本发明还提供了一种生产存储器件的有效方法，其中选择元件与控制线之一在同一层中。

5. 发明授权

US07220642B2 Protection of active layers of memory cells during processing of other elements 有权
标题翻译：在处理其他元件期间保护存储器单元的有源层
公开(公告)号：US07220642B2
公开(公告)日：2007-05-22
申请号：US10987262
申请日：2004-11-12
申请人： Steven Avanzino , Igor Sokolik , Suzette Pangrle , Nicholas H. Tripsas , Jeffrey Shields
发明人： Steven Avanzino , Igor Sokolik , Suzette Pangrle , Nicholas H. Tripsas , Jeffrey Shields
IPC分类号： H01L21/336
CPC分类号： H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/16
摘要： A method of fabricating an electronic structure by providing a conductive layer, providing a dielectric layer over the conductive layer, providing first and second openings through the dielectric layer, providing first and second conductive bodies in the first and second openings respectively and in contact with the conductive layer, providing a memory structure over the first conductive body, providing a protective element over the memory structure, and undertaking processing on the second conductive body.
摘要翻译：一种通过提供导电层制造电子结构的方法，在导电层上提供电介质层，提供通过介电层的第一和第二开口，分别在第一和第二开口中提供第一和第二导电体，并与在第一导电体上提供存储结构，在存储器结构上提供保护元件，并对第二导电体进行处理。

6. 发明授权

US06977389B2 Planar polymer memory device 有权
标题翻译：平面聚合物记忆装置
公开(公告)号：US06977389B2
公开(公告)日：2005-12-20
申请号：US10452877
申请日：2003-06-02
申请人： Nicholas H. Tripsas , Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle
发明人： Nicholas H. Tripsas , Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle
IPC分类号： G11C11/56 , G11C13/02 , H01L27/115 , H01L27/24 , H01L27/28 , H01L35/24
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , H01L27/28 , H01L51/0575
摘要： The present invention provides a planar polymer memory device that can operate as a non-volatile memory device. A planar polymer memory device can be formed with two or more electrodes and an electrode extension associated with one electrode, wherein a selectively conductive medium and dielectric separate the electrodes. The method for forming a planar polymer memory device comprises at least one of forming a first electrode with an associated plug, forming a second electrode, forming a passive layer over the extension, depositing an organic polymer and patterning the organic polymer. The method affords integration of a planar polymer memory device into a semiconductor fabrication process. A thin film diode (TFD) can further be employed with a planar polymer memory device to facilitate programming. The TFD can be formed between the first electrode and the selectively conductive medium or the second electrode and the selectively conductive medium.
摘要翻译：本发明提供一种能够作为非易失性存储器件操作的平面聚合物存储器件。平面聚合物存储器件可以形成有两个或更多个电极和与一个电极相关联的电极延伸，其中选择性导电的介质和电介质分离电极。用于形成平面聚合物记忆装置的方法包括以下步骤中的至少一种：形成具有相关塞子的第一电极，形成第二电极，在延伸部分上形成钝化层，沉积有机聚合物和图案化有机聚合物。该方法将平面聚合物存储器件集成到半导体制造工艺中。还可以使用薄膜二极管（TFD）与平面聚合物存储器件来促进编程。可以在第一电极和选择性导电介质或第二电极和选择性导电介质之间形成TFD。

7. 发明授权

US06753247B1 Method(s) facilitating formation of memory cell(s) and patterned conductive 失效
标题翻译：促进形成记忆体和图案化的导电聚合物膜的方法
公开(公告)号：US06753247B1
公开(公告)日：2004-06-22
申请号：US10285183
申请日：2002-10-31
申请人： Uzodinma Okoroanyanwu , Suzette K. Pangrle , Matthew S. Buynoski , Nicholas H. Tripsas , Mark S. Chang , Ramkumar Subramanian , Angela T. Hui
发明人： Uzodinma Okoroanyanwu , Suzette K. Pangrle , Matthew S. Buynoski , Nicholas H. Tripsas , Mark S. Chang , Ramkumar Subramanian , Angela T. Hui
IPC分类号： H01L214763
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0016 , H01L27/285
摘要： A methodology for forming a memory cell is disclosed, wherein an organic polymer layer is formed over a conductive layer and an electrode layer is formed over the organic polymer layer. A first via is etched into the electrode and organic polymer layers, and a dielectric material is applied over the stack to at least fill in the first via. A second via is then etched into the dielectric material so as to expose and make the electrode layer available as a top electrode. A wordline is then formed over the dielectric material such that the top electrode is connected to the wordline by way of the second via. A memory device formed in accordance with the disclosed methodology includes a top electrode formed over an organic polymer layer, a conductive layer under the organic polymer layer, a via defined by a dielectric material and located above the top electrode, and a wordline formed over the dielectric material such that the top electrode is connected to the wordline by way of the via.
摘要翻译：公开了一种用于形成存储单元的方法，其中在导电层上形成有机聚合物层，并且在有机聚合物层上形成电极层。将第一通孔蚀刻到电极和有机聚合物层中，并且将电介质材料施加到堆叠上以至少填充在第一通孔中。然后将第二通道蚀刻到电介质材料中，以暴露并使电极层可用作顶部电极。然后在电介质材料上形成字线，使得顶部电极通过第二通孔连接到字线。根据所公开的方法形成的存储器件包括形成在有机聚合物层上的顶部电极，有机聚合物层下面的导电层，由电介质材料限定并位于顶部电极之上的通孔，以及形成在上部电极上的字线电介质材料，使得顶部电极通过通孔连接到字线。

8. 发明授权

US06746971B1 Method of forming copper sulfide for memory cell 有权
标题翻译：形成记忆电池用硫化铜的方法
公开(公告)号：US06746971B1
公开(公告)日：2004-06-08
申请号：US10314060
申请日：2002-12-05
申请人： Minh Van Ngo , Sergey D. Lopatin , Suzette K. Pangrle , Nicholas H. Tripsas , Hieu T. Pham
发明人： Minh Van Ngo , Sergey D. Lopatin , Suzette K. Pangrle , Nicholas H. Tripsas , Hieu T. Pham
IPC分类号： H01L2131
CPC分类号： H01L51/0036 , B82Y10/00 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C13/025 , G11C2213/56 , G11C2213/71 , G11C2213/77 , H01L27/28 , H01L51/0034 , H01L51/0035 , H01L51/0037 , H01L51/0038 , H01L51/0041 , H01L51/005 , H01L51/0053 , H01L51/0059 , H01L51/0077 , H01L51/0081 , H01L51/0084 , H01L51/0085
摘要： An organic memory cell made of two electrodes with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media contains an organic semiconductor layer and passive layer. The controllably conductive media changes its impedance when an external stimuli such as an applied electric field is imposed thereon. Methods of making the organic memory devices/cells, methods of using the organic memory devices/cells, and devices such as computers containing the organic memory devices/cells are also disclosed.
摘要翻译：公开了一种由在两个电极之间具有可控导电介质的两个电极制成的有机存储单元。可控导电介质包含有机半导体层和无源层。当施加外部刺激（例如施加的电场）时，可控导电介质改变其阻抗。还公开了制造有机存储器件/单元的方法，使用有机存储器件/单元的方法，以及诸如包含有机存储器件/单元的计算机的器件。

9. 发明授权

US06630383B1 Bi-layer floating gate for improved work function between floating gate and a high-K dielectric layer 有权
标题翻译：双层浮栅，用于改善浮栅和高K电介质层之间的功函数
公开(公告)号：US06630383B1
公开(公告)日：2003-10-07
申请号：US10274063
申请日：2002-10-17
申请人： Effiong Ibok , Wei Zheng , Nicholas H. Tripsas , Mark T. Ramsbey , Fred T K Cheung
发明人： Effiong Ibok , Wei Zheng , Nicholas H. Tripsas , Mark T. Ramsbey , Fred T K Cheung
IPC分类号： H01L21336
CPC分类号： H01L21/28194 , H01L21/28273 , H01L29/42324 , H01L29/4958 , H01L29/51 , H01L29/511
摘要： In one embodiment, a method of making a gate stack semiconductor device is disclosed. The method comprises the steps of: forming a tunnel oxide layer over a p-type semiconductor substrate; forming a floating gate over the tunnel oxide layer by first forming an n-type polysilicon layer and subjecting the n-type polysilicon layer to nitridation, and then forming a p-type polysilicon layer over the nitridated n-type polysilicon layer; and forming a high-K insulating layer over the p-type polysilicon layer.
摘要翻译：在一个实施例中，公开了制造栅叠层半导体器件的方法。该方法包括以下步骤：在p型半导体衬底上形成隧道氧化物层; 通过首先形成n型多晶硅层并对n型多晶硅层进行氮化，然后在氮化的n型多晶硅层上形成p型多晶硅层，在隧道氧化物层上形成浮栅; 以及在p型多晶硅层上形成高K绝缘层。

10. 发明授权

US06548855B1 Non-volatile memory dielectric as charge pump dielectric 失效
标题翻译：非易失性存储介质作为电荷泵电介质
公开(公告)号：US06548855B1
公开(公告)日：2003-04-15
申请号：US10147622
申请日：2002-05-16
申请人： Mark T. Ramsbey , Arvind Halliyal , Kuo-Tung Chang , Nicholas H. Tripsas , Wei Zheng , Unsoon Kim
发明人： Mark T. Ramsbey , Arvind Halliyal , Kuo-Tung Chang , Nicholas H. Tripsas , Wei Zheng , Unsoon Kim
IPC分类号： H01L2976
CPC分类号： H01L27/11526 , H01L27/115 , H01L27/11539
摘要： A non-volatile memory device for retention of data when electrical power is terminated. The non-volatile memory device includes at least one memory cell and a charge pump for stepping up the incoming voltage supply. The charge pump includes at least one capacitor, wherein the dielectric of the charge pump capacitor and the dielectric of the memory cell are formed during the same processing step.
摘要翻译：一种用于在电力终止时保留数据的非易失性存储器件。非易失性存储器件包括至少一个存储单元和用于加速输入电压源的电荷泵。电荷泵包括至少一个电容器，其中电荷泵电容器的电介质和存储单元的电介质在相同的处理步骤期间形成。

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