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1. 发明专利

AU4279301A Semiconductor device and fabrication method therefor 未知
公开(公告)号：AU4279301A
公开(公告)日：2001-10-30
申请号：AU4279301
申请日：2001-03-27
申请人： TOYO KOHAN CO LTD , TADATOMO SUGA
发明人： SUGA TADATOMO , SAIJO KINJI , OHSAWA SHINJI , OKAMOTO HIROAKI , YOSHIDA KAZUO
IPC分类号： H01L23/52 , H01L21/283 , H01L21/288 , H01L21/3205 , H01L21/60 , H01L21/768 , H01L23/31 , H01L23/485 , H01L21/3213
摘要： A method of efficiently and inexpensively fabricating a chip-size package having an electrode pitch expanded by forming a conductor wiring on the electrode forming surface side of a semiconductor chip, especially, a method for facilitating wiring and bump forming. A semiconductor device comprising a semi-conductor elements and conductor wirings formed on the semiconductor elements by etching wiring-forming metal foil; and a fabrication method for a semiconductor device comprising the steps of laminating wiring forming metal foil on the electrode forming surface side on the semiconductor, forming a resist wiring pattern on the metal foil, etching the metal foil, and slicing the device into individual elements.

2. 发明专利

HK1203897A1 METHOD FOR BONDING POLYMER FILM AND POLYMER FILM, METHOD FOR BONDING POLYMER FILM AND INORGANIC MATERIAL SUBSTRATE, POLYMER FILM LAMINATE, AND LAMINATE OF POLYMER FILM AND INORGANIC MATERIAL SUBSTRATE 未知
公开(公告)号：HK1203897A1
公开(公告)日：2015-11-06
申请号：HK15104627
申请日：2015-05-15
申请人： TADATOMO SUGA , LAN TECHNICAL SERVICE CO LTD
发明人： TADATOMO SUGA , YOSHIIE MATSUMOTO
IPC分类号： B29C20060101 , B23K20060101 , B29L20060101
摘要： The present invention provides a method for firmly and inexpensively bonding at low temperature a polymer film to another polymer film or to a glass substrate without the use of an organic adhesive. A method for bonding a polymer film includes a step (S1) for forming a first inorganic material layer on part or all of a first polymer film; a step (S3) for forming a second inorganic material layer on part or all of a second polymer film; a step (S2) for surface-activating the surface of the first inorganic material layer by bombarding with particles having a predetermined kinetic energy; a step (S4) for surface-activating the surface of the second inorganic material layer by bombarding with particles having a predetermined kinetic energy; and a step (S5) for abutting the surface-activated surface of the first inorganic material layer against the surface-activated surface of the second inorganic material layer and bonding the first polymer film and second polymer film together.

3. 发明专利

TWI297185B 半導體裝置之製造方法及套件 PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND KIT 有权
简体标题：半导体设备之制造方法及套件 PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND KIT
公开(公告)号：TWI297185B
公开(公告)日：2008-05-21
申请号：TW094129599
申请日：2005-08-30
申请人：瑞薩科技股份有限公司 RENESAS TECHNOLOGY CORP. , 須賀唯知 TADATOMO SUGA , 沖電氣工業股份有限公司 OKI ELECTRIC INDUSTRY CO., LTD. , 三洋電機股份有限公司 SANYO ELECTRIC CO., LTD. , 夏普股份有限公司 SHARP KABUSHIKI KAISHA , 新力股份有限公司 SONY CORPORATION , 東芝股份有限公司 KABUSHIKI KAISHA TOSHIBA , 日本電氣股份有限公司 NEC CORPORATION , 富士通股份有限公司 FUJITSU LIMITED , 松下電器產業股份有限公司 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. , 羅沐股份有限公司 ROHM CO., LTD.
发明人：須賀唯知 TADATOMO SUGA , 伊藤壽浩 TOSHIHIRO ITOH
IPC分类号： H01L
CPC分类号： H01L24/81 , H01L21/4846 , H01L23/49811 , H01L24/13 , H01L2224/05001 , H01L2224/05022 , H01L2224/05572 , H01L2224/1319 , H01L2224/16 , H01L2224/7901 , H01L2224/81011 , H01L2224/81012 , H01L2224/81075 , H01L2224/81192 , H01L2224/81801 , H01L2224/81894 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01023 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/14 , H01L2924/19043 , H01L2924/351 , H01L2924/00 , H01L2224/05599 , H01L2224/05099
摘要：本發明有關於半導體裝置，其經由具有彈性之突起電極電連接形成在半導體晶片上之電極和形成在佈線基板上之電極，另外，本發明亦有關於組裝方法，其在使半導體晶片和佈線基板進行接合時，可以減小施加在形成於基板上之電極或其下層佈線之負荷。
简体摘要：本发明有关于半导体设备，其经由具有弹性之突起电极电连接形成在半导体芯片上之电极和形成在布线基板上之电极，另外，本发明亦有关于组装方法，其在使半导体芯片和布线基板进行接合时，可以减小施加在形成于基板上之电极或其下层布线之负荷。

4. 发明专利

JP2014220415A 基板表面処理方法及び装置有权
标题翻译：基板表面处理方法和装置
公开(公告)号：JP2014220415A
公开(公告)日：2014-11-20
申请号：JP2013099380
申请日：2013-05-09
申请人：須賀唯知 , Tadatomo Suga , 唯知須賀 , ボンドテック株式会社 , Bondtech Inc
发明人： SUGA TADATOMO , YAMAUCHI AKIRA
IPC分类号： H01L21/02 , B23K20/00 , B23K20/24 , C23C14/46 , H01L21/304
CPC分类号： B23K20/00 , B23K20/24 , C23C14/46 , H01L21/02 , H01L21/30
摘要：【課題】一方の基板に対する表面処理により飛散するスパッタ粒子が他方の基板に影響をあたえずに、ライン式粒子ビーム源を用いた基板表面の処理方法及び処理装置を提供することを目的とする。【解決手段】2つの対向する基板の間に配置されたライン式粒子ビーム源を用いて、一方の基板の表面に対してビーム照射を行うことと、ビーム照射の際に、2つの基板の間に配置された遮蔽部材を用いて、一方の基板から放出される物質が他方の基板に付着することを防ぐことと、を備える基板表面処理方法。【選択図】図1
摘要翻译：要解决的问题：提供一种使用线型粒子束源的基板表面的处理方法和处理装置，其中通过一个基板的表面处理散射的溅射颗粒不影响另一个基板。解决方案：基板表面处理方法包括通过使用布置在彼此面对的两个基板之间的线型粒子束源来对一个基板的表面进行光束照射，并且在光束照射期间通过使用屏蔽构件来防止从一个基板释放的物质与另一个基板的粘附布置在两个基板之间。

5. 发明专利

JP2011119717A Bonding system and bonding method 有权
标题翻译：粘接系统和粘接方法
公开(公告)号：JP2011119717A
公开(公告)日：2011-06-16
申请号：JP2010247508
申请日：2010-11-04
申请人： Bondtech Inc , Tadatomo Suga , ボンドテック株式会社 , 唯知須賀
发明人： SUGA TADATOMO , YAMAUCHI AKIRA
IPC分类号： H01L21/60
CPC分类号： H01L24/80 , H01L24/81 , H01L2224/13021 , H01L2224/16111 , H01L2224/80895 , H01L2224/80896 , H01L2224/81895 , H01L2224/81896
摘要： PROBLEM TO BE SOLVED: To provide a bonding technology capable of securing the favorable bonding strength of both objects to be bonded without forming a resin layer necessarily when both the objects to be bonded are connected electrically.
SOLUTION: In a bonding system, two objects 91 and 92 to be bonded each having a bonding part PT1 composed of one of Au(gold), Cu(copper) and Al(aluminum) and a bonding part PT2 composed of one of one of Si(silicon), SiO
2 (silicon dioxide) or glass on bonding surfaces thereof are bonded. In the bonding system, each bonding surface of two objects 91 and 92 to be bonded is subjected to hydrophilic treatment by an energy wave, and then the two objects 91 and 92 to be bonded are pressed and bonded in a state that the bonding parts PT1 of the two objects 91 and 92 to be bonded and the bonding parts PT2 of the two objects 91 and 92 to be bonded are brought into contact with each other.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种接合技术，其能够在要被接合的物体两端电连接的同时，在不形成树脂层的情况下确保两接合物的良好的接合强度。解决方案：在接合系统中，要结合的两个物体91和92具有由Au（金），Cu（铜）和Al（铝）之一组成的接合部分PT1和由一个的Si（硅），SiO 2 （二氧化硅）之一或其结合面上的玻璃。在接合系统中，要接合的两个物体91和92的每个接合表面通过能量波进行亲水处理，然后在待接合的两个物体91和92被压接和接合在接合部分PT1 要接合的两个物体91和92的两个物体91和92的接合部分PT2彼此接触。版权所有（C）2011，JPO＆INPIT

6. 发明专利

JP2008093801A Sealing joint performance evaluation device, manufacturing method for sealing joint performance evaluation device, sealing joint performance evaluation method and sealing joint performance evaluation system 有权
标题翻译：密封性能评估装置，密封性能评估装置的制造方法，密封性能评估方法和密封性能评估系统
公开(公告)号：JP2008093801A
公开(公告)日：2008-04-24
申请号：JP2006280174
申请日：2006-10-13
申请人： Matsushita Electric Works Ltd , Tadatomo Suga , 松下電工株式会社 , 唯知須賀
发明人： BABA TORU , SUZUKI YUJI , SANAGAWA YOSHIHARU , SUGA TADATOMO , ITO HISAHIRO , OKADA HIRONAO
IPC分类号： B81B3/00 , B81C99/00 , H01L23/02
摘要： PROBLEM TO BE SOLVED: To easily evaluate sealing performance of sealing joint.
SOLUTION: The sealing joint performance evaluation device is provided with a frame part 4 having an opening 3; a plurality of vibration bodies 5a, 5b, 5c supported in the opening 3 of the frame part 4; a light-transmitting cap part 6 formed on an upper surface of the frame part 4; and a silicon substrate 7 joined to a lower surface of the frame part 4. The opening 3 is air-tightly sealed by the cap part 6 and the silicon substrate 7. Further, the vibration bodies 5a, 5b, 5c are vibrated, the vibration bodies 5a, 5b, 5c are irradiated with a light through the cap part 6, and the light reflected in the vibration bodies 5a, 5b, 5c is received. Resonance characteristic of the vibration bodies is measured from the received light, and a vacuum degree in the opening 3 is calculated from the measured resonance characteristic.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：容易评估密封接头的密封性能。解决方案：密封接头性能评估装置设置有具有开口3的框架部分4; 支撑在框架部分4的开口3中的多个振动体5a，5b，5c; 形成在框架部4的上表面上的透光帽部6; 以及与框架部4的下表面接合的硅基板7.开口部3由盖部6和硅基板7气密地密封。此外，振动体5a，5b，5c振动，振动主体5a，5b，5c通过盖部6照射光，并且接收在振动体5a，5b，5c中反射的光。从接收的光测量振动体的共振特性，并根据测量的谐振特性计算开口3中的真空度。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2007110050A Bump forming method 有权
标题翻译： BUMP形成方法
公开(公告)号：JP2007110050A
公开(公告)日：2007-04-26
申请号：JP2005302144
申请日：2005-10-17
申请人： Namics Corp , Tadatomo Suga , Katsuhide Tsukamoto , ナミックス株式会社 , 勝秀塚本 , 唯知須賀
发明人： SUGA TADATOMO , TSUKAMOTO KATSUHIDE , YOSHII AKITO , KITAMURA MASAHIRO , YAMAGUCHI HIROSHI
IPC分类号： H01L21/60
CPC分类号： H01L2224/11 , H01L2924/01322 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a fine bump forming method indispensable to high density packaging, especially a bump forming method which is cheap as compared with cases based on a photolithographic technique and a plating technique, and is less subject to an environmental side since many chemicals and water are not used.
SOLUTION: The bump forming method comprises the steps of forming conductive resin layers covering a substrate and an electrode front surface on the substrate; removing the conductive resin layer on the substrate by a laser, while leaving the conductive resin layer on the electrode front surface on the substrate; and forming a bump consisting of conductive resin.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供与高密度封装不可缺少的微小凸起形成方法，特别是与基于光刻技术和电镀技术的情况相比便宜的凸块形成方法，并且较少受环境影响因为许多化学品和水不被使用。解决方案：凸块形成方法包括以下步骤：在基板上形成覆盖基板的导电树脂层和电极前表面; 通过激光去除基板上的导电树脂层，同时将导电树脂层留在基板上的电极前表面上; 并形成由导电树脂组成的凸块。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2004327718A Method of mounting electronic component 有权
标题翻译：安装电子元件的方法
公开(公告)号：JP2004327718A
公开(公告)日：2004-11-18
申请号：JP2003120408
申请日：2003-04-24
申请人： Fujitsu Ltd , Hitachi Ltd , Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Nec Corp , Oki Electric Ind Co Ltd , Rohm Co Ltd , Sanyo Electric Co Ltd , Sharp Corp , Shinko Electric Ind Co Ltd , Sony Corp , Tadatomo Suga , Toshiba Corp , シャープ株式会社 , ソニー株式会社 , ローム株式会社 , 三洋電機株式会社 , 三菱電機株式会社 , 富士通株式会社 , 新光電気工業株式会社 , 日本電気株式会社 , 松下電器産業株式会社 , 株式会社日立製作所 , 株式会社東芝 , 沖電気工業株式会社 , 唯知須賀
发明人： SUGA TADATOMO , ITO HISAHIRO , NAKAZAWA HIDETO , AKAGAWA MASATOSHI
IPC分类号： H05K1/18 , H01L21/52 , H01L21/60 , H01L23/498 , H05K3/34
CPC分类号： H01L24/81 , H01L23/49816 , H01L2224/05568 , H01L2224/05573 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/81054 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/81801 , H01L2224/81894 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H05K3/3436 , H05K2203/085 , H05K2203/086 , Y02P70/613 , Y10T29/4913 , Y10T29/49144 , Y10T29/49149 , Y10T29/49197 , H01L2224/05624 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a mounting method for connecting electronic components to a board through normal temperature jointing, without applying severe pretreatment for a connection surface due to CMP (chemical mechanical polish) or electrolytic polishing, in order to suppress dispersions in roughness or the height of connection surfaces of the electronic components, such as semiconductor chips, semiconductor packages or the like or bumps on the mounting board. SOLUTION: A connection member of at least one of the electronic component and the substrate is formed of a solder material, and the electronic component is contacted with the connecting member of the substrate at a normal temperature. As the solder material, a material, in which a load upon showing the changing amount of 8μm in the direction of the height of a spherical bump, having a diameter of 130μm in a direction parallel to an electronic component body is not larger than 100g, when a vertical load is applied, is employed. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供通过常温接合将电子部件连接到电路板的安装方法，而不对CMP（化学机械抛光）或电解抛光对连接表面进行严格的预处理，以便抑制分散体粗糙度或电子部件的连接表面的高度，例如半导体芯片，半导体封装等或安装板上的凸块。解决方案：电子部件和基板中的至少一个的连接部件由焊料材料形成，并且电子部件在常温下与基板的连接部件接触。作为焊料材料，在与电子部件主体平行的方向上具有直径为130μm的球状凸块的高度方向上显示8μm的变化量的负载的材料不大于100g，当施加垂直载荷时。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2004093451A Probe method and probe device 审中-公开
公开(公告)号：JP2004093451A
公开(公告)日：2004-03-25
申请号：JP2002256746
申请日：2002-09-02
申请人： Hisahiro Ito , Kenichi Kataoka , Katsuya Okumura , Tadatomo Suga , Tokyo Electron Ltd , 伊藤寿浩 , 奥村勝弥 , 東京エレクトロン株式会社 , 片岡憲一 , 須賀唯知
发明人： SUGA TADATOMO , OKUMURA KATSUYA , ITO HISAHIRO , KATAOKA KENICHI , KOMATSU SHIGEKAZU , ABE YUICHI
IPC分类号： G01R1/06 , G01R1/067 , G01R1/073 , G01R31/28 , H01L21/66
CPC分类号： G01R1/07314 , G01R1/06766 , G01R31/2831 , G01R31/2886
摘要： PROBLEM TO BE SOLVED: To provide a probe method and a probe device as improvement of a conventional inspecting method in which a stylus pressure is given to break an oxide film of an electrode pad involving such a problem that the stylus pressure from a contact shoe may change the electric characteristics such as the transistor characteristics and a stylus pressure as large as breaking the oxide film of the electrode pad can not be given in case a soft material such as Low-k material having a low diffraction factor is used in the sub-layer of the electrode pad.
SOLUTION: The probe method consists of three processes, one in which the electrode pad P of a wafer W is subjected to a reduction process using a foaming gas, another in which the electrode pad P and a probe 144 are put in contact, and a third in which the electrode pad P and the probe 144 are put in electric continuity using fritting phenomenon.
COPYRIGHT: (C)2004,JPO

10. 发明专利

JP2014179420A Method for bonding electronic component 有权
标题翻译：用于绑定电子元件的方法
公开(公告)号：JP2014179420A
公开(公告)日：2014-09-25
申请号：JP2013051680
申请日：2013-03-14
申请人： Alpha- Design Kk , アルファーデザイン株式会社 , Tadatomo Suga , 唯知須賀 , Masataka Mizukoshi , 正孝水越
发明人： SHIRATORI TOSHIYUKI , KAWASAKI KYO , SUGA TADATOMO , MIZUKOSHI MASATAKA
IPC分类号： H01L21/603 , B23K20/00 , B23K20/24 , H01L21/60
CPC分类号： H01L2224/16225 , H01L2224/73253
摘要： PROBLEM TO BE SOLVED: To secure a good bonding state between an electronic component and an electrode terminal, to improve productivity, and to downsize a substrate.SOLUTION: A method for bonding an electronic component comprises the steps of: mounting electrode terminals 4a of electronic components 4 having different heights on a plurality of electrodes 2a of a substrate 1 (component mounting step); mounting an organic film 5 thicker than a height difference between the highest electronic component and the lowest electronic component among a plurality of electronic components on the plurality of electronic components (organic film mounting step); uniforming the height of a pressed surface 5a of the organic film by applying a first pressure to the electronic component side by pressing a tabular pressing surface 58a of the pressing member 58 heated to a prescribed temperature against the organic film (organic film pressurizing step); and bonding each electrode terminal of the plurality of electronic components to each electrode of the substrate by applying a second pressure to the electric component side by the pressing member by pressing a tabular pressurizing surface 58a of a pressurizing member 58 against the pressed surface and heating the electronic component side for a prescribed time (bonding step).
摘要翻译：要解决的问题：确保电子部件和电极端子之间的良好的接合状态，以提高生产率并且使基板小型化。解决方案：一种用于接合电子部件的方法包括以下步骤：安装电子部件的电极端子4a 在基板1的多个电极2a上具有不同高度的部件4（部件安装步骤）; 在多个电子部件的多个电子部件之中安装比最高电子部件与最低电子部件的高度差更厚的有机膜5（有机膜安装工序）; 通过对被加热到预定温度的加压构件58的平板状的按压面58a压在有机膜上（有机膜加压步骤），通过向电子部件侧施加第一压力来均匀化有机膜的压制表面5a的高度; 并且通过将加压构件58的平板状加压面58a压靠在被按压面上，通过对按压部件施加第二压力而将多个电子部件的各个电极端子接合到基板的各个电极，并加热电子部件侧规定时间（接合工序）。

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