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1. 发明授权

US08537509B2 Ground fault detecting and controlling method for parallel-structured high voltage system 有权
标题翻译：并联高压系统接地故障检测与控制方法
公开(公告)号：US08537509B2
公开(公告)日：2013-09-17
申请号：US13074285
申请日：2011-03-29
申请人： Sang Yon Yoon
发明人： Sang Yon Yoon
IPC分类号： H02H3/00 , H02H9/08
CPC分类号： B60L3/0069 , G01R31/007 , G01R31/025
摘要： The present invention relates to a ground fault detecting and controlling method for a parallel-structured high voltage system, and more particularly, such a ground fault detecting and controlling method for a parallel-structured high voltage system, in which it can be more precisely determined whether or not the system operation is emergently stopped based on individual insulation resistance values for respective items of the system, and it can be determined whether there is the possibility of temporary operation of the system in the emergency stop situation of the system operation. According to the present invention, a combined insulation resistance ground fault reference value is calculated based on individual insulation resistance values for respective items of the system, and the entire system is controlled by using the calculated combined insulation resistance ground fault reference value such that a high-accuracy ground fault detecting and controlling method can be provided.
摘要翻译：本发明涉及并联结构的高压系统的接地故障检测和控制方法，更具体地说，涉及一种用于并行结构的高压系统的这种接地故障检测和控制方法，其中可以更准确地确定基于系统的各个项目的各个绝缘电阻值是否立即停止系统操作，并且可以确定在系统操作的紧急停止状态中是否存在系统的暂时操作的可能性。根据本发明，基于系统的各个项目的各绝缘电阻值来计算组合的绝缘电阻接地故障参考值，并且通过使用所计算的组合绝缘电阻接地故障参考值来控制整个系统，使得高 - 可以提供准确的接地故障检测和控制方法。

2. 发明申请

US20120120530A1 GROUND FAULT DETECTING AND CONTROLLING METHOD FOR PARALLEL-STRUCTURED HIGH VOLTAGE SYSTEM 有权
标题翻译：并联结构高压系统的地面故障检测与控制方法
公开(公告)号：US20120120530A1
公开(公告)日：2012-05-17
申请号：US13074285
申请日：2011-03-29
申请人： Sang Yon Yoon
发明人： Sang Yon Yoon
IPC分类号： G01R31/14 , H02H3/00
CPC分类号： B60L3/0069 , G01R31/007 , G01R31/025
摘要： The present invention relates to a ground fault detecting and controlling method for a parallel-structured high voltage system, and more particularly, such a ground fault detecting and controlling method for a parallel-structured high voltage system, in which it can be more precisely determined whether or not the system operation is emergently stopped based on individual insulation resistance values for respective items of the system, and it can be determined whether there is the possibility of temporary operation of the system in the emergency stop situation of the system operation. According to the present invention, a combined insulation resistance ground fault reference value is calculated based on individual insulation resistance values for respective items of the system, and the entire system is controlled by using the calculated combined insulation resistance ground fault reference value such that a high-accuracy ground fault detecting and controlling method can be provided.
摘要翻译：本发明涉及并联结构的高压系统的接地故障检测和控制方法，更具体地说，涉及一种用于并行结构的高压系统的这种接地故障检测和控制方法，其中可以更准确地确定基于系统的各个项目的各个绝缘电阻值是否立即停止系统操作，并且可以确定在系统操作的紧急停止状态中是否存在系统的暂时操作的可能性。根据本发明，基于系统的各个项目的各绝缘电阻值来计算组合的绝缘电阻接地故障参考值，并且通过使用所计算的组合绝缘电阻接地故障参考值来控制整个系统，使得高 - 可以提供准确的接地故障检测和控制方法。

3. 发明申请

US20100227458A1 METHOD OF FORMING POLYCRYSTALLINE SILICON LAYER AND ATOMIC LAYER DEPOSITION APPARATUS USED FOR THE SAME 有权
标题翻译：形成多晶硅层的方法和用于其的原子沉积沉积装置
公开(公告)号：US20100227458A1
公开(公告)日：2010-09-09
申请号：US12714252
申请日：2010-02-26
申请人： Yun-Mo CHUNG , Ki-Yong Lee , Min-Jae Jeong , Jin-Wook Seo , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang , Tae-Hoon Yang , Ji-Su Ahn , Young-Dae Kim , Byoung-Keon Park , Kil-Won Lee , Dong-Hyun Lee , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Maxim Lisachenko
发明人： Yun-Mo CHUNG , Ki-Yong Lee , Min-Jae Jeong , Jin-Wook Seo , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang , Tae-Hoon Yang , Ji-Su Ahn , Young-Dae Kim , Byoung-Keon Park , Kil-Won Lee , Dong-Hyun Lee , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Maxim Lisachenko
IPC分类号： H01L21/20 , C23C16/48
CPC分类号： H01L21/02532 , C23C14/04 , H01L21/02422 , H01L21/02488 , H01L21/02672
摘要： A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.
摘要翻译：一种形成多晶硅层的方法和用于其的原子层沉积装置。该方法包括在衬底上形成非晶硅层，将具有非晶硅层的衬底暴露于亲水或疏水性气体气氛，在非晶硅层上放置具有至少一个开放和至少一个封闭部分的掩模，照射UV 使用UV灯朝向非晶硅层和掩模发光，在非晶硅层上沉积结晶诱导金属，并退火基板以使非晶硅层结晶成多晶硅层。该方法和装置提供了在多晶硅层的形成中控制种子位置和晶粒尺寸。

4. 发明授权

US08048783B2 Method of forming polycrystalline silicon layer and atomic layer deposition apparatus used for the same 有权
标题翻译：形成多晶硅层的方法和用于其的原子层沉积装置
公开(公告)号：US08048783B2
公开(公告)日：2011-11-01
申请号：US12714252
申请日：2010-02-26
申请人： Yun-Mo Chung , Ki-Yong Lee , Min-Jae Jeong , Jin-Wook Seo , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang , Tae-Hoon Yang , Ji-Su Ahn , Young-Dae Kim , Byoung-Keon Park , Kil-Won Lee , Dong-Hyun Lee , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Maxim Lisachenko
发明人： Yun-Mo Chung , Ki-Yong Lee , Min-Jae Jeong , Jin-Wook Seo , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang , Tae-Hoon Yang , Ji-Su Ahn , Young-Dae Kim , Byoung-Keon Park , Kil-Won Lee , Dong-Hyun Lee , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Maxim Lisachenko
IPC分类号： H01L21/20
CPC分类号： H01L21/02532 , C23C14/04 , H01L21/02422 , H01L21/02488 , H01L21/02672
摘要： A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.
摘要翻译：一种形成多晶硅层的方法和用于其的原子层沉积装置。该方法包括在衬底上形成非晶硅层，将具有非晶硅层的衬底暴露于亲水或疏水性气体气氛，在非晶硅层上放置具有至少一个开放和至少一个封闭部分的掩模，照射UV 使用UV灯朝向非晶硅层和掩模发光，在非晶硅层上沉积结晶诱导金属，并退火基板以使非晶硅层结晶成多晶硅层。该方法和装置提供了在多晶硅层的形成中控制种子位置和晶粒尺寸。

5. 发明申请

US20110263107A1 METHOD OF FORMING POLYCRYSTALLINE SILICON LAYER AND ATOMIC LAYER DEPOSITION APPARATUS USED FOR THE SAME 有权
标题翻译：形成多晶硅层的方法和用于其的原子沉积沉积装置
公开(公告)号：US20110263107A1
公开(公告)日：2011-10-27
申请号：US13177936
申请日：2011-07-07
申请人： Yun-Mo CHUNG , Ki-Yong LEE , Min-Jae JEONG , Jin-Wook SEO , Jong-Won HONG , Heung-Yeol NA , Eu-Gene KANG , Seok-Rak CHANG , Tae-Hoon YANG , Ji-Su AHN , Young-Dae KIM , Byoung-Keon PARK , Kil-Won LEE , Dong-Hyun LEE , Sang-Yon YOON , Jong-Ryuk PARK , Bo-Kyung CHOI , Maxim LISACHENKO
发明人： Yun-Mo CHUNG , Ki-Yong LEE , Min-Jae JEONG , Jin-Wook SEO , Jong-Won HONG , Heung-Yeol NA , Eu-Gene KANG , Seok-Rak CHANG , Tae-Hoon YANG , Ji-Su AHN , Young-Dae KIM , Byoung-Keon PARK , Kil-Won LEE , Dong-Hyun LEE , Sang-Yon YOON , Jong-Ryuk PARK , Bo-Kyung CHOI , Maxim LISACHENKO
IPC分类号： H01L21/20 , C23C16/48 , C23C16/455 , C23C16/24 , C23C16/04
CPC分类号： H01L21/02532 , C23C14/04 , H01L21/02422 , H01L21/02488 , H01L21/02672
摘要： A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.
摘要翻译：一种形成多晶硅层的方法和用于其的原子层沉积装置。该方法包括在衬底上形成非晶硅层，将具有非晶硅层的衬底暴露于亲水或疏水性气体气氛，在非晶硅层上放置具有至少一个开放和至少一个封闭部分的掩模，照射UV 使用UV灯朝向非晶硅层和掩模发光，在非晶硅层上沉积结晶诱导金属，并退火基板以使非晶硅层结晶成多晶硅层。该方法和装置提供了在多晶硅层的形成中控制种子位置和晶粒尺寸。

6. 发明授权

US08546248B2 Method of forming polycrystalline silicon layer and atomic layer deposition apparatus used for the same 有权
标题翻译：形成多晶硅层的方法和用于其的原子层沉积装置
公开(公告)号：US08546248B2
公开(公告)日：2013-10-01
申请号：US13177936
申请日：2011-07-07
申请人： Yun-Mo Chung , Ki-Yong Lee , Min-Jae Jeong , Jin-Wook Seo , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang , Tae-Hoon Yang , Ji-Su Ahn , Young-Dae Kim , Byoung-Keon Park , Kil-Won Lee , Dong-Hyun Lee , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Maxim Lisachenko
发明人： Yun-Mo Chung , Ki-Yong Lee , Min-Jae Jeong , Jin-Wook Seo , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang , Tae-Hoon Yang , Ji-Su Ahn , Young-Dae Kim , Byoung-Keon Park , Kil-Won Lee , Dong-Hyun Lee , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Maxim Lisachenko
IPC分类号： H01L21/20
CPC分类号： H01L21/02532 , C23C14/04 , H01L21/02422 , H01L21/02488 , H01L21/02672
摘要： A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.
摘要翻译：一种形成多晶硅层的方法和用于其的原子层沉积装置。该方法包括在衬底上形成非晶硅层，将具有非晶硅层的衬底暴露于亲水或疏水性气体气氛，在非晶硅层上放置具有至少一个开放和至少一个封闭部分的掩模，照射UV 使用UV灯朝向非晶硅层和掩模发光，在非晶硅层上沉积结晶诱导金属，并退火基板以使非晶硅层结晶成多晶硅层。该方法和装置提供了在多晶硅层的形成中控制种子位置和晶粒尺寸。

7. 发明申请

US20100227443A1 METHOD OF FORMING POLYCRYSTALLINE SILICON LAYER 审中-公开
标题翻译：形成多晶硅层的方法
公开(公告)号：US20100227443A1
公开(公告)日：2010-09-09
申请号：US12713928
申请日：2010-02-26
申请人： Kil-Won LEE , Ki-Yong Lee , Jin-Wook Seo , Tae-Hoon Yang , Byoung-Keon Park , Maxim Lisachenko , Ji-Su Ahn , Young-Dae Kim , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Yun-Mo Chung , Min-Jae Jeong , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang
发明人： Kil-Won LEE , Ki-Yong Lee , Jin-Wook Seo , Tae-Hoon Yang , Byoung-Keon Park , Maxim Lisachenko , Ji-Su Ahn , Young-Dae Kim , Sang-Yon Yoon , Jong-Ryuk Park , Bo-Kyung Choi , Yun-Mo Chung , Min-Jae Jeong , Jong-Won Hong , Heung-Yeol Na , Eu-Gene Kang , Seok-Rak Chang
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L21/02532 , H01L21/02422 , H01L21/02488 , H01L21/02592 , H01L21/0262 , H01L21/02672 , H01L27/1277 , H01L29/66757
摘要： A method of forming a polycrystalline silicon layer includes forming an amorphous silicon layer on a substrate by chemical vapor deposition using a gas including a silicon atom and hydrogen gas, and crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a crystallization-inducing metal. The resultant polycrystalline silicon layer has an improved charge mobility.
摘要翻译：形成多晶硅层的方法包括通过使用包含硅原子和氢气的气体的化学气相沉积在基板上形成非晶硅层，并且使用结晶诱导金属将非晶硅层结晶成多晶硅层。所得多晶硅层具有改善的电荷迁移率。

8. 发明申请

US20100224883A1 THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE INCLUDING THE SAME 审中-公开
标题翻译：薄膜晶体管，其制造方法以及包括其的有机发光二极管显示装置
公开(公告)号：US20100224883A1
公开(公告)日：2010-09-09
申请号：US12714201
申请日：2010-02-26
申请人： Byoung-Keon PARK , Tae-Hoo Yang , Jin-Wook Seo , Ki-Yong Lee , Maxim Lisachenko , Bo-Kyung Choi , Dae-Woo Lee , Kil-Won Lee , Dong-Hyun Lee , Jong-Ryuk Park , Ji-Su Ahn , Yong-Dae Kim , Heung-Yeol Na , Min-Jae Jeong , Yun-Mo Chung , Jong-Won Hong , Eu-Gene Kang , Seok-Rak Chang , Jae-Wan Jung , Sang-Yon Yoon
发明人： Byoung-Keon PARK , Tae-Hoo Yang , Jin-Wook Seo , Ki-Yong Lee , Maxim Lisachenko , Bo-Kyung Choi , Dae-Woo Lee , Kil-Won Lee , Dong-Hyun Lee , Jong-Ryuk Park , Ji-Su Ahn , Yong-Dae Kim , Heung-Yeol Na , Min-Jae Jeong , Yun-Mo Chung , Jong-Won Hong , Eu-Gene Kang , Seok-Rak Chang , Jae-Wan Jung , Sang-Yon Yoon
IPC分类号： H01L33/16 , H01L29/786 , H01L21/336 , H01L21/20
CPC分类号： H01L29/6675 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02667 , H01L21/02672 , H01L27/1277 , H01L29/66757 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor (TFT) and an organic light emitting diode (OLED) display device. The TFT and the OLED display device include a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate electrode insulated from the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, and source and drain electrodes insulated from the gate electrode and partially connected to the semiconductor layer, wherein the semiconductor layer is formed from a polycrystalline silicon layer crystallized by a metal catalyst and the metal catalyst is removed by gettering using an etchant. In addition, the OLED display device includes an insulating layer disposed on the entire surface of the substrate, a first electrode disposed on the insulating layer and electrically connected to one of the source and drain electrodes, an organic layer, and a second electrode.
摘要翻译：薄膜晶体管（TFT）和有机发光二极管（OLED）显示装置。 TFT和OLED显示装置包括基板，设置在基板上的缓冲层，设置在缓冲层上的半导体层，与半导体层绝缘的栅电极，将半导体层与栅电极绝缘的栅极绝缘层，以及与栅电极绝缘并且部分地连接到半导体层的源电极和漏电极，其中半导体层由通过金属催化剂结晶的多晶硅层形成，并且使用蚀刻剂通过吸气除去金属催化剂。此外，OLED显示装置包括设置在基板的整个表面上的绝缘层，设置在绝缘层上并电连接到源极和漏极之一的第一电极，有机层和第二电极。

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