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1. 发明授权

US08972828B1 High speed interconnect protocol and method 有权
标题翻译：高速互联协议和方法
公开(公告)号：US08972828B1
公开(公告)日：2015-03-03
申请号：US13534835
申请日：2012-06-27
申请人： Niv Margalit , Eyal Oren , Rami Zemach , Dan Zislis
发明人： Niv Margalit , Eyal Oren , Rami Zemach , Dan Zislis
IPC分类号： H03M13/00
CPC分类号： H03M13/333 , H03M13/09 , H03M13/19
摘要： A method of error mitigation for transferring packets over a chip-to-chip data interconnect using a high speed interconnect protocol, the method including grouping a pre-selected number of high speed interconnect protocol words to form a protection frame, adding at least one additional error protection bit to each word in the group, adding a synchronization bit to each word, using the synchronization bit in a first word in each frame for synchronization of the protection frame and detecting and correcting a single bit error in the protection frame using the additional error protection bits, thereby reducing packet drop when the frames are transferred over the high speed data interconnect.
摘要翻译：一种用于使用高速互连协议通过芯片到芯片数据互连传输分组的错误减轻的方法，所述方法包括将预选数量的高速互连协议字分组以形成保护帧，添加至少一个附加错误保护位到组中的每个字，使用每个帧中的第一个字中的同步位来对每个字添加一个同步位，用于保护帧的同步，并使用附加的检测和校正保护帧中的单个位错误错误保护位，从而在通过高速数据互连传输帧时减少数据包丢弃。

2. 发明授权

US07729351B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US07729351B2
公开(公告)日：2010-06-01
申请号：US11365017
申请日：2006-03-01
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56 , H04J1/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets. These features can include a recycle path coupling a gather stage circuit and a fetch stage circuit and can include sequence number logic configured to associate sequence numbers with multicast packet headers.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。这些特征可以包括耦合收集阶段电路和获取级电路的再循环路径，并且可以包括被配置为将序列号与多播分组报头相关联的序列号逻辑。

3. 发明授权

US07643486B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US07643486B2
公开(公告)日：2010-01-05
申请号：US11242453
申请日：2005-10-03
申请人： David Belz , Garry P. Epps , Michael Laor , Eyal Oren
发明人： David Belz , Garry P. Epps , Michael Laor , Eyal Oren
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L47/527 , H04L47/10 , H04L47/21 , H04L47/326 , H04L47/50 , H04L47/6215 , H04L49/1546 , H04L49/205 , H04L49/3009 , H04L49/3018 , H04L49/3063 , H04L49/50 , H04L49/552 , H04L49/602 , H04L49/90 , H04L49/9078
摘要： A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in a multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Using bandwidth management techniques, each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path includes a buffer/queuing circuit similar to that used in the receive path and can include another pipelined switch. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus, congestion avoidance, and bandwidth management hardware.
摘要翻译：用于接收，修改，切换，缓冲，排队和排队数据包以在通信网络中传输的流水线线卡架构。线路卡具有两条路径：从网络将数据包传送到交换机设备的接收路径，以及将交换机传送到网络的数据包的发送路径。在接收路径中，使用可编程数据结构在多级流水线中对接收到的数据包进行处理和切换，以便进行快速表查找和链表遍历。流水线交换机在确定每个数据包的路由目的地时并行操作多个数据包。一旦进行了确定，每个数据包被修改为包含新的路由信息以及额外的标题数据，以帮助通过交换机加速速度。使用带宽管理技术，每个数据包然后被缓冲并排入队列，以便通过交换结构传输到连接到适当目标端口的线卡。目的线路卡可能与接收入站分组或不同物理线卡一样的物理线卡。发送路径包括类似于在接收路径中使用的缓冲器/排队电路，并且可以包括另一流水线开关。使用基于CoS的决策设备，拥塞避免和带宽管理硬件来实现分组的入队和出队。

4. 发明申请

US20070195773A1 Pipelined packet switching and queuing architecture 有权
公开(公告)号：US20070195773A1
公开(公告)日：2007-08-23
申请号：US11358860
申请日：2006-02-21
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

5. 发明授权

US06961808B1 Method and apparatus for implementing and using multiple virtual portions of physical associative memories 有权
标题翻译：用于实现和使用物理关联存储器的多个虚拟部分的方法和装置
公开(公告)号：US06961808B1
公开(公告)日：2005-11-01
申请号：US10042836
申请日：2002-01-08
申请人： Eyal Oren , David E. Belz
发明人： Eyal Oren , David E. Belz
IPC分类号： G06F12/00 , G06F17/30
CPC分类号： G06F17/30985
摘要： Methods and apparatus are disclosed for implementing and using multiple virtual portions of an associative memory. An associative memory is programmed with multiple sets of entries, each of the multiple sets of entries including a different unique decoder field. A piece of information is received including a data item. A decoder field is identified. The decoder field and the data item are typically included in a lookup word used in a lookup operation in the associated memory, with the decoder field identifying which of the multiple sets of entries to search based on the data item. In one implementation, a nested condition associated with the data item is identified, and in response, multiple lookup words are generated with a predefined set of decoder fields for the data item. Multiple levels of decoder fields may be used to identify multiple subsets of entries within one of the multiple sets of entries.
摘要翻译：公开了用于实现和使用关联存储器的多个虚拟部分的方法和装置。关联存储器被编程有多组条目，多组条目中的每一个包括不同的唯一解码器字段。接收包括数据项的信息。识别解码器字段。解码器字段和数据项通常包括在相关存储器中的查找操作中使用的查找字中，解码器字段根据该数据项标识要搜索的多组条目中的哪一个。在一个实现中，识别与数据项相关联的嵌套条件，并且作为响应，用数据项的预定义的解码器字段组生成多个查找字。可以使用多级解码器字段来标识多组条目之一内的条目的多个子集。

6. 发明授权

US08149708B2 Dynamically switching streams of packets among dedicated and shared queues 有权
标题翻译：在专用和共享队列之间动态切换数据包流
公开(公告)号：US08149708B2
公开(公告)日：2012-04-03
申请号：US11407805
申请日：2006-04-20
申请人： Doron Oz , Earl T. Cohen , Eyal Oren
发明人： Doron Oz , Earl T. Cohen , Eyal Oren
IPC分类号： G01R31/08 , H04L12/28
CPC分类号： H04L47/10 , H04L47/2408 , H04L47/2441 , H04L49/90 , H04L49/9047
摘要： Streams of packets are dynamically switched among dedicated and shared queues. For example, when a packet stream is in a maintenance mode (such as to keep a tunnel or packet stream associated with a server active) all packet traffic received over a packet stream is directed into the shared queue while the packet stream is not associated with one of the dedicated queues. In response to a detected change in the packet activity status of packet traffic (e.g., the establishment of a call or an increase in packet traffic, especially desirous of individualized quality of service) over a particular packet stream of the packet streams, the particular packet stream is associated with a particular group of dedicated queues such that at least non-control data traffic received over the particular packet stream is subsequently directed into the particular group of dedicated queues while the particular packet stream remains associated with the particular group of dedicated queues.
摘要翻译：数据包流在专用和共享队列之间动态切换。例如，当分组流处于维护模式（例如保持与服务器活动的隧道或分组流相关联）时，通过分组流接收的所有分组流量被引导到共享队列中，而分组流不与其中一个专用队列。响应于分组流的特定分组流检测到分组业务的分组活动状态（例如，建立呼叫或增加分组业务，特别是希望个体化服务质量）的变化，特定分组流与特定组的专用队列相关联，使得至少在特定分组流上接收到的非控制数据业务随后被引导到特定的专用队列组，而特定分组流保持与特定组的专用队列相关联。

7. 发明授权

US07941605B1 Methods and apparatus for generating a result based on a lookup result from a lookup operation using an associative memory and processing based on a discriminator portion of a lookup word 有权
标题翻译：基于使用关联存储器的查找操作的查找结果和基于查找字的鉴别器部分的处理来生成结果的方法和装置
公开(公告)号：US07941605B1
公开(公告)日：2011-05-10
申请号：US10286007
申请日：2002-11-01
申请人： Eyal Oren , Oded Trainin , Gil Goren
发明人： Eyal Oren , Oded Trainin , Gil Goren
IPC分类号： G06F12/00
CPC分类号： G06F17/30982 , H04L69/22
摘要： Methods and apparatus are disclosed for generating a result based on a lookup result from a lookup operation using an associative memory and processing based on a discriminator portion of a lookup word. A first lookup operation is performed to generate a lookup result. In one implementation, a second lookup operation is performed based on a discriminator or the lookup result depending on the result of an evaluation, such as whether there was a hit or the lookup result matches a predetermined value. In one implementation, a second lookup operation is performed based on the discriminator, and either the result of the first or second lookup operation is used for subsequent processing. One implementation performs a lookup operation based on a lookup word to generate a lookup result, which is used to retrieve a base address and a bitmap from a memory. A discriminator is identified, and the result is generated based on the discriminator, the bitmap, and the base address, such as by adding to the base address the number of set bits in a range within the bitmap.
摘要翻译：公开了用于基于来自使用关联存储器的查找操作的查找结果和基于查找词的鉴别器部分的处理来生成结果的方法和装置。执行第一查找操作以生成查找结果。在一个实现中，根据鉴别器或查找结果执行第二查找操作，这取决于评估的结果，例如是否存在命中或查找结果与预定值相匹配。在一个实现中，基于鉴别器执行第二查找操作，并且将第一或第二查找操作的结果用于后续处理。一个实现基于查找字来执行查找操作，以生成用于从存储器检索基地址和位图的查找结果。鉴别器被识别，并且基于鉴别器，位图和基地址来生成结果，例如通过向基地址添加位图内的范围中的设置位的数量。

8. 发明授权

US07715419B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US07715419B2
公开(公告)日：2010-05-11
申请号：US11368776
申请日：2006-03-06
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56 , H04J1/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports of a network interface. A high priority buffer and a low priority buffer can be assigned to each port of the network interface. The network interface can perform packet prioritization through buffer selection based on priority. High priority packets will be transmitted to an ingress packet processor before low priority packets for a given port.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者接收来自网络的分组，并通过网络接口的一个或多个连接端口将分组发送到网络。可以将高优先级缓冲区和低优先级缓冲区分配给网络接口的每个端口。网络接口可以通过基于优先级的缓冲区选择来执行分组优先级。高优先级数据包将在给定端口的低优先级数据包之前传输到入口数据包处理器。

9. 发明申请

US20080117913A1 Pipelined Packet Switching and Queuing Architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US20080117913A1
公开(公告)日：2008-05-22
申请号：US11931527
申请日：2007-10-31
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。一旦进行了路由目的地确定，线路卡架构将为要修改的每个接收的分组提供包含新的路由信息和附加的头部数据，以便于通过交换结构的分组传输。线路卡架构进一步提供使用带宽管理技术，以便缓冲和排队每个分组以便通过交换结构传输到相应的目的地端口。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。

10. 发明申请

US20070248110A1 Dynamically switching streams of packets among dedicated and shared queues 有权
标题翻译：在专用和共享队列之间动态切换数据包流
公开(公告)号：US20070248110A1
公开(公告)日：2007-10-25
申请号：US11407805
申请日：2006-04-20
申请人： Doron Oz , Earl Cohen , Eyal Oren
发明人： Doron Oz , Earl Cohen , Eyal Oren
IPC分类号： H04L12/56
CPC分类号： H04L47/10 , H04L47/2408 , H04L47/2441 , H04L49/90 , H04L49/9047
摘要： Streams of packets are dynamically switched among dedicated and shared queues. For example, when a packet stream is in a maintenance mode (such as to keep a tunnel or packet stream associated with a server active) all packet traffic received over a packet stream is directed into the shared queue while the packet stream is not associated with one of the dedicated queues. In response to a detected change in the packet activity status of packet traffic (e.g., the establishment of a call or an increase in packet traffic, especially desirous of individualized quality of service) over a particular packet stream of the packet streams, the particular packet stream is associated with a particular group of dedicated queues such that at least non-control data traffic received over the particular packet stream is subsequently directed into the particular group of dedicated queues while the particular packet stream remains associated with the particular group of dedicated queues.
摘要翻译：数据包流在专用和共享队列之间动态切换。例如，当分组流处于维护模式（例如保持与服务器活动的隧道或分组流相关联）时，通过分组流接收的所有分组流量被引导到共享队列中，而分组流不与其中一个专用队列。响应于分组流的特定分组流检测到分组业务的分组活动状态（例如，建立呼叫或增加分组业务，特别是希望个体化服务质量）的变化，特定分组流与特定组的专用队列相关联，使得至少在特定分组流上接收到的非控制数据业务随后被引导到特定的专用队列组，而特定分组流保持与特定组的专用队列相关联。

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