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1. 发明授权

US06980552B1 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US06980552B1
公开(公告)日：2005-12-27
申请号：US10219460
申请日：2002-08-15
申请人： David Belz , Garry P. Epps , Michael Laor , Eyal Oren
发明人： David Belz , Garry P. Epps , Michael Laor , Eyal Oren
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L47/527 , H04L47/10 , H04L47/21 , H04L47/326 , H04L47/50 , H04L47/6215 , H04L49/1546 , H04L49/205 , H04L49/3009 , H04L49/3018 , H04L49/3063 , H04L49/50 , H04L49/552 , H04L49/602 , H04L49/90 , H04L49/9078
摘要： A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in a multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Using bandwidth management techniques, each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path includes a buffer/queuing circuit similar to that used in the receive path and can include another pipelined switch. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus, congestion avoidance, and bandwidth management hardware.
摘要翻译：用于接收，修改，切换，缓冲，排队和排队数据包以在通信网络中传输的流水线线卡架构。线路卡具有两条路径：从网络将数据包传送到交换机设备的接收路径，以及将交换机传送到网络的数据包的发送路径。在接收路径中，使用可编程数据结构在多级流水线中对接收到的数据包进行处理和切换，以便进行快速表查找和链表遍历。流水线交换机在确定每个数据包的路由目的地时并行操作多个数据包。一旦进行了确定，每个数据包被修改为包含新的路由信息以及额外的标题数据，以帮助通过交换机加速速度。使用带宽管理技术，每个数据包然后被缓冲并排入队列，以便通过交换结构传输到连接到适当目标端口的线卡。目的线路卡可能与接收入站分组或不同物理线卡一样的物理线卡。发送路径包括类似于在接收路径中使用的缓冲器/排队电路，并且可以包括另一流水线开关。使用基于CoS的决策设备，拥塞避免和带宽管理硬件来实现分组的入队和出队。

2. 发明申请

US20060039374A1 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US20060039374A1
公开(公告)日：2006-02-23
申请号：US11242453
申请日：2005-10-03
申请人： David Belz , Garry Epps , Michael Laor , Eyal Oren
发明人： David Belz , Garry Epps , Michael Laor , Eyal Oren
IPC分类号： H04L12/56
CPC分类号： H04L47/527 , H04L47/10 , H04L47/21 , H04L47/326 , H04L47/50 , H04L47/6215 , H04L49/1546 , H04L49/205 , H04L49/3009 , H04L49/3018 , H04L49/3063 , H04L49/50 , H04L49/552 , H04L49/602 , H04L49/90 , H04L49/9078
摘要： A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in a multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Using bandwidth management techniques, each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path includes a buffer/queuing circuit similar to that used in the receive path and can include another pipelined switch. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus, congestion avoidance, and bandwidth management hardware.
摘要翻译：用于接收，修改，切换，缓冲，排队和排队数据包以在通信网络中传输的流水线线卡架构。线路卡具有两条路径：从网络将数据包传送到交换机设备的接收路径，以及将交换机传送到网络的数据包的发送路径。在接收路径中，使用可编程数据结构在多级流水线中对接收到的数据包进行处理和切换，以便进行快速表查找和链表遍历。流水线交换机在确定每个数据包的路由目的地时并行操作多个数据包。一旦进行了确定，每个数据包被修改为包含新的路由信息以及额外的标题数据，以帮助通过交换机加速速度。使用带宽管理技术，每个数据包然后被缓冲并排入队列，以便通过交换结构传输到连接到适当目标端口的线卡。目的线路卡可能与接收入站分组或不同物理线卡一样的物理线卡。发送路径包括类似于在接收路径中使用的缓冲器/排队电路，并且可以包括另一流水线开关。使用基于CoS的决策设备，拥塞避免和带宽管理硬件来实现分组的入队和出队。

3. 发明授权

US07643486B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US07643486B2
公开(公告)日：2010-01-05
申请号：US11242453
申请日：2005-10-03
申请人： David Belz , Garry P. Epps , Michael Laor , Eyal Oren
发明人： David Belz , Garry P. Epps , Michael Laor , Eyal Oren
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L47/527 , H04L47/10 , H04L47/21 , H04L47/326 , H04L47/50 , H04L47/6215 , H04L49/1546 , H04L49/205 , H04L49/3009 , H04L49/3018 , H04L49/3063 , H04L49/50 , H04L49/552 , H04L49/602 , H04L49/90 , H04L49/9078
摘要： A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in a multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Using bandwidth management techniques, each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path includes a buffer/queuing circuit similar to that used in the receive path and can include another pipelined switch. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus, congestion avoidance, and bandwidth management hardware.
摘要翻译：用于接收，修改，切换，缓冲，排队和排队数据包以在通信网络中传输的流水线线卡架构。线路卡具有两条路径：从网络将数据包传送到交换机设备的接收路径，以及将交换机传送到网络的数据包的发送路径。在接收路径中，使用可编程数据结构在多级流水线中对接收到的数据包进行处理和切换，以便进行快速表查找和链表遍历。流水线交换机在确定每个数据包的路由目的地时并行操作多个数据包。一旦进行了确定，每个数据包被修改为包含新的路由信息以及额外的标题数据，以帮助通过交换机加速速度。使用带宽管理技术，每个数据包然后被缓冲并排入队列，以便通过交换结构传输到连接到适当目标端口的线卡。目的线路卡可能与接收入站分组或不同物理线卡一样的物理线卡。发送路径包括类似于在接收路径中使用的缓冲器/排队电路，并且可以包括另一流水线开关。使用基于CoS的决策设备，拥塞避免和带宽管理硬件来实现分组的入队和出队。

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