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1. 发明申请

US20070195777A1 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US20070195777A1
公开(公告)日：2007-08-23
申请号：US11368776
申请日：2006-03-06
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04J3/16 , H04L12/28 , H04J3/22 , H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。一旦进行了路由目的地确定，线路卡架构将为要修改的每个接收的分组提供包含新的路由信息和附加的头部数据，以便于通过交换结构的分组传输。线路卡架构进一步提供使用带宽管理技术，以便缓冲和排队每个分组以便通过交换结构传输到相应的目的地端口。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。

2. 发明申请

US20070195773A1 Pipelined packet switching and queuing architecture 有权
公开(公告)号：US20070195773A1
公开(公告)日：2007-08-23
申请号：US11358860
申请日：2006-02-21
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

3. 发明申请

US20070195778A1 Pipelined packet switching and queuing architecture 有权
公开(公告)号：US20070195778A1
公开(公告)日：2007-08-23
申请号：US11369125
申请日：2006-03-06
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04J3/22 , H04L12/28 , H04J3/16 , H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

4. 发明申请

US20070195761A1 Pipelined packet switching and queuing architecture 有权
公开(公告)号：US20070195761A1
公开(公告)日：2007-08-23
申请号：US11365017
申请日：2006-03-01
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56 , H04J3/22 , H04L12/28 , H04J3/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

5. 发明申请

US20060277346A1 Port adapter for high-bandwidth bus 有权
标题翻译：用于高带宽总线的端口适配器
公开(公告)号：US20060277346A1
公开(公告)日：2006-12-07
申请号：US11502965
申请日：2006-08-11
申请人： David Doak , Garry Epps , Guy Fedorkow , Mark Gustlin , Steven Holmes , Randall Johnson , Promode Nedungadi , John Prokopik , Mohammed Tatar , Michael Taylor
发明人： David Doak , Garry Epps , Guy Fedorkow , Mark Gustlin , Steven Holmes , Randall Johnson , Promode Nedungadi , John Prokopik , Mohammed Tatar , Michael Taylor
IPC分类号： G06F13/14
CPC分类号： H04L12/5692 , G06F13/387 , H04J3/1617 , Y10S370/912
摘要： A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a control bus coupled to the host system for controlling and monitoring the port adapter; and interface logic that interfaces the SPI-4 bus and the control bus to the network interfaces. Methods are provided for selecting and using one of a small plurality of different packet formats for various networking technologies, so that the port adapter can hide details of the technology that it handles from the host system, and for operating the host system's SPI-4 bus at one of several speeds based on bandwidth requirements of the port adapter.
摘要翻译：公开了一种用于将零个或多个网络接口连接到具有SPI-4总线的主机系统的端口适配器。端口适配器包括零个或多个网络接口; 耦合到主机系统的SPI-4总线以在主机和网络接口之间提供通信信道; 耦合到所述主机系统的用于控制和监视所述端口适配器的控制总线; 以及将SPI-4总线和控制总线连接到网络接口的接口逻辑。提供了用于选择和使用用于各种联网技术的小的多种不同分组格式之一的方法，使得端口适配器可以隐藏其从主机系统处理的技术的细节，并且用于操作主机系统的SPI-4总线基于端口适配器的带宽要求，以几种速度之一。

6. 发明申请

US20070283073A1 Port adapter for high-bandwidth bus 有权
标题翻译：用于高带宽总线的端口适配器
公开(公告)号：US20070283073A1
公开(公告)日：2007-12-06
申请号：US11818006
申请日：2007-06-12
申请人： David Doak , Garry Epps , Guy Fedorkow , Mark Gustlin , Steven Holmes , Randall Johnson , Promode Nedungadi , Mohammed Tatar
发明人： David Doak , Garry Epps , Guy Fedorkow , Mark Gustlin , Steven Holmes , Randall Johnson , Promode Nedungadi , Mohammed Tatar
IPC分类号： G06F13/14
CPC分类号： H04L12/5692 , G06F13/387 , H04J3/1617 , Y10S370/912
摘要： A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a control bus coupled to the host system for controlling and monitoring the port adapter; and interface logic that interfaces the SPI-4 bus and the control bus to the network interfaces. Methods are provided for selecting and using one of a small plurality of different packet formats for various networking technologies, so that the port adapter can hide details of the technology that it handles from the host system, and for operating the host system's SPI-4 bus at one of several speeds based on bandwidth requirements of the port adapter.
摘要翻译：公开了一种用于将零个或多个网络接口连接到具有SPI-4总线的主机系统的端口适配器。端口适配器包括零个或多个网络接口; 耦合到主机系统的SPI-4总线以在主机和网络接口之间提供通信信道; 耦合到所述主机系统的用于控制和监视所述端口适配器的控制总线; 以及将SPI-4总线和控制总线连接到网络接口的接口逻辑。提供了用于选择和使用用于各种联网技术的小的多种不同分组格式之一的方法，使得端口适配器可以隐藏其从主机系统处理的技术的细节，以及用于操作主机系统的SPI-4总线基于端口适配器的带宽要求，以几种速度之一。

7. 发明申请

US20050149651A1 Port adapter for high-bandwidth bus 有权
标题翻译：用于高带宽总线的端口适配器
公开(公告)号：US20050149651A1
公开(公告)日：2005-07-07
申请号：US10680842
申请日：2003-10-06
申请人： David Doak , Garry Epps , Guy Fedorkow , Mark Gustlin , Steven Holmes , Randall Johnson , Promode Nedungadi , John Prokopik , Mohammed Tatar , Michael Taylor
发明人： David Doak , Garry Epps , Guy Fedorkow , Mark Gustlin , Steven Holmes , Randall Johnson , Promode Nedungadi , John Prokopik , Mohammed Tatar , Michael Taylor
IPC分类号： G06F3/00 , G06F13/38 , G06F13/40 , H04L12/28
CPC分类号： H04L12/5692 , G06F13/387 , H04J3/1617 , Y10S370/912
摘要： A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a control bus coupled to the host system for controlling and monitoring the port adapter; and interface logic that interfaces the SPI-4 bus and the control bus to the network interfaces. Methods are provided for selecting and using one of a small plurality of different packet formats for various networking technologies, so that the port adapter can hide details of the technology that it handles from the host system, and for operating the host system's SPI-4 bus at one of several speeds based on bandwidth requirements of the port adapter.
摘要翻译：公开了一种用于将零个或多个网络接口连接到具有SPI-4总线的主机系统的端口适配器。端口适配器包括零个或多个网络接口; 耦合到主机系统的SPI-4总线以在主机和网络接口之间提供通信信道; 耦合到所述主机系统的用于控制和监视所述端口适配器的控制总线; 以及将SPI-4总线和控制总线连接到网络接口的接口逻辑。提供了用于选择和使用用于各种联网技术的小的多种不同分组格式之一的方法，使得端口适配器可以隐藏其从主机系统处理的技术的细节，并且用于操作主机系统的SPI-4总线基于端口适配器的带宽要求，以几种速度之一。

8. 发明申请

US20070165638A1 System and method for routing data over an internet protocol security network 审中-公开
标题翻译：通过互联网协议安全网络路由数据的系统和方法
公开(公告)号：US20070165638A1
公开(公告)日：2007-07-19
申请号：US11331709
申请日：2006-01-13
申请人： Naader Hasani , Mohammed Tatar
发明人： Naader Hasani , Mohammed Tatar
IPC分类号： H04L12/56
CPC分类号： H04L47/10 , H04L47/2408 , H04L47/2441 , H04L47/34 , H04L49/90 , H04L49/9094 , H04L63/164
摘要： A method of routing data over an Internet Protocol security (IPSec) network, the method comprising: receiving packets for transmission over the IPSec network, controlling the order of processing of the packets, determining whether each packet requires security features, feeding of the packets to a post-queue line interface module according to the order of processing the packets and allocating a sequence number to each packet in the order of feeding of packets to the post-queue line interface module. A packet requiring security features are provided with such features, which may be AH or ESP protocol, before it is transmitted over the Internet Protocol security network. As the queueing of the packet is done before the packet is provided with security features, the quality of service of the IPSec network is improved with the packets being received at the anti-replay window according to the order of the allocated sequence numbers.
摘要翻译：一种通过互联网协议安全（IPSec）网络路由数据的方法，所述方法包括：接收分组以在IPSec网络上传输，控制分组的处理顺序，确定每个分组是否需要安全特征，分组的馈送根据处理分组的顺序的后队列线路接口模块，并且按照将分组馈送到队列后线路接口模块的顺序向每个分组分配序列号。在通过因特网协议安全网络发送之前，需要安全特征的分组具有这样的特征，其可以是AH或ESP协议。由于在分组具有安全特征之前完成分组的排队，所以根据所分配的序列号的顺序，在反重放窗口接收到分组时，提高了IPSec网络的服务质量。

9. 发明授权

US08982910B1 Fixed generic mapping of client data to optical transport frame 有权
标题翻译：固定客户端数据到光传输帧的通用映射
公开(公告)号：US08982910B1
公开(公告)日：2015-03-17
申请号：US13079833
申请日：2011-04-05
申请人： Qian Zhang , Mohammed Tatar , Gary Nicholl , Tim Webster , Christopher Chan
发明人： Qian Zhang , Mohammed Tatar , Gary Nicholl , Tim Webster , Christopher Chan
IPC分类号： H04J3/06 , H04L12/931
CPC分类号： H04L49/00
摘要： A fixed Generic Mapping Procedure (GMP) apparatus and method are provided to map client data to an optical transport frame. Client data to be mapped into a payload field of an optical transport frame is received and store in a memory. Timing information is generated based on bit and fractional bit granularity of client data mapped into the payload field of successive optical transport frames for use in recovering the client data from received optical transport frames.
摘要翻译：提供了固定的通用映射过程（GMP）装置和方法来将客户端数据映射到光传输帧。要映射到光传输帧的有效载荷字段的客户端数据被接收并存储在存储器中。基于映射到连续光传输帧的有效载荷字段的客户端数据的位和分数位粒度来生成定时信息，以用于从接收的光传输帧恢复客户数据。

10. 发明申请

US20060193256A1 Method and system for shaping traffic in a parallel queuing hierarchy 有权
公开(公告)号：US20060193256A1
公开(公告)日：2006-08-31
申请号：US11069738
申请日：2005-02-28
申请人： Barry Burns , Brian Hiltscher , Mohammed Tatar , Tim Webster
发明人： Barry Burns , Brian Hiltscher , Mohammed Tatar , Tim Webster
IPC分类号： G01R31/08
CPC分类号： H04L49/90 , H04L47/10 , H04L47/215 , H04L47/50 , H04L47/60 , H04L47/6215 , H04L49/9047
摘要： A method and system for shaping traffic in a multi-level queuing hierarchy are disclosed. The hierarchy includes a high priority channel and a low priority channel, wherein traffic on the low priority channel is fragmented and interleaved with traffic from the high priority channel and traffic combined from the high priority and low priority channels has a maximum shape rate. The method includes linking a high priority token bucket to a low priority token bucket, transmitting data from the high priority channel, and decrementing the low priority token bucket by an amount corresponding to the data transmitted. Data is transmitted from the low priority channel only if the low priority bucket has available tokens.

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