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1. 发明授权

US07941605B1 Methods and apparatus for generating a result based on a lookup result from a lookup operation using an associative memory and processing based on a discriminator portion of a lookup word 有权
标题翻译：基于使用关联存储器的查找操作的查找结果和基于查找字的鉴别器部分的处理来生成结果的方法和装置
公开(公告)号：US07941605B1
公开(公告)日：2011-05-10
申请号：US10286007
申请日：2002-11-01
申请人： Eyal Oren , Oded Trainin , Gil Goren
发明人： Eyal Oren , Oded Trainin , Gil Goren
IPC分类号： G06F12/00
CPC分类号： G06F17/30982 , H04L69/22
摘要： Methods and apparatus are disclosed for generating a result based on a lookup result from a lookup operation using an associative memory and processing based on a discriminator portion of a lookup word. A first lookup operation is performed to generate a lookup result. In one implementation, a second lookup operation is performed based on a discriminator or the lookup result depending on the result of an evaluation, such as whether there was a hit or the lookup result matches a predetermined value. In one implementation, a second lookup operation is performed based on the discriminator, and either the result of the first or second lookup operation is used for subsequent processing. One implementation performs a lookup operation based on a lookup word to generate a lookup result, which is used to retrieve a base address and a bitmap from a memory. A discriminator is identified, and the result is generated based on the discriminator, the bitmap, and the base address, such as by adding to the base address the number of set bits in a range within the bitmap.
摘要翻译：公开了用于基于来自使用关联存储器的查找操作的查找结果和基于查找词的鉴别器部分的处理来生成结果的方法和装置。执行第一查找操作以生成查找结果。在一个实现中，根据鉴别器或查找结果执行第二查找操作，这取决于评估的结果，例如是否存在命中或查找结果与预定值相匹配。在一个实现中，基于鉴别器执行第二查找操作，并且将第一或第二查找操作的结果用于后续处理。一个实现基于查找字来执行查找操作，以生成用于从存储器检索基地址和位图的查找结果。鉴别器被识别，并且基于鉴别器，位图和基地址来生成结果，例如通过向基地址添加位图内的范围中的设置位的数量。

2. 发明授权

US07729351B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US07729351B2
公开(公告)日：2010-06-01
申请号：US11365017
申请日：2006-03-01
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56 , H04J1/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets. These features can include a recycle path coupling a gather stage circuit and a fetch stage circuit and can include sequence number logic configured to associate sequence numbers with multicast packet headers.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。这些特征可以包括耦合收集阶段电路和获取级电路的再循环路径，并且可以包括被配置为将序列号与多播分组报头相关联的序列号逻辑。

3. 发明申请

US20070195773A1 Pipelined packet switching and queuing architecture 有权
公开(公告)号：US20070195773A1
公开(公告)日：2007-08-23
申请号：US11358860
申请日：2006-02-21
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

4. 发明授权

US08571024B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US08571024B2
公开(公告)日：2013-10-29
申请号：US12952601
申请日：2010-11-23
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/28 , H04J1/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。一旦进行了路由目的地确定，线路卡架构将为要修改的每个接收的分组提供包含新的路由信息和附加的头部数据，以便于通过交换结构的分组传输。线路卡架构进一步提供使用带宽管理技术，以便缓冲和排队每个分组以便通过交换结构传输到相应的目的地端口。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。

5. 发明授权

US07864791B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US07864791B2
公开(公告)日：2011-01-04
申请号：US11931527
申请日：2007-10-31
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56 , H04J1/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。一旦进行了路由目的地确定，线路卡架构将为要修改的每个接收的分组提供包含新的路由信息和附加的头部数据，以便于通过交换结构的分组传输。线路卡架构进一步提供使用带宽管理技术，以便缓冲和排队每个分组以便通过交换结构传输到相应的目的地端口。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。

6. 发明授权

US07715419B2 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US07715419B2
公开(公告)日：2010-05-11
申请号：US11368776
申请日：2006-03-06
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56 , H04J1/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports of a network interface. A high priority buffer and a low priority buffer can be assigned to each port of the network interface. The network interface can perform packet prioritization through buffer selection based on priority. High priority packets will be transmitted to an ingress packet processor before low priority packets for a given port.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者接收来自网络的分组，并通过网络接口的一个或多个连接端口将分组发送到网络。可以将高优先级缓冲区和低优先级缓冲区分配给网络接口的每个端口。网络接口可以通过基于优先级的缓冲区选择来执行分组优先级。高优先级数据包将在给定端口的低优先级数据包之前传输到入口数据包处理器。

7. 发明申请

US20080117913A1 Pipelined Packet Switching and Queuing Architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US20080117913A1
公开(公告)日：2008-05-22
申请号：US11931527
申请日：2007-10-31
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。一旦进行了路由目的地确定，线路卡架构将为要修改的每个接收的分组提供包含新的路由信息和附加的头部数据，以便于通过交换结构的分组传输。线路卡架构进一步提供使用带宽管理技术，以便缓冲和排队每个分组以便通过交换结构传输到相应的目的地端口。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。

8. 发明申请

US20070195761A1 Pipelined packet switching and queuing architecture 有权
公开(公告)号：US20070195761A1
公开(公告)日：2007-08-23
申请号：US11365017
申请日：2006-03-01
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04L12/56 , H04J3/22 , H04L12/28 , H04J3/16
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

9. 发明授权

US07809009B2 Pipelined packet switching and queuing architecture 有权
公开(公告)号：US07809009B2
公开(公告)日：2010-10-05
申请号：US11358860
申请日：2006-02-21
申请人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed I. Tatar , Garry P. Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04J1/16 , H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

10. 发明申请

US20070195777A1 Pipelined packet switching and queuing architecture 有权
标题翻译：流水线分组交换和排队架构
公开(公告)号：US20070195777A1
公开(公告)日：2007-08-23
申请号：US11368776
申请日：2006-03-06
申请人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
发明人： Mohammed Tatar , Garry Epps , Oded Trainin , Eyal Oren , Cedrik Begin
IPC分类号： H04J3/16 , H04L12/28 , H04J3/22 , H04L12/56
CPC分类号： H04L49/1546 , H04L49/201 , H04L49/3045 , H04L49/3063 , H04L49/3072 , H04L49/503 , H04L49/506
摘要： An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.
摘要翻译：提供了一种网络路由设备中线路卡的架构。线路卡架构在路由设备和网络之间提供双向接口，两者都接收来自网络的分组，并通过一个或多个连接端口将分组发送到网络。在接收和发送路径中，提供了可以同时在多个分组上操作以确定每个分组的路由目的地的多级并行流水线中的分组处理和路由。一旦进行了路由目的地确定，线路卡架构将为要修改的每个接收的分组提供包含新的路由信息和附加的头部数据，以便于通过交换结构的分组传输。线路卡架构进一步提供使用带宽管理技术，以便缓冲和排队每个分组以便通过交换结构传输到相应的目的地端口。线路卡架构的传输路径进一步包含用于组播数据包的处理和复制的附加功能。

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