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1. 发明授权

US09087200B2 Method and apparatus to provide secure application execution 有权
标题翻译：提供安全应用程序执行的方法和装置
公开(公告)号：US09087200B2
公开(公告)日：2015-07-21
申请号：US13527547
申请日：2012-06-19
申请人： Francis X. McKeen , Carlos V. Rozas , Uday R. Savagaonkar , Simon P. Johnson , Vincent Scarlata , Michael A. Goldsmith , Ernie Brickell , Jiang Tao Li , Howard C. Herbert , Prashant Dewan , Stephen J. Tolopka , Gilbert Neiger , David Durham , Gary Graunke , Bernard Lint , Don A. Van Dyke , Joseph Cihula , Stalinselvaraj Jeyasingh , Stephen R. Van Doren , Dion Rodgers , John Garney , Asher Altman
发明人： Francis X. McKeen , Carlos V. Rozas , Uday R. Savagaonkar , Simon P. Johnson , Vincent Scarlata , Michael A. Goldsmith , Ernie Brickell , Jiang Tao Li , Howard C. Herbert , Prashant Dewan , Stephen J. Tolopka , Gilbert Neiger , David Durham , Gary Graunke , Bernard Lint , Don A. Van Dyke , Joseph Cihula , Stalinselvaraj Jeyasingh , Stephen R. Van Doren , Dion Rodgers , John Garney , Asher Altman
IPC分类号： G06F21/72 , G06F21/60 , G06F21/53 , G06F12/14
CPC分类号： G06F21/60 , G06F21/53 , G06F21/72
摘要： A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.
摘要翻译：一种在计算机系统内实现安全应用和数据完整性的技术。在一个实施例中，建立一个或多个安全空间，其中可以存储和执行应用和数据。

2. 发明申请

US20130159726A1 METHOD AND APPARATUS TO PROVIDE SECURE APPLICATION EXECUTION 有权
标题翻译：提供安全应用执行的方法和设备
公开(公告)号：US20130159726A1
公开(公告)日：2013-06-20
申请号：US13527547
申请日：2012-06-19
申请人： Francis X. MCKEEN , Carlos V. Rozas , Uday R. Savagaonkar , Simon P. Johnson , Vincent Scarlata , Michael A. Goldsmith , Ernie Brickell , Jiang Tao Li , Howard C. Herbert , Prashant Dewan , Stephen J. Tolopka , Gilbert Neiger , David Durham , Gary Graunke , Bernard Lint , Don A. Van Dyke , Joseph Cihula , Stalinselvaraj Jeyasingh , Stephen R. Van Doren , Dion Rodgers , John Garney , Asher Altman
发明人： Francis X. MCKEEN , Carlos V. Rozas , Uday R. Savagaonkar , Simon P. Johnson , Vincent Scarlata , Michael A. Goldsmith , Ernie Brickell , Jiang Tao Li , Howard C. Herbert , Prashant Dewan , Stephen J. Tolopka , Gilbert Neiger , David Durham , Gary Graunke , Bernard Lint , Don A. Van Dyke , Joseph Cihula , Stalinselvaraj Jeyasingh , Stephen R. Van Doren , Dion Rodgers , John Garney , Asher Altman
IPC分类号： G06F21/72
CPC分类号： G06F21/60 , G06F21/53 , G06F21/72
摘要： A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.
摘要翻译：一种在计算机系统内实现安全应用和数据完整性的技术。在一个实施例中，建立一个或多个安全空间，其中可以存储和执行应用和数据。

3. 发明授权

US06904515B1 Multi-instruction set flag preservation apparatus and method 有权
标题翻译：多指令集标志保存装置及方法
公开(公告)号：US06904515B1
公开(公告)日：2005-06-07
申请号：US09436882
申请日：1999-11-09
申请人： Don A. Van Dyke
发明人： Don A. Van Dyke
IPC分类号： G06F9/455
CPC分类号： G06F9/45537
摘要： A method and apparatus for processing program instructions, utilizes native fixed length instructions that include at least one flag modification enable bit. The flag modification enable bit is typically sent with the operation code and other information in the native instruction and is set to allow updating of one or more flags, such as stored in flag registers, associated with non-native instructions, such as variable length instructions. In addition, a flag modification enable bit may be set to preserve flag bit setting for variable length instructions that are emulated using the fixed length native instructions, to prevent overwriting of flag settings during emulation of variable length instructions.
摘要翻译：一种用于处理程序指令的方法和装置，利用包括至少一个标志修改使能位的本地固定长度指令。标志修改使能位通常与本地指令中的操作码和其他信息一起发送，并且被设置为允许更新与非本地指令相关联的一个或多个标志，例如存储在标志寄存器中，诸如可变长度指令。此外，可以设置标志修改使能位以保持使用固定长度本机指令来仿真的可变长度指令的标志位设置，以防止在可变长度指令的仿真期间重写标志设置。

4. 发明授权

US06195676B1 Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes 失效
标题翻译：用于实现进程分配调度的多处理器操作系统程序中用户端调度的方法和装置
公开(公告)号：US06195676B1
公开(公告)日：2001-02-27
申请号：US08003000
申请日：1993-01-11
申请人： George A. Spix , Diane M. Wengelski , Stuart W. Hawkinson , Mark D. Johnson , Jeremiah D. Burke , Keith J. Thompson , Gregory G. Gaertner , Giacomo G. Brussino , Richard E. Hessel , David M. Barkai , Steve S. Chen , Steven G. Oslon , Robert E. Strout, II , Jon A. Masamitsu , David M. Cox , Linda J. O'Gara , Kelly T. O'Hair , David A. Seberger , James C. Rasbold , Timothy J. Cramer , Don A. Van Dyke , Ashok Chandramouli
发明人： George A. Spix , Diane M. Wengelski , Stuart W. Hawkinson , Mark D. Johnson , Jeremiah D. Burke , Keith J. Thompson , Gregory G. Gaertner , Giacomo G. Brussino , Richard E. Hessel , David M. Barkai , Steve S. Chen , Steven G. Oslon , Robert E. Strout, II , Jon A. Masamitsu , David M. Cox , Linda J. O'Gara , Kelly T. O'Hair , David A. Seberger , James C. Rasbold , Timothy J. Cramer , Don A. Van Dyke , Ashok Chandramouli
IPC分类号： G06F946
CPC分类号： G06F9/30149 , G06F8/41 , G06F8/433 , G06F8/445 , G06F8/45 , G06F9/30021 , G06F9/30094 , G06F9/3802 , G06F9/3804 , G06F9/3834 , G06F9/3836 , G06F9/3838 , G06F9/3855 , G06F9/4881 , G06F11/3664 , G06F12/023 , G06F12/08 , G06F12/12 , G06F15/17381 , G06F15/8076 , G06F15/8092
摘要： An integrated software architecture for a highly parallel multiprocessor system having multiple tightly-coupled processors that share a common memory efficiently controls the interface with and execution of programs on such a multiprocessor system. The software architecture combines a symmetrically integrated multithreaded operating system and an integrated parallel user environment. The operating system distributively implements an anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources. The user environment provides a common visual representation for a plurality of program development tools that provide compilation, execution and debugging capabilities for multithreaded user programs and assumes parallelism as the standard mode of operation.
摘要翻译：具有共享公用存储器的多个紧密耦合处理器的高度并行多处理器系统的集成软件架构有效地控制与这种多处理器系统上的程序的接口和执行。软件架构结合了对称集成的多线程操作系统和集成并行用户环境。操作系统通过允许每个处理器访问存储在公共存储器中的操作系统的单个映像来分布式地实现用于进程和资源的调度的基于无政府状态的调度模型，该公共存储器在公共操作系统共享资源集合上操作。用户环境为多个程序开发工具提供了通用的可视化表示，为多线程用户程序提供编译，执行和调试功能，并假设并行性作为标准操作模式。

5. 发明授权

US5430884A Scalar/vector processor 失效
标题翻译：标量/矢量处理器
公开(公告)号：US5430884A
公开(公告)日：1995-07-04
申请号：US536409
申请日：1990-06-11
申请人： Douglas R. Beard , Andrew E. Phelps , Michael A. Woodmansee , Richard G. Blewett , Jeffrey A. Lohman , Alexander A. Silbey , George A. Spix , Frederick J. Simmons , Don A. Van Dyke
发明人： Douglas R. Beard , Andrew E. Phelps , Michael A. Woodmansee , Richard G. Blewett , Jeffrey A. Lohman , Alexander A. Silbey , George A. Spix , Frederick J. Simmons , Don A. Van Dyke
IPC分类号： G06F12/06 , G06F9/30 , G06F9/32 , G06F9/38 , G06F9/44 , G06F9/45 , G06F11/36 , G06F15/16 , G06F15/173 , G06F15/78 , G06F15/80 , G06F17/16
CPC分类号： G06F9/30087 , G06F11/3632 , G06F15/17381 , G06F15/8076 , G06F15/8092 , G06F8/433 , G06F8/45 , G06F9/30021 , G06F9/3004 , G06F9/30094 , G06F9/3013 , G06F9/30138 , G06F9/30141 , G06F9/30149 , G06F9/3802 , G06F9/3804 , G06F9/3814 , G06F9/3816 , G06F9/3828 , G06F9/3834 , G06F9/3836 , G06F9/3838 , G06F9/3846 , G06F9/3855 , G06F9/3857 , G06F9/3875 , G06F9/3885
摘要： The present invention is an improved high performance scalar/vector processor. In the preferred embodiment, the scalar/vector processor is used in a multiprocessor system. The scalar/vector processor is comprised of a scalar processor for operating on scalar and logical instructions, including a plurality of independent functional units operably connected to the scalar processor, a vector processor for operating on vector instructions, including a plurality of independent functional units operably connected to the vector processor, and an instruction control mechanism for fetching both the scalar and vector instructions from an instruction cache and controlling the operation of those instructions in both the scalar and vector processor. The instruction control mechanism is designed to enhance the performance of the scalar/vector processor by keeping a multiplicity of pipelines substantially filled with a minimum number of gaps.
摘要翻译：本发明是一种改进的高性能标量/向量处理器。在优选实施例中，在多处理器系统中使用标量/向量处理器。标量/矢量处理器包括用于对标量和逻辑指令进行操作的标量处理器，包括可操作地连接到标量处理器的多个独立功能单元，用于在矢量指令上操作的矢量处理器，包括多个独立的功能单元，连接到向量处理器，以及指令控制机制，用于从指令高速缓存取出标量和向量指令，并控制标量和向量处理器中的这些指令的操作。指令控制机制旨在通过保持基本上填充有最小数量的间隙的多个管线来增强标量/向量处理器的性能。

6. 发明授权

US5179702A System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling 失效
标题翻译：用于使用基于无政府状态的调度器来控制并行执行线程调度的高度并行多处理器的系统和方法
公开(公告)号：US5179702A
公开(公告)日：1993-01-12
申请号：US537466
申请日：1990-06-11
申请人： George A. Spix , Diane M. Wengelski , Stuart W. Hawkinson , Mark D. Johnson , Jeremiah D. Burke , Keith J. Thompson , Gregory G. Gaertner , Giacomo G. Brussino , Richard E. Hessel , David M. Barkai , Steve S. Chen , Steven G. Oslon , Robert E. Strout, II , Jon A. Masamitsu , David M. Cox , Linda J. O'Gara , Kelly T. O'Hair , David A. Seberger , James C. Rasbold , Timothy J. Cramer , Don A. Van Dyke , Ashok Chandramouli
发明人： George A. Spix , Diane M. Wengelski , Stuart W. Hawkinson , Mark D. Johnson , Jeremiah D. Burke , Keith J. Thompson , Gregory G. Gaertner , Giacomo G. Brussino , Richard E. Hessel , David M. Barkai , Steve S. Chen , Steven G. Oslon , Robert E. Strout, II , Jon A. Masamitsu , David M. Cox , Linda J. O'Gara , Kelly T. O'Hair , David A. Seberger , James C. Rasbold , Timothy J. Cramer , Don A. Van Dyke , Ashok Chandramouli
IPC分类号： G06F9/06 , G06F9/30 , G06F9/32 , G06F9/38 , G06F9/44 , G06F9/45 , G06F9/46 , G06F9/48 , G06F11/28 , G06F11/36 , G06F12/02 , G06F12/08 , G06F12/12 , G06F15/16 , G06F15/167 , G06F15/173 , G06F15/78 , G06F15/80
CPC分类号： G06F9/30149 , G06F11/3664 , G06F12/023 , G06F12/08 , G06F12/12 , G06F15/17381 , G06F15/8076 , G06F15/8092 , G06F8/41 , G06F8/433 , G06F8/445 , G06F8/45 , G06F9/30021 , G06F9/30094 , G06F9/3802 , G06F9/3804 , G06F9/3834 , G06F9/3836 , G06F9/3838 , G06F9/3855 , G06F9/4881
摘要： An integrated software architecture for a highly parallel multiprocessor system having multiple tightly-coupled processors that share a common memory efficiently controls the interface with and execution of programs on such a multiprocessor system. The software architecture combines a symmetrically integrated multithreaded operating system and an integrated parallel user environment. The operating system distributively implements an anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources. The user environment provides a common visual representation for a plurality of program development tools that provide compilation, execution and debugging capabilities for multithreaded user programs and assumes parallelism as the standard mode of operation.
摘要翻译：具有共享公用存储器的多个紧密耦合处理器的高度并行多处理器系统的集成软件架构有效地控制与这种多处理器系统上的程序的接口和执行。软件架构结合了对称集成的多线程操作系统和集成并行用户环境。操作系统通过允许每个处理器访问存储在公共存储器中的操作系统的单个映像来分布式地实现用于进程和资源的调度的基于无政府状态的调度模型，该公共存储器在公共操作系统共享资源集合上操作。用户环境为多个程序开发工具提供了通用的可视化表示，为多线程用户程序提供编译，执行和调试功能，并假设并行性作为标准操作模式。

7. 发明申请

US20130219154A1 CONTEXT STATE MANAGEMENT FOR PROCESSOR FEATURE SETS 有权
公开(公告)号：US20130219154A1
公开(公告)日：2013-08-22
申请号：US13837923
申请日：2013-03-15
申请人： Don A. Van Dyke , Michael Mishaeli , Ittai Anati , Baiju V. Patel , Will Deutsch , Rajesh Shah , Gilbert Neiger , James B. Crossland , Chris J. Newburn , Bryant E. Bigbee , Muhammad Faisal Azeem , John L. Reid , Dion Rodgers
发明人： Don A. Van Dyke , Michael Mishaeli , Ittai Anati , Baiju V. Patel , Will Deutsch , Rajesh Shah , Gilbert Neiger , James B. Crossland , Chris J. Newburn , Bryant E. Bigbee , Muhammad Faisal Azeem , John L. Reid , Dion Rodgers
IPC分类号： G06F9/30
CPC分类号： G06F9/30043 , G06F9/30003 , G06F9/30101 , G06F9/461
摘要： Embodiments of an invention related to context state management based on processor features are disclosed. In one embodiment, a processor includes instruction logic and state management logic. The instruction logic is to receive a state management instruction having a parameter to identify a subset of the features supported by the processor. The state management logic is to perform a state management operation specified by the state management instruction.

8. 发明授权

US08381223B2 Method and apparatus for dynamic allocation of processing resources 有权
标题翻译：用于动态分配处理资源的方法和装置
公开(公告)号：US08381223B2
公开(公告)日：2013-02-19
申请号：US13190253
申请日：2011-07-25
申请人： Korbin Van Dyke , Paul W Campbell , Don A. Van Dyke , Ali Alasti , Stephen C. Purcell
发明人： Korbin Van Dyke , Paul W Campbell , Don A. Van Dyke , Ali Alasti , Stephen C. Purcell
IPC分类号： G06F9/46 , G06F15/16 , G06F15/76
CPC分类号： G06F9/5044
摘要： A method and apparatus for dynamic allocation of processing resources and tasks, including multimedia tasks. Tasks are queued, available processing resources are identified, and the available processing resources are allocated among the tasks. The available processing resources are provided with functional programs corresponding to the tasks. The tasks are performed using available processing resources to produce resulting data, and the resulting data is passed to an input/output device.
摘要翻译：一种用于动态分配处理资源和任务的方法和装置，包括多媒体任务。任务排队，识别可用的处理资源，并在任务之间分配可用的处理资源。可用的处理资源具有与任务相对应的功能程序。使用可用的处理资源执行任务以产生结果数据，并将所得到的数据传递到输入/输出设备。

9. 发明授权

US5745721A Partitioned addressing apparatus for vector/scalar registers 失效
标题翻译：用于向量/标量寄存器的分区寻址装置
公开(公告)号：US5745721A
公开(公告)日：1998-04-28
申请号：US485017
申请日：1995-06-07
申请人： Douglas R. Beard , Andrew E. Phelps , Michael A. Woodmansee , Richard G. Blewett , Jeffrey A. Lohman , Alexander A. Silbey , George A. Spix , Frederick J. Simmons , Don A. Van Dyke
发明人： Douglas R. Beard , Andrew E. Phelps , Michael A. Woodmansee , Richard G. Blewett , Jeffrey A. Lohman , Alexander A. Silbey , George A. Spix , Frederick J. Simmons , Don A. Van Dyke
IPC分类号： G06F12/06 , G06F9/30 , G06F9/32 , G06F9/38 , G06F9/44 , G06F9/45 , G06F11/36 , G06F15/16 , G06F15/173 , G06F15/78 , G06F15/80 , G06F17/16 , G06F9/00
CPC分类号： G06F9/30087 , G06F11/3632 , G06F15/17381 , G06F15/8076 , G06F15/8092 , G06F8/433 , G06F8/45 , G06F9/30021 , G06F9/3004 , G06F9/30094 , G06F9/3013 , G06F9/30138 , G06F9/30141 , G06F9/30149 , G06F9/3802 , G06F9/3804 , G06F9/3814 , G06F9/3816 , G06F9/3828 , G06F9/3834 , G06F9/3836 , G06F9/3838 , G06F9/3846 , G06F9/3855 , G06F9/3857 , G06F9/3875 , G06F9/3885
摘要： A scalar/vector processor capable of concurrent scaler and vector operations includes scalar resources to process scalar instructions, and vector resources adapted to be operated concurrently with the scalar resources and with one another to process vector instructions. The scalar resources include scalar registers, and the vector resources include vector registers. Decoding means decodes each of a number of address fields. Each field represents a register address to access alternatively one of the scalar registers or one of the vector registers depending on a value of the register address being above or below a selected moveable address value within a range of addresses encompassed by the address field.
摘要翻译：能够进行并行缩放和向量操作的标量/向量处理器包括用于处理标量指令的标量资源，以及适于与标量资源并行操作并且彼此处理向量指令的向量资源。标量资源包括标量寄存器，矢量资源包括向量寄存器。解码意味着解码多个地址字段中的每一个。每个字段表示寄存器地址，以根据地址字段包含的地址范围内的所选择的可移动地址值高于或低于寄存器地址的值来选择一个标量寄存器或一个向量寄存器。

10. 发明授权

US5640524A Method and apparatus for chaining vector instructions 失效
标题翻译：用于链接向量指令的方法和装置
公开(公告)号：US5640524A
公开(公告)日：1997-06-17
申请号：US395320
申请日：1995-02-28
申请人： Douglas R. Beard , Andrew E. Phelps , Michael A. Woodmansee , Richard G. Blewett , Jeffrey A. Lohman , Alexander A. Silbey , George A. Spix , Frederick J. Simmons , Don A. Van Dyke
发明人： Douglas R. Beard , Andrew E. Phelps , Michael A. Woodmansee , Richard G. Blewett , Jeffrey A. Lohman , Alexander A. Silbey , George A. Spix , Frederick J. Simmons , Don A. Van Dyke
IPC分类号： G06F12/06 , G06F9/30 , G06F9/32 , G06F9/38 , G06F9/44 , G06F9/45 , G06F11/36 , G06F15/16 , G06F15/173 , G06F15/78 , G06F15/80 , G06F17/16 , G06F12/00
CPC分类号： G06F9/30087 , G06F11/3632 , G06F15/17381 , G06F15/8076 , G06F15/8092 , G06F8/433 , G06F8/45 , G06F9/30021 , G06F9/3004 , G06F9/30094 , G06F9/3013 , G06F9/30138 , G06F9/30141 , G06F9/30149 , G06F9/3802 , G06F9/3804 , G06F9/3814 , G06F9/3816 , G06F9/3828 , G06F9/3834 , G06F9/3836 , G06F9/3838 , G06F9/3846 , G06F9/3855 , G06F9/3857 , G06F9/3875 , G06F9/3885
摘要： A vector processing system includes a main memory, vector registers, vector resources for accessing memory to transfer vector data between main memory and the vector registers and to perform operations on the vector data. Data words stored in non-consecutive address locations of a segment of main memory are accessed for processing. Offset address values of a number of the data words are stored in consecutive elements of a first vector register. A vector gather instruction is executed which adds each offset address value to a base address value to calculate main memory addresses representing main memory storage locations of the data words, retrieves the data words from the main memory, and stores the data words in consecutive elements of a second vector register in an order corresponding to that in which the offset address values are stored in the first vector register. A second vector instruction is chained to the gather instruction for performing an operation upon the retrieved data words and storing the results in a third vector register. A vector scatter instruction is chained to the second vector instruction to return the results to the main memory.
摘要翻译：矢量处理系统包括主存储器，矢量寄存器，用于访问存储器以在主存储器和矢量寄存器之间传送矢量数据的矢量资源，并对矢量数据执行操作。存储在主存储器段的非连续地址位置中的数据字被访问以进行处理。多个数据字的偏移地址值被存储在第一向量寄存器的连续元素中。执行向量收集指令，将每个偏移地址值添加到基地址值以计算表示数据字的主存储器存储位置的主存储器地址，从主存储器检索数据字，并将数据字存储在第二向量寄存器，其顺序与偏移地址值存储在第一向量寄存器中的顺序相对应。第二向量指令被链接到收集指令，用于对检索的数据字执行操作，并将结果存储在第三向量寄存器中。向量散布指令链接到第二个向量指令，以将结果返回到主存储器。

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