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71. 发明申请

US20090234986A1 STORAGE CONTROLLER AND STORAGE CONTROL METHOD 有权
标题翻译：存储控制器和存储控制方法
公开(公告)号：US20090234986A1
公开(公告)日：2009-09-17
申请号：US12123057
申请日：2008-05-19
申请人： Atsushi Yuhara , Masao Nakano , Takao Sato , Kazunobu Ohashi , Takahiko Takeda
发明人： Atsushi Yuhara , Masao Nakano , Takao Sato , Kazunobu Ohashi , Takahiko Takeda
IPC分类号： G06F3/00
CPC分类号： G06F11/2092 , G06F11/0724 , G06F11/0727 , G06F11/0757
摘要： This storage controller includes a port unit and multiple processing units for inputting and outputting data to and from a storage apparatus. The port unit sorts the data I/O requests given from a host system to the corresponding processing units according to a table pre-defining the storage apparatus or a storage area in the storage apparatus to perform data I/O processing allocated to each of the processing units. The processing unit inputs data in the corresponding storage apparatus or the corresponding storage area according to the data I/O request sorted to itself from the port unit and, upon detecting a blockage of the other processing unit due to a failure, updates the table retained in each of the port units so as to sort the storage apparatuses or the storage areas allocated to the other processing unit to the remaining unblocked processing units.
摘要翻译：该存储控制器包括端口单元和用于向存储装置输入和输出数据的多个处理单元。端口单元根据预先定义存储装置的表或存储装置中的存储区域将从主机系统给出的数据I / O请求分类到相应的处理单元，以执行分配给每个处理单元的数据I / O处理处理单位。处理单元根据从端口单元自身分配的数据I / O请求在对应的存储装置或对应的存储区域中输入数据，并且在检测到由于故障导致的其他处理单元的阻塞时更新保留的表在每个端口单元中，将分配给其他处理单元的存储装置或存储区域分配给剩余的未阻塞处理单元。

72. 发明授权

US07475169B2 Storage control system and method for reducing input/output processing time involved in accessing an external storage subsystem 失效
标题翻译：用于减少访问外部存储子系统所涉及的输入/输出处理时间的存储控制系统和方法
公开(公告)号：US07475169B2
公开(公告)日：2009-01-06
申请号：US11362085
申请日：2006-02-27
申请人： Atsushi Yuhara , Kazunobu Ohashi , Masao Nakano
发明人： Atsushi Yuhara , Kazunobu Ohashi , Masao Nakano
IPC分类号： G06F3/00
CPC分类号： G06F12/0873 , G06F12/0871 , G06F2212/282
摘要： There is a cache memory, which has a cache area allocated to each communication port of an external storage subsystem. When data conforming to an I/O command received from a host is in an external LDEV, and when there is no cache hit in this cache area, an I/O command is issued to this external storage subsystem, and then the result of I/O processing is sent to the host. A storage control system measures response time by issuing a dummy I/O command to each communication port. The larger cache capacity is allocated to a communication port with the larger measured value. As a result of this, there is an increased probability of a cache hit in a cache area corresponding to a communication port with a higher response time measured value.
摘要翻译：存在高速缓冲存储器，其具有分配给外部存储子系统的每个通信端口的高速缓存区域。当符合从主机接收到的I / O命令的数据在外部LDEV中时，当该高速缓存区中没有高速缓存命中时，向该外部存储子系统发出I / O命令，然后将I / O处理被发送到主机。存储控制系统通过向每个通信端口发出虚拟I / O命令来测量响应时间。更大的缓存容量被分配给具有较大测量值的通信端口。结果，在对应于具有较高响应时间测量值的通信端口的高速缓存区域中存在高速缓存命中的可能性增加。

73. 发明授权

US07119734B2 Target determination apparatus, target judgment apparatus, and determination aid apparatus 失效
标题翻译：目标确定装置，目标判断装置和确定辅助装置
公开(公告)号：US07119734B2
公开(公告)日：2006-10-10
申请号：US10854242
申请日：2004-05-27
申请人： Masao Nakano , Kimihisa Yoneda
发明人： Masao Nakano , Kimihisa Yoneda
IPC分类号： G01S13/93
CPC分类号： G01S7/412 , G01S13/10 , G01S13/588 , G01S13/931
摘要： A target determination apparatus for determining type of a target, includes a transmission unit, a reception unit, and a determination unit. The transmission unit emits an electromagnetic wave. The reception unit receives the electromagnetic wave reflected at the target to obtain reception information. The determination unit determines the type of the target on the basis of radar cross section obtained from the reception information.
摘要翻译：一种用于确定目标类型的目标确定装置，包括发送单元，接收单元和确定单元。传输单元发射电磁波。接收单元接收在目标处反射的电磁波，以获得接收信息。确定单元基于从接收信息获得的雷达横截面来确定目标的类型。

74. 发明申请

US20060114722A1 Nonvolatile memory device, and its manufacturing method 有权
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US20060114722A1
公开(公告)日：2006-06-01
申请号：US11291048
申请日：2005-11-29
申请人： Atsushi Yokoi , Masao Nakano
发明人： Atsushi Yokoi , Masao Nakano
IPC分类号： G11C16/04
CPC分类号： G11C16/0475 , G11C11/5621 , G11C2211/5611 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42328 , H01L29/42344 , H01L29/42348 , H01L29/66825 , H01L29/7887 , H01L29/7923
摘要： On a channel region enclosed by a pair of diffusion layers 13A, 13B, a first insulating layer 15, a charge accumulative layer 17, and a second insulating layer 19 are stacked up in this order, and on the second insulating layer 19, two control gate layers 21A, 21B spaced across a gap G1 are disposed in the middle of the channel width direction. The charge accumulative layer 17 has discrete charge traps, and, accordingly, movement of charge in the layer is limited. In the charge accumulative layer 17, the charges injected depend on the writing voltage applied in control gate layers 21A, 21B and can be localized beneath the control gate layers 21A, 21B through which a writing voltage is applied. The presence or absence of charges can be controlled in every charge accumulative region beneath the control gate layers 21A, 21B, so that multi-value storage in the memory cell can be realized.
摘要翻译：在由一对扩散层13A，13B，第一绝缘层15，电荷累积层17和第二绝缘层19围绕的沟道区域上依次层叠，在第二绝缘层19上，在间隙G 1间隔开的两个控制栅极层21A，21B设置在沟道宽度方向的中间。电荷累积层17具有离散的电荷陷阱，因此层中的电荷的移动受到限制。在电荷累积层17中，注入的电荷取决于施加在控制栅极层21A，21B中的写入电压，并且可以位于施加写入电压的控制栅极层21A，21B的下方。可以在控制栅极层21A，21B下方的每个电荷累积区域中控制电荷的存在或不存在，从而可以实现存储单元中的多值存储。

75. 发明授权

US07052663B2 Combustion catalysts and processes for removing organic compounds 有权
标题翻译：燃烧催化剂和除去有机化合物的方法
公开(公告)号：US07052663B2
公开(公告)日：2006-05-30
申请号：US11003730
申请日：2004-12-06
申请人： Wataru Kobayashi , Masao Nakano
发明人： Wataru Kobayashi , Masao Nakano
IPC分类号： B01J8/00
CPC分类号： B01J21/066 , B01D53/8662 , B01D53/8668 , B01J21/06 , B01J21/063 , B01J23/42 , B01J29/068 , B01J29/18 , B01J29/40 , B01J29/7007 , B01J35/0006 , B01J35/10 , B01J35/1085 , B01J2229/20
摘要： A process for removing an organic compound or compounds which is/are a chlorinated hydrocarbon or hydrocarbon by catalytic combustion, the process including the step of contacting the organic compound or compounds with a combustion catalyst which includes a mixture of a zeolite and a metal oxide, where the metal oxide is loaded with at least one of the elements of the platinum group.
摘要翻译：通过催化燃烧除去有机化合物或氯化烃或烃的化合物的方法，该方法包括使有机化合物或化合物与包含沸石和金属氧化物的混合物的燃烧催化剂接触的步骤，其中金属氧化物装载有铂族元素中的至少一种元素。

76. 发明授权

US06837355B2 Clutch including spun rotor having hardened depressions 失效
标题翻译：离合器包括具有硬化凹陷的旋转转子
公开(公告)号：US06837355B2
公开(公告)日：2005-01-04
申请号：US10374529
申请日：2003-02-27
申请人： Shigeo Matsui , Masao Nakano , Masahito Ooya , Alice Schneider , Peter Alderman , Dean Bremke , Craig A. Wightman , Channing M. Suscha , Daniel T. Pritchard
发明人： Shigeo Matsui , Masao Nakano , Masahito Ooya , Alice Schneider , Peter Alderman , Dean Bremke , Craig A. Wightman , Channing M. Suscha , Daniel T. Pritchard
IPC分类号： F16D27/112 , F16D27/14
CPC分类号： F16D27/112 , F16D2027/005 , F16D2027/008
摘要： In an electromagnetic clutch having drive and driven side clutch plates in which the drive side clutch plate is provided with a plurality of elongated holes circumferentially arranged at given intervals, a depression is formed by compressing and plastically press deforming each bridge portion positioned circumferentially between adjacent two of the elongated holes on an axial end surface of the drive side clutch plate facing the driven side clutch plate. Though tensile stress caused by belt tension is likely concentrated on the bridge portion, the depression, which causes higher hardness of the bridge portion, effectively serves to restrain occurrence of the fatigue failure.

77. 发明授权

US6133934A Image forming apparatus having an image conversion table for correcting a property of the apparatus 失效
标题翻译：图像形成装置具有用于校正装置的特性的图像转换表
公开(公告)号：US6133934A
公开(公告)日：2000-10-17
申请号：US527383
申请日：1995-09-13
申请人： Masao Nakano
发明人： Masao Nakano
IPC分类号： H04N1/40 , H04N1/407 , G01D9/42 , B41J2/435 , H04N1/00
CPC分类号： H04N1/4078 , H04N1/40037
摘要： An image forming apparatus includes reading means for converting image light obtained by optically scanning an original into an electric signal. An image signal conversion table converts the image signal from the reading means in response to a property of the image forming system. An image signal generating device generates a reference image signal, and an image forming device forms an image on a recording sheet in response to the image signal. The image is formed on the recording sheet by the image forming device in response to the image signal generated by the image signal generating device, and image light obtained by optically scanning the recording sheet is converted into an image signal by the reading device, and the image signal conversion table is corrected on the basis of the image signal converted by the reading device.
摘要翻译：图像形成装置包括用于将通过将原稿光学扫描获得的图像光转换为电信号的读取装置。图像信号转换表响应于图像形成系统的特性来转换来自读取装置的图像信号。图像信号产生装置产生参考图像信号，并且图像形成装置响应于图像信号在记录纸上形成图像。图像由图像形成装置响应于由图像信号产生装置产生的图像信号形成在记录纸上，并且通过光学扫描记录纸获得的图像光被读取装置转换成图像信号，并且基于由读取装置转换的图像信号校正图像信号转换表。

78. 发明授权

US6103208A Adsorbent for ethylene, method for adsorbing and removing ethylene and method for purifying an exhaust gas 有权
标题翻译：用于乙烯的吸附剂，用于吸附和除去乙烯的方法和净化废气的方法
公开(公告)号：US6103208A
公开(公告)日：2000-08-15
申请号：US429301
申请日：1999-10-28
申请人： Hiroshi Ogawa , Yukio Ito , Masao Nakano , Keiji Itabashi
发明人： Hiroshi Ogawa , Yukio Ito , Masao Nakano , Keiji Itabashi
IPC分类号： B01D53/94 , B01J20/18 , B01J8/02 , B01J8/00 , B01J21/00 , B01J29/06 , C01B21/00
CPC分类号： B01J20/186 , B01D53/9486 , B01D2253/108 , B01D2255/1023 , B01D2255/104
摘要： A method for purifying an exhaust gas by contacting the exhaust gas with an exhaust gas-purifying catalyst comprising a nitrogen oxide-removing catalyst and an adsorbent for ethylene comprising a zeolite which contains Ag, and also Pd, optionally which has a ferrierite structure.
摘要翻译：通过使排气与包含除氧化氮催化剂和含有Ag的沸石的乙烯吸附剂的废气净化催化剂进行净化排气的方法，以及任选地具有镁碱沸石结构的Pd。

79. 发明授权

US6078514A Semiconductor device and semiconductor system for high-speed data transfer 失效
标题翻译：半导体器件和半导体系统，用于高速数据传输
公开(公告)号：US6078514A
公开(公告)日：2000-06-20
申请号：US61023
申请日：1998-04-16
申请人： Yoshihiro Takemae , Masao Taguchi , Masao Nakano , Takaaki Suzuki , Hiroyoshi Tomita , Toshiya Uchida , Yasuharu Sato , Atsushi Hatakeyama , Masato Matsumiya , Yasurou Matsuzaki
发明人： Yoshihiro Takemae , Masao Taguchi , Masao Nakano , Takaaki Suzuki , Hiroyoshi Tomita , Toshiya Uchida , Yasuharu Sato , Atsushi Hatakeyama , Masato Matsumiya , Yasurou Matsuzaki
IPC分类号： G11C11/41 , G11C7/10 , G11C7/22 , G11C11/401 , H01L21/60 , H01L25/00 , H01L27/10 , H01L25/04 , H01L23/36
CPC分类号： H01L23/60 , G11C7/1006 , G11C7/22 , H01L24/49 , H01L25/0655 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/49175 , H01L24/48 , H01L27/0266 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01014 , H01L2924/01015 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/1305 , H01L2924/13091 , H01L2924/30105
摘要： A semiconductor system includes at least one logic chip and at least one memory chip arranged such that one side of the at least one memory chip faces one side of the at least one logic chip. The semiconductor system further includes first input/output nodes, provided for the at least one logic chip, for data transfer with an adjacent memory chip, second input/output nodes, provided for the at least one memory chip, for data transfer with an adjacent logic chip, and a package housing the at least one logic chip and the at least one memory chip, wherein the first input/output nodes are arranged along the one side of the at least one logic chip, and the second input/output nodes are arranged along the one side of the at least one memory chip.
摘要翻译：半导体系统包括至少一个逻辑芯片和布置成使得至少一个存储器芯片的一侧面向至少一个逻辑芯片的一侧的至少一个存储器芯片。所述半导体系统还包括为所述至少一个逻辑芯片提供的用于与相邻存储器芯片进行数据传输的第一输入/输出节点，为所述至少一个存储器芯片提供的第二输入/输出节点，用于与相邻的逻辑芯片以及容纳所述至少一个逻辑芯片和所述至少一个存储器芯片的封装，其中所述第一输入/输出节点沿着所述至少一个逻辑芯片的一侧布置，并且所述第二输入/输出节点是沿着至少一个存储器芯片的一侧布置。

80. 发明授权

US6063640A Semiconductor wafer testing method with probe pin contact 失效
标题翻译：半导体晶圆测试方法与探针接触
公开(公告)号：US6063640A
公开(公告)日：2000-05-16
申请号：US30349
申请日：1998-02-25
申请人： Masataka Mizukoshi , Hidehiko Akasaki , Masao Nakano , Yasuhiro Fujii , Shinnosuke Kamata , Makoto Yanagisawa , Yasurou Matsuzaki , Toyonobu Yamada , Masami Matsuoka , Hiroyoshi Tomita
发明人： Masataka Mizukoshi , Hidehiko Akasaki , Masao Nakano , Yasuhiro Fujii , Shinnosuke Kamata , Makoto Yanagisawa , Yasurou Matsuzaki , Toyonobu Yamada , Masami Matsuoka , Hiroyoshi Tomita
IPC分类号： H01L23/58 , G01R31/26 , H01L21/66
CPC分类号： H01L22/32 , H01L22/22 , H01L2224/05554 , Y10S438/977
摘要： A semiconductor wafer testing method includes a pre-test step for forming a temporary test film on a surface of a semiconductor wafer, a test step for testing the semiconductor wafer by applying a probe to the temporary test film and a post-test step for exfoliating the temporary test film from the surface of the semiconductor wafer. The temporary test film includes test electrode groups each provided with a plurality of regularly arranged test electrodes, and wiring patterns for electrically connecting the test electrodes with corresponding ones of semiconductor unit electrodes in respective semiconductor units on the semiconductor wafer. Probe pins of said probe are arranged so as to be aligned with corresponding ones of the test electrodes of the respective test electrode groups.
摘要翻译：半导体晶片测试方法包括：在半导体晶片的表面上形成临时测试膜的预测试步骤，通过向临时测试膜施加探针来测试半导体晶片的测试步骤和用于去角质的后测试步骤来自半导体晶片表面的临时测试膜。临时测试膜包括各自设置有多个规则排列的测试电极的测试电极组和用于将测试电极与半导体晶片上的各个半导体单元中的相应半导体单元电极电连接的布线图案。所述探针的探头针布置成与各个测试电极组的相应测试电极对齐。

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