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71. 发明授权

US07397419B2 Radar apparatus and failure detection method thereof 失效
标题翻译：雷达装置及其故障检测方法
公开(公告)号：US07397419B2
公开(公告)日：2008-07-08
申请号：US11626627
申请日：2007-01-24
申请人： Masao Nakano , Kenji Oka
发明人： Masao Nakano , Kenji Oka
IPC分类号： G01S7/40
CPC分类号： G01S7/4021 , G01S7/352 , G01S13/34 , G01S13/931 , G01S2007/356 , G01S2013/9375
摘要： The present invention provides a radar apparatus, which can diagnose failure at low cost with high accuracy, and a failure diagnosis method thereof. An antenna serves as both a transmit antenna and a receive antenna. A transmit and receive select switch switches the transmission and reception of the antenna. A control unit measures a power value based on an output signal of a receive wave received by the antennas, and judges that the transmit and receive select switch fails when this power value exceeds a threshold.
摘要翻译：本发明提供一种可以以低成本，高精度地诊断故障的雷达装置及其故障诊断方法。天线用作发射天线和接收天线。发送和接收选择开关切换天线的发送和接收。控制单元基于天线接收的接收波的输出信号来测量功率值，并且当该功率值超过阈值时，判断发送和接收选择开关发生故障。

72. 发明授权

US07040875B2 Refrigerant pump with rotors in bearing 失效
标题翻译：带有转子的制冷剂泵
公开(公告)号：US07040875B2
公开(公告)日：2006-05-09
申请号：US10410535
申请日：2003-04-09
申请人： Masao Nakano , Hiromasa Ashitani
发明人： Masao Nakano , Hiromasa Ashitani
IPC分类号： F04B17/03
CPC分类号： F04C11/008 , F04C2/102
摘要： A refrigerant pump includes a thin-walled hermetic vessel and a thick-walled hermetic vessel having an end inserted into and secured to an end of the thin-walled hermetic vessel. A stator of an electric motor unit is fitted outside the thin-walled hermetic vessel, while a rotor of the electric motor unit is accommodated inside the thin-walled hermetic vessel. A pump mechanism is fitted inside the thick-walled hermetic vessel, and a rotational force of the rotor is transmitted to the pump mechanism by the drive shaft.
摘要翻译：制冷剂泵包括薄壁密封容器和厚壁密封容器，其端部插入并固定到薄壁密封容器的端部。电动机单元的定子安装在薄壁密封容器的外部，而电动机单元的转子容纳在薄壁密封容器内。泵机构安装在厚壁密封容器内，转子的旋转力通过驱动轴传递到泵机构。

73. 发明申请

US20060028375A1 Radar apparatus 失效
标题翻译：雷达装置
公开(公告)号：US20060028375A1
公开(公告)日：2006-02-09
申请号：US11189732
申请日：2005-07-27
申请人： Kanako Honda , Masao Nakano
发明人： Kanako Honda , Masao Nakano
IPC分类号： G01S13/42
CPC分类号： G01S13/4454 , G01S13/584
摘要： In an FM-CW radar apparatus which determines the azimuth to a target by a phase monopulse technique, an abnormal value resulting from the presence of multiple targets is detected. Three receiving antennas are arranged at spacings of 5λ/4 and 6λ/4, respectively, and it is determined whether the difference between the azimuth obtained from the combination of the receiving antennas spaced 5λ/4 apart and the azimuth obtained from the combination of the receiving antennas spaced 6λ/4 apart is smaller than a predetermined value or not; when the condition has been satisfied n times in succession, it is determined that the detected value is normal. On the other hand, if the condition has not been satisfied n times in succession, or if the difference is not smaller than the predetermined value, it is determined that the detected value is an abnormal value resulting from the presence of multiple targets.
摘要翻译：在通过相位单脉冲技术确定目标的方位角的FM-CW雷达装置中，检测到由多个目标的存在引起的异常值。三个接收天线分别以5lambda / 4和6λ/ 4的间隔排列，并且确定从接收天线的组合获得的方位角之间的间隔为5λ/ 4的距离和从间隔6λ/ 4的接收天线小于预定值; 当条件已经连续满足n次时，确定检测值正常。另一方面，如果条件未连续满足n次，或者如果差值不小于预定值，则确定检测值是由于存在多个目标而导致的异常值。

74. 发明授权

US06826923B2 Cooling device for semiconductor elements 失效
标题翻译：半导体元件冷却装置
公开(公告)号：US06826923B2
公开(公告)日：2004-12-07
申请号：US10407071
申请日：2003-04-03
申请人： Masao Nakano , Hiromasa Ashitani , Masafumi Fukushima
发明人： Masao Nakano , Hiromasa Ashitani , Masafumi Fukushima
IPC分类号： F25D2312
CPC分类号： F25B39/02 , F25B5/04 , F25B39/04 , F28D2021/0031 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要： A cooling device for cooling a semiconductor element includes at least one cold plate utilizing a copper plate for cooling a semiconductor element, a condenser utilizing a plurality of flat micro-tubes, a refrigerant pump for circulating a refrigerant, and a fan for cooling the condenser. The cold plate, the condenser, and the refrigerant pump are fluid connected to define a refrigerant circulating circuit.
摘要翻译：用于冷却半导体元件的冷却装置包括至少一个利用铜板冷却半导体元件的冷板，使用多个扁平微管的冷凝器，用于循环制冷剂的制冷剂泵和用于冷却冷凝器的风扇。冷板，冷凝器和制冷剂泵流体连接以限定制冷剂循环回路。

75. 发明授权

US06498524B1 Input/output data synchronizing device 有权
标题翻译：输入/输出数据同步装置
公开(公告)号：US06498524B1
公开(公告)日：2002-12-24
申请号：US09706731
申请日：2000-11-07
申请人： Kenichi Kawasaki , Yasuharu Sato , Terumasa Kitahara , Masao Nakano , Masao Taguchi , Yoshihiro Takemae , Yasurou Matsuzaki , Koichi Nishimura , Yoshinori Okajima , Naoharu Shinozaki , Hiroko Douchi
发明人： Kenichi Kawasaki , Yasuharu Sato , Terumasa Kitahara , Masao Nakano , Masao Taguchi , Yoshihiro Takemae , Yasurou Matsuzaki , Koichi Nishimura , Yoshinori Okajima , Naoharu Shinozaki , Hiroko Douchi
IPC分类号： H03L708
CPC分类号： G11C7/106 , G06F13/4243 , G11C7/1006 , G11C7/1039 , G11C7/1051 , G11C7/1066 , G11C7/1069 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C2207/002 , G11C2207/108 , H03K5/133 , H03K2005/00058 , H03L7/0805 , H03L7/0814
摘要： Disclosed is a semiconductor device for outputting an output signal with a given phase held relative to an external clock despite a difference in characteristic, a change in temperature, and a fluctuation in supply voltage. The semiconductor device comprises an input circuit for inputting the external clock and outputting a reference signal, an output circuit for receiving an output timing signal and outputting an output signal according to the timing of the output timing signal, and an output timing control circuit for controlling the output timing so that the output signal exhibits a given phase relative to the external clock. The output timing control circuit includes a delay circuit for delaying the reference signal by a specified magnitude and generating an output timing signal, a phase comparison circuit for comparing the phase of the output timing signal with the phase of the reference signal, and a delay control circuit for specifying the magnitude of a delay to be produced by the delay circuit according to the result of comparison performed by the phase comparison circuit.
摘要翻译：公开了一种用于输出具有相对于外部时钟保持的给定相位的输出信号的半导体器件，尽管特性差，温度变化和电源电压波动。该半导体器件包括用于输入外部时钟并输出参考信号的输入电路，用于接收输出定时信号并根据输出定时信号的定时输出输出信号的输出电路和用于控制的输出定时控制电路输出定时，使得输出信号相对于外部时钟呈现给定的相位。输出定时控制电路包括用于将参考信号延迟指定幅度并产生输出定时信号的延迟电路，用于将输出定时信号的相位与参考信号的相位进行比较的相位比较电路和延迟控制电路，用于根据由相位比较电路执行的比较结果来指定由延迟电路产生的延迟的大小。

76. 发明授权

US06403048B1 Combustion catalysts and processes for removing organic compounds 有权
标题翻译：燃烧催化剂和除去有机化合物的方法
公开(公告)号：US06403048B1
公开(公告)日：2002-06-11
申请号：US09471001
申请日：1999-12-23
申请人： Wataru Kobayashi , Masao Nakano
发明人： Wataru Kobayashi , Masao Nakano
IPC分类号： B01J800
CPC分类号： B01J21/066 , B01D53/8662 , B01D53/8668 , B01J21/06 , B01J21/063 , B01J23/42 , B01J29/068 , B01J29/18 , B01J29/40 , B01J29/7007 , B01J35/0006 , B01J35/10 , B01J35/1085 , B01J2229/20
摘要： Catalysts for removing organic compounds from a gas stream containing the same and processes for removing organic compounds from the gas stream using the cataylst are disclosed. According to the first aspect, a combustion catalyst for removing organic compounds comprises a mixture of a zeolite and a metal oxide containing at least one of the elements of the platinum group. According to the second aspect, a combustion catalyst for removing organic compounds comprises an alumina having such a pore size distribution that, where “a” represents a pore radius in Å at the maximum of the pore size distribution curve, the accumlated pore volume of pores having radii in the range of “a”±Å is at least 65% of the total volume of all the pores, said alumina containing less than 1% by weight of rare earth elements and being loaded with one or more elements of the platinum group. According to third aspect, there is a process for removing organic compounds, said process comprising the step of contacting organic compounds with either one of the catalysts according to the first and second aspects of the invention.
摘要翻译：公开了从含有该有机化合物的气流中除去有机化合物的催化剂和使用催化剂从气流中除去有机化合物的方法。根据第一方面，用于除去有机化合物的燃烧催化剂包括沸石和金属的混合物含有铂族元素中的至少一种元素的氧化物。根据第二方面，用于除去有机化合物的燃烧催化剂包括具有孔尺寸分布的氧化铝，其中“a”表示孔径分布曲线最大值处的孔半径，孔的累积孔体积具有在“a”的范围内的半径为所有孔的总体积的至少65％，所述氧化铝含有少于1重量％的稀土元素并且装载有一种或多种铂族元素根据第三方面，有一种除去有机化合物的方法，所述方法包括使有机化合物与根据本发明的第一和第二方面的任一种催化剂接触的步骤。

77. 发明授权

US06323150B1 Process for preparing solid titanium catalyst component, olefin polymerization catalyst, and olefin polymerization process 有权
标题翻译：固体钛催化剂组分，烯烃聚合催化剂和烯烃聚合方法的制备方法
公开(公告)号：US06323150B1
公开(公告)日：2001-11-27
申请号：US09131837
申请日：1998-08-10
申请人： Shinichi Kojoh , Tsuneo Yashiki , Kazumitsu Kawakita , Masao Nakano , Sadahiko Matsuura
发明人： Shinichi Kojoh , Tsuneo Yashiki , Kazumitsu Kawakita , Masao Nakano , Sadahiko Matsuura
IPC分类号： B01J3100
CPC分类号： C08F10/00 , C08F4/651 , C08F4/6543
摘要： Disclosed is a process for preparing a solid titanium catalyst component, comprising the steps of (I) contacting a liquid magnesium compound with a liquid titanium compound to precipitate a solid in the contact liquid (&bgr;), and adding an electron donor (d-i) selected from the group consisting of a polycarboxylic ester and a polyether compound to the contact liquid (&bgr;) during the time from beginning to end of the solid precipitation, to form a solid product (&agr;); and (II) contacting the solid product (&agr;) obtained after completion of the solid precipitation with an electron donor (d-ii) selected from the group consisting of a polycarboxylic ester and a polyether compound, to prepare a solid titanium catalyst component. According to the process, a solid titanium catalyst component capable of polymerizing an olefin with high activity and capable of preparing an olefin polymer of high stereoregularity can be prepared. Also disclosed are an olefin polymerization catalyst containing a solid titanium catalyst component obtained by the above process and an olefin polymerization process using the olefin polymerization catalyst.
摘要翻译：公开了一种制备固体钛催化剂组分的方法，包括以下步骤：（I）使液体镁化合物与液体钛化合物接触以沉淀接触液体中的固体（β），并加入选择的电子给体（di）从固体沉淀开始到结束的时间期间由聚羧酸酯和聚醚化合物组成接触液（β），形成固体产物（α）; 和（II）使固体沉淀完成后得到的固体产物（α）与选自多羧酸酯和聚醚化合物的电子给体（d-ii）接触，制备固体钛催化剂组分。根据该方法，可以制备能够使活性高的烯烃聚合并能够制备具有高立构规整性的烯烃聚合物的固体钛催化剂组分。还公开了含有通过上述方法获得的固体钛催化剂组分和使用烯烃聚合催化剂的烯烃聚合方法的烯烃聚合催化剂。

78. 发明授权

US06298004B1 Semiconductor device, semiconductor system, and digital delay circuit 失效
标题翻译：半导体器件，半导体系统和数字延迟电路
公开(公告)号：US06298004B1
公开(公告)日：2001-10-02
申请号：US08892790
申请日：1997-07-15
申请人： Kenichi Kawasaki , Yasuharu Sato , Terumasa Kitahara , Masao Nakano , Masao Taguchi , Yoshihiro Takemae , Yasurou Matsuzaki , Koichi Nishimura , Yoshinori Okajima , Naoharu Shinozaki , Hiroko Douchi
发明人： Kenichi Kawasaki , Yasuharu Sato , Terumasa Kitahara , Masao Nakano , Masao Taguchi , Yoshihiro Takemae , Yasurou Matsuzaki , Koichi Nishimura , Yoshinori Okajima , Naoharu Shinozaki , Hiroko Douchi
IPC分类号： G11C800
CPC分类号： G11C7/106 , G06F13/4243 , G11C7/1006 , G11C7/1039 , G11C7/1051 , G11C7/1066 , G11C7/1069 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C2207/002 , G11C2207/108 , H03K5/133 , H03K2005/00058 , H03L7/0805 , H03L7/0814
摘要： Disclosed is a semiconductor device for outputting an output signal with a given phase held relative to an external clock despite a difference in characteristic, a change in temperature, and a fluctuation in supply voltage. The semiconductor device comprises an input circuit for inputting the external clock and outputting a reference signal, an output circuit for receiving an output timing signal and outputting an output signal according to the timing of the output timing signal, and an output timing control circuit for controlling the output timing so that the output signal exhibits a given phase relative to the external clock. The output timing control circuit includes a delay circuit for delaying the reference signal by a specified magnitude and generating an output timing signal, a phase comparison circuit for comparing the phase of the output timing signal with the phase of the reference signal, and a delay control circuit for specifying the magnitude of a delay to be produced by the delay circuit according to the result of comparison performed by the phase comparison circuit.
摘要翻译：公开了一种用于输出具有相对于外部时钟保持的给定相位的输出信号的半导体器件，尽管特性差，温度变化和电源电压波动。该半导体器件包括用于输入外部时钟并输出参考信号的输入电路，用于接收输出定时信号并根据输出定时信号的定时输出输出信号的输出电路和用于控制的输出定时控制电路输出定时，使得输出信号相对于外部时钟呈现给定的相位。输出定时控制电路包括用于将参考信号延迟指定幅度并产生输出定时信号的延迟电路，用于将输出定时信号的相位与参考信号的相位进行比较的相位比较电路和延迟控制电路，用于根据由相位比较电路执行的比较结果来指定由延迟电路产生的延迟的大小。

79. 发明授权

US5266636A Process for producing polypropylene and stretched polypropylene film 失效
标题翻译：生产聚丙烯和拉伸聚丙烯薄膜的方法
公开(公告)号：US5266636A
公开(公告)日：1993-11-30
申请号：US928015
申请日：1992-08-11
申请人： Mamoru Kioka , Masaya Yamada , Masanobu Ishiyama , Masao Nakano , Akinori Toyota
发明人： Mamoru Kioka , Masaya Yamada , Masanobu Ishiyama , Masao Nakano , Akinori Toyota
IPC分类号： C08F10/06 , C08L23/10 , C08F297/08 , C08J5/18 , C08L23/20
CPC分类号： C08F10/06
摘要： A process for producing polypropylene, which comprises preliminarily polymerizing 3-methylbutene-1 in the presence of a catalyst system formed from[A] a solid titanium catalyst component containing magnesium, titanium, halogen and polycarboxylic acid esters as essential components,[B] an organoaluminum compound, and[C] an organosilicon compound represented by the general formula R.sub.n Si(OR').sub.4-n wherein R and R' represent a hydrocarbon group, and 0
摘要翻译：一种生产聚丙烯的方法，其包括在由[A]含有镁，钛，卤素和多元羧酸酯作为必要组分的固体钛催化剂组分形成的催化剂体系的情况下预先聚合3-甲基丁烯[B] 有机铝化合物和[C]由通式RnSi（OR'）4-n表示的有机硅化合物，其中R和R'表示烃基，0

80. 发明授权

US5253204A Semiconductor memory device having a boost circuit 失效
标题翻译：具有升压电路的半导体存储器件
公开(公告)号：US5253204A
公开(公告)日：1993-10-12
申请号：US747049
申请日：1991-08-19
申请人： Atsushi Hatakeyama , Masao Nakano
发明人： Atsushi Hatakeyama , Masao Nakano
IPC分类号： G11C11/407 , G11C8/08 , G11C11/408
CPC分类号： G11C8/08 , G11C11/4085
摘要： A semiconductor memory device comprises a memory cell array including a plurality of memory cells, a word line selection circuit for selecting a word line, a bit line selection circuit for selecting a bit line, an input/output circuit for supplying data to be written to a selected memory cell via the selected bit line and for reading data from the selected memory cell via the selected bit line, a word line driver including a MOS transistor having a drain supplied with a supply voltage and a source connected to the word line selection circuit for supplying a word line voltage to the selected word line via the word line selection circuit, a word line boosting circuit connected to the drain of the MOS transistor for boosting the word line voltage via the MOS transistor, a boosting capacitor connected across the source and the gate of the MOS transistor, and a clamping circuit connected to the gate of said MOS transistor for clamping the voltage level at a predetermined level.

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