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31. 发明申请

US20050179104A1 Lateral conduction schottky diode with plural mesas 有权
标题翻译：具有多个台面的横向导通肖特基二极管
公开(公告)号：US20050179104A1
公开(公告)日：2005-08-18
申请号：US10780363
申请日：2004-02-17
申请人： Bryan Shelton , Linlin Liu , Alex Ceruzzi , Michael Murphy , Milan Pophristic , Boris Peres , Richard Stall , Xiang Gao , Ivan Eliashevich
发明人： Bryan Shelton , Linlin Liu , Alex Ceruzzi , Michael Murphy , Milan Pophristic , Boris Peres , Richard Stall , Xiang Gao , Ivan Eliashevich
IPC分类号： H01L21/60 , H01L29/06 , H01L29/20 , H01L29/47 , H01L29/872 , H01L21/00 , H01L31/0328
CPC分类号： H01L24/81 , H01L29/0692 , H01L29/2003 , H01L29/872 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01023 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/014 , H01L2924/12032 , H01L2924/00
摘要： A lateral conduction Schottky diode includes multiple mesa regions upon which Schottky contacts are formed and which are at least separated by ohmic contacts to reduce the current path length and reduce current crowding in the Schottky contact, thereby reducing the forward resistance of a device. The multiple mesas may be isolated from one another and have sizes and shapes optimized for reducing the forward resistance. Alternatively, some of the mesas may be finger-shaped and intersect with a central mesa or a bridge mesa, and some or all of the ohmic contacts are interdigitated with the finger-shaped mesas. The dimensions of the finger-shaped mesas and the perimeter of the intersecting structure may be optimized to reduce the forward resistance. The Schottky diodes may be mounted to a submount in a flip chip arrangement that further reduces the forward voltage as well as improves power dissertation and reduces heat generation.
摘要翻译：横向导通肖特基二极管包括形成肖特基接触的多个台面区域，其至少由欧姆接触分开，以减小电流路径长度并减少肖特基接触中的电流拥挤，从而降低器件的正向电阻。多个台面可以彼此隔离并且具有优化的尺寸和形状以减少前向阻力。或者，一些台面可以是手指形状并与中央台面或桥台面相交，并且部分或全部欧姆接触件与指状台面相互交错。指状台面的尺寸和相交结构的周长可以被优化以减小正向阻力。肖特基二极管可以以倒装芯片布置的方式安装到基座上，这进一步降低了正向电压，并且改善了功率论文并减少了发热。

32. 发明授权

US06787435B2 GaN LED with solderable backside metal 有权
标题翻译：具有可焊接背面金属的GaN LED
公开(公告)号：US06787435B2
公开(公告)日：2004-09-07
申请号：US10064359
申请日：2002-07-05
申请人： Shawn R. Gibb , Robert F. Karlicek , Prosanto K. Mukerji , Hari S. Venugopalan , Ivan Eliashevich
发明人： Shawn R. Gibb , Robert F. Karlicek , Prosanto K. Mukerji , Hari S. Venugopalan , Ivan Eliashevich
IPC分类号： H01L2120
CPC分类号： H01L33/40 , H01L33/62 , H01L2924/0002 , H01L2924/00
摘要： A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).
摘要翻译：公开了一种发光元件（24）。发光二极管（LED）包括具有正面和背面（33,35）的蓝宝石衬底（26）和沉积在蓝宝石衬底的前侧（33）上的多个半导体层（28,30,32）（26）。半导体层（28,30,32）限定响应于电输入而发光的发光结构。金属化堆叠（40）包括沉积在蓝宝石衬底（26）的背面（35）上的粘合层（34）和连接到粘合层（34）的可焊接层（38），使得可焊层（ 38）通过粘合层（34）固定到蓝宝石衬底（26）。设置有LED的支撑结构（42）。在LED和支撑结构（42）之间布置有焊料接合（44）。焊接接合（44）将LED固定到支撑结构（42）。

33. 发明授权

US07635869B2 Support with recessed electrically conductive chip attachment material for flip-chip bonding a light emitting chip 失效
标题翻译：支持嵌入式导电芯片附件材料，用于倒装芯片接合发光芯片
公开(公告)号：US07635869B2
公开(公告)日：2009-12-22
申请号：US11520905
申请日：2006-09-14
申请人： Boris Kolodin , Michael Hsing , Stanton Earl Weaver, Jr. , Ivan Eliashevich , Srinath K. Aanegola
发明人： Boris Kolodin , Michael Hsing , Stanton Earl Weaver, Jr. , Ivan Eliashevich , Srinath K. Aanegola
IPC分类号： H01L33/00
CPC分类号： H01L33/483 , H01L33/62 , H01L2224/48463 , H01L2224/73265 , H01L2924/01079 , H01L2924/10253 , H01L2924/00
摘要： In a light emitting device, a light emitting chip (12, 112) includes a stack of semiconductor layers (14) and an electrode (24, 141, 142) disposed on the stack of semiconductor layers. A support (10, 10′, 110, 210) has a generally planar surface (30) supporting the light emitting chip in a flip-chip fashion. An electrically conductive chip attachment material (40, 41, 141, 142) is recessed into the generally planar surface of the support such that the attachment material does not protrude substantially above the generally planar surface of the support. The attachment material provides electrical communication between the electrode of the light emitting chip and an electrically conductive path (36, 36′) of the support. Optionally, at least the stack of semiconductor layers and the electrode of the light emitting chip are also recessed into the generally planar surface of the support.
摘要翻译：在发光器件中，发光芯片（12,112）包括堆叠的半导体层（14）和设置在半导体层堆叠上的电极（24,141,142）。支撑件（10,10'，110,210）具有以倒装芯片方式支撑发光芯片的大致平坦的表面（30）。导电芯片附接材料（40,41,141,142）凹入到支撑件的大致平坦的表面中，使得附接材料基本不突出在支撑体的大致平坦的表面上方。附着材料提供发光芯片的电极与支撑体的导电路径（36,36'）之间的电连通。可选地，至少半导体层的叠层和发光芯片的电极也凹入到支撑体的大致平坦的表面中。

34. 发明申请

US20090155958A1 ROBUST DIE BONDING PROCESS FOR LED DIES 审中-公开
标题翻译： LED DIES的坚固DIE结合工艺
公开(公告)号：US20090155958A1
公开(公告)日：2009-06-18
申请号：US11955787
申请日：2007-12-13
申请人： Boris Kolodin , Xiang Gao , Ivan Eliashevich , Stanton E. Weaver, JR.
发明人： Boris Kolodin , Xiang Gao , Ivan Eliashevich , Stanton E. Weaver, JR.
IPC分类号： H01L21/60 , B23K1/06
CPC分类号： B23K20/10 , B23K20/023 , H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/12041 , H01L2924/3011 , H01L2924/00 , H01L2924/00014
摘要： Systems and methods are provided to mitigate excess die attachment material accrual, and parasitic conductive paths formed thereby. A die attachment material (e.g., solder) is melted using a combination of localized heat sources and ultrasonic energy. The heat sources bring the die attachment material close to its melting point, which reduces an amount of bonding force associated with purely ultrasonic bonding techniques. An ultrasonic transducer brings the die attachment material the rest of the way up to its melting point, which reduces the overall temperature that the die and/or sensitive components thereon endure during the bonding process.
摘要翻译：提供了系统和方法来减轻多余的芯片附着材料应力，以及由此形成的寄生导电路径。使用局部热源和超声能量的组合来熔化模具附接材料（例如焊料）。热源使模具附着材料接近其熔点，这减少了与纯超声波焊接技术相关联的结合力的量。超声波换能器将模具附接材料的其余部分带到其熔点，这降低了模具和/或其敏感部件在粘合过程中承受的总体温度。

35. 发明申请

US20080145960A1 Super thin LED package for the backlighting applications and fabrication method 审中-公开
标题翻译：超薄LED封装，用于背光应用和制造方法
公开(公告)号：US20080145960A1
公开(公告)日：2008-06-19
申请号：US11639759
申请日：2006-12-15
申请人： Boris Kolodin , Ivan Eliashevich , Chen-Lun Hsing Chen , Stanton E. Weaver
发明人： Boris Kolodin , Ivan Eliashevich , Chen-Lun Hsing Chen , Stanton E. Weaver
IPC分类号： H01L21/00
CPC分类号： H01L25/0753 , H01L33/54 , H01L33/60 , H01L2924/0002 , H01L2924/00
摘要： First and second light emitting diode (LED) arrays, which each includes a corresponding number of LED dies, are disposed on a substrate proximately and substantially parallel to one another. Each pair of substantially paralleled LED dies of the first and second arrays is covered by substantially transparent optical encapsulant. The optical encapsulant is one of covered by a reflective layer for a UV to visible spectral region and shaped for total internal light reflection. The substrate is diced along an axis extending in parallel and between the first and second LED arrays.
摘要翻译：每个包括相应数量的LED管芯的第一和第二发光二极管（LED）阵列被布置在基板上并且基本上彼此平行。第一和第二阵列的每对基本上平行的LED管芯被基本上透明的光学密封剂覆盖。光学密封剂是用于UV到可见光谱区域的反射层覆盖的并且被形成用于完全内部光反射的光学密封剂。衬底沿着平行延伸并且在第一和第二LED阵列之间的轴线切割。

36. 发明申请

US20080113460A1 Laser Lift-Off of Sapphire From a Nitride Flip-Chip 有权
标题翻译：激光剥离蓝宝石从氮化物倒装芯片
公开(公告)号：US20080113460A1
公开(公告)日：2008-05-15
申请号：US10584434
申请日：2004-12-21
申请人： Bryan S. Shelton , Sebastien Libon , Ivan Eliashevich
发明人： Bryan S. Shelton , Sebastien Libon , Ivan Eliashevich
IPC分类号： H01L21/00
CPC分类号： H01L33/0079 , H01L33/62 , H01L2224/48091 , H01L2924/10253 , H01L2924/12041 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： In a method for fabricating a flip-chip light emitting diode device, epitaxial layers are deposited on a sapphire growth substrate to produce an epitaxial wafer. A plurality of light emitting diode devices are fabricated on the epitaxial wafer. The epitaxial wafer is diced to generate a device die. The device die is flip chip bonded to a mount. The flip chip bonding includes securing the device die to the mount by bonding at least one electrode of the device die to at least one bonding pad of the mount. Subsequent to the flip chip bonding, the growth substrate of the device die is removed via the application of laser light.
摘要翻译：在制造倒装芯片发光二极管器件的方法中，将外延层沉积在蓝宝石生长衬底上以产生外延晶片。在外延晶片上制造多个发光二极管器件。切割外延晶片以产生器件裸片。器件芯片被倒装芯片结合到安装座。倒装芯片接合包括通过将器件管芯的至少一个电极接合到安装件的至少一个接合焊盘来将器件裸片固定到安装座。在倒装芯片接合之后，通过施加激光来去除器件裸片的生长衬底。

37. 发明申请

US20080067537A1 Support for flip-chip bonding a light emitting chip 失效
标题翻译：支持倒装芯片连接发光芯片
公开(公告)号：US20080067537A1
公开(公告)日：2008-03-20
申请号：US11520905
申请日：2006-09-14
申请人： Boris Kolodin , Michael Hsing , Stanton Earl Weaver , Ivan Eliashevich , Srinath K. Aanegola
发明人： Boris Kolodin , Michael Hsing , Stanton Earl Weaver , Ivan Eliashevich , Srinath K. Aanegola
IPC分类号： H01L33/00 , H01L21/00
CPC分类号： H01L33/483 , H01L33/62 , H01L2224/48463 , H01L2224/73265 , H01L2924/01079 , H01L2924/10253 , H01L2924/00
摘要： In a light emitting device, a light emitting chip (12, 112) includes a stack of semiconductor layers (14) and an electrode (24, 141, 142) disposed on the stack of semiconductor layers. A support (10, 10′, 110, 210) has a generally planar surface (30) supporting the light emitting chip in a flip-chip fashion. An electrically conductive chip attachment material (40, 41, 141, 142) is recessed into the generally planar surface of the support such that the attachment material does not protrude substantially above the generally planar surface of the support. The attachment material provides electrical communication between the electrode of the light emitting chip and an electrically conductive path (36, 36′) of the support. Optionally, at least the stack of semiconductor layers and the electrode of the light emitting chip are also recessed into the generally planar surface of the support.
摘要翻译：在发光器件中，发光芯片（12,112）包括堆叠的半导体层（14）和设置在半导体层堆叠上的电极（24,141,142）。支撑件（10,10'，110,210）具有以倒装芯片方式支撑发光芯片的大致平坦的表面（30）。导电芯片附接材料（40,41,141,142）凹入到支撑件的大致平坦的表面中，使得附接材料基本不突出在支撑体的大致平坦的表面上方。附着材料提供发光芯片的电极与支撑体的导电路径（36,36'）之间的电连通。可选地，至少半导体层的叠层和发光芯片的电极也凹入到支撑体的大致平坦的表面中。

38. 发明申请

US20080035947A1 Surface Mount Light Emitting Chip Package 审中-公开
标题翻译：表面贴装发光芯片封装
公开(公告)号：US20080035947A1
公开(公告)日：2008-02-14
申请号：US10582377
申请日：2004-12-09
申请人： Stanton Earl Weaver Jr. , Chen-Lun Hsing Chen , Boris Kolodin , Thomas Elliot Stecher , James Reginelli , Deborah Ann Haitko , Xiang Gao , Ivan Eliashevich
发明人： Stanton Earl Weaver Jr. , Chen-Lun Hsing Chen , Boris Kolodin , Thomas Elliot Stecher , James Reginelli , Deborah Ann Haitko , Xiang Gao , Ivan Eliashevich
IPC分类号： H01L33/00
CPC分类号： H01L33/64 , H01L25/0753 , H01L33/62 , H01L2224/48091 , H01L2924/10253 , H01L2924/12041 , H01L2924/00014 , H01L2924/00
摘要： A surface mount light emitting package includes a chip carrier having top and bottom principal surfaces. At least one light emitting chip is attached to the top principal surface of the chip carrier. A lead frame attached to the top principal surface of the chip carrier. When surface mounted to an associated support, the bottom principal surface of the chip carrier is in thermal contact with the associated support without the lead frame intervening therebetween.
摘要翻译：表面安装发光封装包括具有顶部和底部主表面的芯片载体。至少一个发光芯片附着到芯片载体的顶部主表面。连接到芯片载体的顶部主表面的引线框架。当表面安装到相关联的支撑件时，芯片载体的底部主表面与相关联的支撑件热接触，而没有引导框架介于其间。

39. 发明申请

US20070145379A1 Optimized contact design for thermosonic bonding of flip-chip devices 有权
标题翻译：优化的倒装芯片器件热键合接触设计
公开(公告)号：US20070145379A1
公开(公告)日：2007-06-28
申请号：US10588473
申请日：2004-12-22
申请人： Ivan Eliashevich , Hari Venugopalan , Xiang Gao , Michael Sackrison
发明人： Ivan Eliashevich , Hari Venugopalan , Xiang Gao , Michael Sackrison
IPC分类号： H01L33/00
CPC分类号： H01L33/382 , H01L33/20 , H01L33/62 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2924/01079 , H01L2924/12041 , H01L2224/05599
摘要： A light emitting device (A) includes a semiconductor die (100). The semiconductor die includes: an epitaxial structure (120) arranged on a substrate (160), the epitaxial structure forming an active light generating region (140) between a first layer (120n) on a first side of the active region and having a first conductivity type, and a second layer (120p) on a second side of the active region and having a second conductivity type, the second side of the active region being opposite the first side of the active region and the second conductivity type being different that the first conductivity type; a first contact (180n) in operative electrical communication with the active region via the first layer in the epitaxial structure, the first contact being arranged on a side of the epitaxial structure opposite the substrate; a second contact (180p) in operative electrical communication with the active region via the second layer in the epitaxial structure, the second contact being arranged on a side of the epitaxial structure opposite the substrate; a first contact trace corresponding to the first contact and defined at a surface thereof distal from the substrate, the first trace including at least one area designated for bonding (320n); and, a second contact trace corresponding the second contact and defined at a surface thereof distal from the substrate, the second trace including at least one area (320p) designated for bonding. Suitably, the first contact trace is substantially enclosed within the second contact trace.
摘要翻译：发光器件（A）包括半导体管芯（100）。所述半导体管芯包括：布置在衬底（160）上的外延结构（120），所述外延结构在所述有源区的第一侧上的第一层（120 n）之间形成有源光产生区（140），并且具有第一导电类型和在有源区的第二侧上具有第二导电类型的第二层（120 p），有源区的第二面与有源区的第一侧相反，第二导电类型不同第一种导电类型; 经由外延结构中的第一层与有源区域工作电连通的第一接触（180n），第一接触件布置在与衬底相对的外延结构的一侧上; 通过外延结构中的第二层与有源区域电连通的第二触点（180p），第二触点布置在与衬底相对的外延结构的一侧上; 第一接触迹线对应于第一接触并限定在其远离基底的表面，第一迹线包括指定用于键合的至少一个区域（320n）; 以及与所述第二接触相对应并限定在其远离所述基底的表面的第二接触迹线，所述第二迹线包括指定用于接合的至少一个区域（320 p）。适当地，第一接触迹线基本上封闭在第二接触迹线内。

40. 发明申请

US20070114557A1 Flip-chip light emitting diode device without sub-mount 审中-公开
公开(公告)号：US20070114557A1
公开(公告)日：2007-05-24
申请号：US11654165
申请日：2007-01-16
申请人： Bryan Shelton , Sebastien Libon , Hari Venugopalan , Ivan Eliashevich , Stanton Weaver , Chen-Lun Chen , Thomas Soules , Steven LeBoeuf , Stephen Arthur
发明人： Bryan Shelton , Sebastien Libon , Hari Venugopalan , Ivan Eliashevich , Stanton Weaver , Chen-Lun Chen , Thomas Soules , Steven LeBoeuf , Stephen Arthur
IPC分类号： H01L33/00
CPC分类号： H01L33/62 , H01L24/81 , H01L33/38 , H01L2224/0345 , H01L2224/03462 , H01L2224/0401 , H01L2224/04026 , H01L2224/05005 , H01L2224/05023 , H01L2224/05027 , H01L2224/0508 , H01L2224/05139 , H01L2224/05144 , H01L2224/05155 , H01L2224/05564 , H01L2224/05568 , H01L2224/05611 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1357 , H01L2224/13639 , H01L2224/13644 , H01L2224/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/3003 , H01L2224/73103 , H01L2224/73203 , H01L2224/83193 , H01L2224/83203 , H01L2224/83205 , H01L2224/8321 , H01L2224/8323 , H01L2224/83815 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/00014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2924/00 , H01L2924/00012
摘要： A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).

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