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    • 1. 发明授权
    • ESD protection structure
    • ESD保护结构
    • US08981482B2
    • 2015-03-17
    • US13241079
    • 2011-09-22
    • Xiang Gao
    • Xiang Gao
    • H01L29/772H01L27/02H01L29/08H01L29/10H01L29/74H01L29/06H01L29/749H01L29/78
    • H01L27/027H01L29/0649H01L29/0834H01L29/1016H01L29/7436H01L29/749H01L29/7835
    • A device used as an ESD protection structure, which is a modified N-type LDMOS device is disclosed. A conventional LDMOS includes only one N-type heavily doped region as a drain in an N-type lightly doped region (11), while the device of the invention includes a P-type heavily doped region (22) in an N-type lightly doped region (11), dividing the N-type heavily doped region into two N-type heavily doped regions (21, 23) unconnected and independent to each other. The N-type heavily doped region (21) close to the gate (14) has no picking-up terminal. The N-type heavily doped region (23) away from the gate (14) together with the P-type heavily doped region (22) is picked up and connected to an input/output bonding pad.
    • 公开了一种用作ESD保护结构的器件,其是修改的N型LDMOS器件。 常规LDMOS在N型轻掺杂区域(11)中仅包括一个N型重掺杂区域作为漏极,而本发明的器件包括N型轻掺杂区域中的P型重掺杂区域(22) 掺杂区域(11),将N型重掺杂区域划分成彼此不连接和独立的两个N型重掺杂区域(21,23)。 接近栅极(14)的N型重掺杂区域(21)没有拾取端子。 与P型重掺杂区域(22)一起离开栅极(14)的N型重掺杂区域(23)被拾取并连接到输入/输出接合焊盘。
    • 3. 发明申请
    • MEASUREMENT OF COMPOSITION FOR THIN FILMS
    • 薄膜组合物的测定
    • US20130006539A1
    • 2013-01-03
    • US13524053
    • 2012-06-15
    • Ming DiTorsten R. KaackQiang ZhaoXiang GaoLeonid Poslavsky
    • Ming DiTorsten R. KaackQiang ZhaoXiang GaoLeonid Poslavsky
    • G06F19/00G01J3/02
    • G01N21/211G01N21/8422G01N2021/213
    • The present invention includes generating a three-dimensional design of experiment (DOE) for a plurality of semiconductor wafers, a first dimension of the DOE being a relative amount of a first component of the thin film, a second dimension of the DOE being a relative amount of a second component of the thin film, a third dimension of the DOE being a thickness of the thin film, acquiring a spectrum for each of the wafers, generating a set of optical dispersion data by extracting a real component (n) and an imaginary component (k) of the complex index of refraction for each of the acquired spectrum, identifying one or more systematic features of the set of optical dispersion data; and generating a multi-component Bruggeman effective medium approximation (BEMA) model utilizing the identified one or more systematic features of the set of optical dispersion data.
    • 本发明包括生成多个半导体晶片的实验(DOE)的三维设计,DOE的第一维度是薄膜的第一分量的相对量,DOE的第二维度是相对的 量的第二分量,DOE的第三维度是薄膜的厚度,获取每个晶片的光谱,通过提取实数分量(n)和产生一组光散射数据 用于识别所述光学色散数据集合中的一个或多个系统特征的每个所获取的光谱的复折射率的虚分量(k); 以及使用所述一组或多个光学色散数据的一个或多个系统特征来生成多分量Bruggeman有效中等近似(BEMA)模型。
    • 6. 发明授权
    • PIN diode structure with zinc diffusion region
    • PIN二极管结构与锌扩散区
    • US08022495B2
    • 2011-09-20
    • US12420213
    • 2009-04-08
    • Xiang GaoAlex CeruzziLinlin LiuStephen Schwed
    • Xiang GaoAlex CeruzziLinlin LiuStephen Schwed
    • H01L31/06
    • H01L31/105
    • A PIN photodiode having a substrate, a first type electrode layer disposed on the substrate, a first layer of intrinsic material disposed over a portion of the first-type electrode layer, and a first type window layer disposed over the intrinsic layer. An island shaped region of intrinsic material is disposed over the window layer and a dielectric layer is disposed over the island region and at least the peripheral portion of said island shaped region whereby an opening is formed in the island shaped region. A dopant is diffused through the opening so as to form a PN junction that extends into the first layer of intrinsic material.
    • PIN光电二极管,其具有基板,设置在基板上的第一类型电极层,设置在第一类型电极层的一部分上的第一本征材料层,以及设置在本征层上的第一类型窗口层。 本征材料的岛状区域设置在窗口层上方,并且电介质层设置在岛状区域和至少所述岛状区域的周边部分上,从而在岛状区域中形成开口。 掺杂剂通过开口扩散,以便形成延伸到本征材料的第一层中的PN结。