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11. 发明申请

US20130323922A1 SPLIT GATE MEMORY DEVICE WITH GAP SPACER 有权
公开(公告)号：US20130323922A1
公开(公告)日：2013-12-05
申请号：US13961574
申请日：2013-08-07
申请人： JINMIAO J. SHEN , Ko-Min Chang , Brian A. Winstead
发明人： JINMIAO J. SHEN , Ko-Min Chang , Brian A. Winstead
IPC分类号： H01L29/423
CPC分类号： H01L29/42344 , H01L21/28273 , H01L21/28282 , H01L29/42328 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： A method for forming a split gate device includes forming a first sidewall of a first conductive gate layer, wherein the semiconductor layer includes a tunnel region laterally adjacent the first sidewall, forming a dielectric layer along the first sidewall to provide for increased thickness of a gap spacer, forming a charge storage layer over a portion of a top surface of the first conductive layer and over the tunnel region, and forming a second conductive gate layer over the charge storage layer.

12. 发明申请

US20100240156A1 METHOD FOR PROVIDING A NON-VOLATILE MEMORY 有权
标题翻译：提供非易失性存储器的方法
公开(公告)号：US20100240156A1
公开(公告)日：2010-09-23
申请号：US12405308
申请日：2009-03-17
申请人： Mohammed Suhail , Ko-Min Chang , Peter J. Kuhn , Erwin J. Prinz
发明人： Mohammed Suhail , Ko-Min Chang , Peter J. Kuhn , Erwin J. Prinz
IPC分类号： H01L21/66
CPC分类号： G11C29/06 , G11C16/04 , G11C29/50 , G11C29/50004 , G11C29/50016 , G11C2029/0403
摘要： Testing a non volatile memory by exposing the non volatile memory to particle radiation (e.g. xenon ions) to emulate memory cell damage due to data state changing events of a non volatile memory cell. After the exposing, the memory cells are subjected to tests and the results of the tests are used to develop reliability indications of the non volatile memory. Integrated circuits with non volatile memories of the same design are provided. Reliability representations of the integrated circuits can be made with respect to a number of data state charging events based on the exposure and subsequent tests.
摘要翻译：通过将非易失性存储器暴露于粒子辐射（例如氙离子）来测试非易失性存储器，以模拟由非易失性存储器单元的数据状态改变事件引起的存储器单元损坏。在曝光之后，对存储器单元进行测试，并且测试结果用于开发非易失性存储器的可靠性指示。提供了具有相同设计的非易失性存储器的集成电路。集成电路的可靠性表示可以基于曝光和随后的测试相对于多个数据状态充电事件进行。

13. 发明授权

US07700439B2 Silicided nonvolatile memory and method of making same 有权
标题翻译：硅化非易失性存储器及其制造方法
公开(公告)号：US07700439B2
公开(公告)日：2010-04-20
申请号：US11376410
申请日：2006-03-15
申请人： Erwin J. Prinz , Ko-Min Chang , Robert F. Steimle
发明人： Erwin J. Prinz , Ko-Min Chang , Robert F. Steimle
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , B82Y10/00 , H01L21/28273 , H01L27/115
摘要： A memory device is formed on a semiconductor substrate. A select gate electrode and a control gate electrode are formed adjacent to one another. One of either the select gate electrode or the control gate electrodes is recessed with respect to the other. The recess allows for a manufacturable process with which to form silicided surfaces on both the select gate electrode and the control gate electrode.
摘要翻译：存储器件形成在半导体衬底上。选择栅电极和控制栅电极彼此相邻地形成。选择栅极电极或控制栅电极中的一个相对于另一个凹陷。该凹槽允许用于在选择栅极电极和控制栅极电极上形成硅化物表面的可制造工艺。

14. 发明授权

US07619275B2 Process for forming an electronic device including discontinuous storage elements 失效
标题翻译：用于形成包括不连续存储元件的电子设备的方法
公开(公告)号：US07619275B2
公开(公告)日：2009-11-17
申请号：US11188935
申请日：2005-07-25
申请人： Michael A. Sadd , Ko-Min Chang , Gowrishankar L. Chindalore , Cheong M. Hong , Craig T. Swift
发明人： Michael A. Sadd , Ko-Min Chang , Gowrishankar L. Chindalore , Cheong M. Hong , Craig T. Swift
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , B82Y10/00 , G11C16/0475 , H01L21/7624 , H01L27/11519 , H01L27/11556 , H01L29/42328 , H01L29/42332 , H01L29/42336
摘要： A process for forming an electronic device can include forming a trench within a substrate, wherein the trench includes a wall and a bottom. The process can also include including forming a portion of discontinuous storage elements that lie within the trench, and forming a first gate electrode within the trench after forming the discontinuous storage elements. At least one discontinuous storage element lies along the wall of the trench at an elevation between an upper surface of the first gate electrode and a primary surface of the substrate. The process can also include forming a second gate electrode overlying the first gate electrode and the primary surface of the substrate.
摘要翻译：用于形成电子器件的方法可以包括在衬底内形成沟槽，其中沟槽包括壁和底部。该方法还可以包括形成位于沟槽内的不连续存储元件的一部分，以及在形成不连续存储元件之后在沟槽内形成第一栅电极。至少一个不连续的存储元件位于第一栅电极的上表面和衬底的主表面之间的海拔处的沟槽的壁处。该工艺还可以包括形成覆盖在第一栅电极和衬底的主表面上的第二栅电极。

15. 发明授权

US5706228A Method for operating a memory array 失效
标题翻译：操作存储器阵列的方法
公开(公告)号：US5706228A
公开(公告)日：1998-01-06
申请号：US603939
申请日：1996-02-20
申请人： Kuo-Tung Chang , Craig A. Cavins , Ko-Min Chang , Bruce L. Morton , George L. Espinor
发明人： Kuo-Tung Chang , Craig A. Cavins , Ko-Min Chang , Bruce L. Morton , George L. Espinor
IPC分类号： G11C16/04 , G11C16/10 , G11C11/40
CPC分类号： G11C16/3427 , G11C16/0433 , G11C16/10
摘要： A memory array (25) having a selected memory cell (10) and an unselected memory cell (30) is programmed and read. Each memory cell in the memory array (25) contains an isolation transistor (22) and a floating gate transistor (23). To program the selected memory cell (10), programming voltages are applied to a control gate line (21), a drain line (14), an isolation line (19), and a source line (12). To reduce the effects of the drain disturb problem, a gate terminal (32) of the unselected memory cell (30) is held at a positive voltage. To read selected memory cell (10), a read voltage is applied to an isolation gate line (31) of unselected memory cell (30) which insures that the unselected memory cell (30) does not conduct or contribute to leakage current and power consumption during the read operation.
摘要翻译：具有选定的存储单元（10）和未选择的存储单元（30）的存储器阵列（25）被编程和读取。存储器阵列（25）中的每个存储单元包含隔离晶体管（22）和浮动栅极晶体管（23）。为了对所选择的存储单元（10）进行编程，将编程电压施加到控制栅极线（21），漏极线（14），隔离线（19）和源极线（12）。为了减小漏极干扰问题的影响，未选择的存储单元（30）的栅极端子（32）被保持在正电压。为了读取所选择的存储单元（10），读取电压被施加到未选择存储单元（30）的隔离栅极线（31），其确保未选择的存储单元（30）不导通或有助于漏电流和功耗在读操作期间。

16. 发明授权

US5273923A Process for fabricating an EEPROM cell having a tunnel opening which overlaps field isolation regions 失效
标题翻译：用于制造具有与场隔离区重叠的隧道开口的EEPROM单元的工艺
公开(公告)号：US5273923A
公开(公告)日：1993-12-28
申请号：US773791
申请日：1991-10-09
申请人： Ko-Min Chang , Clinton C. K. Kuo , Ming-Bing Chang
发明人： Ko-Min Chang , Clinton C. K. Kuo , Ming-Bing Chang
IPC分类号： G11C17/00 , H01L21/8247 , H01L29/788 , H01L29/792 , H01L21/302 , H01L21/38 , H01L27/115
CPC分类号： H01L27/11521 , H01L27/11524 , H01L29/7883
摘要： An EEPROM cell (10) has a tunnel opening (28) which overlaps both an active region (12) and field isolation regions (14). A tunnel area (30), which is that portion of the cell in which electrons tunnel through a tunnel dielectric (32) to charge or discharge a floating gate (22) during device operation, is defined as the overlapped portion of the tunnel opening (28) and the active region (12). By having the tunnel opening (28) larger than the tunnel area (30), etch processes used to pattern the opening in a gate dielectric (26) are more easily controlled and the active region area beneath the floating gate is reduced. The EEPROM cell (10) has a tunnel area which is limited in size by lithographic resolution capabilities rather than by limitations in dielectric etch processes. The tunnel features increase a capacitance coupling ratio of the cell.
摘要翻译： EEPROM单元（10）具有与有源区域（12）和场隔离区域（14）重叠的隧道开口（28）。隧道区域（30）是在设备操作期间电子穿过隧道电介质（32）充电或放电浮动栅极（22）的电池部分被定义为隧道开口的重叠部分（30） 28）和有源区（12）。通过使隧道开口（28）大于隧道区域（30），更容易控制用于对栅极电介质（26）中的开口进行图案化的蚀刻工艺，并且浮动栅极下方的有源区域面积减小。 EEPROM单元（10）具有通过光刻分辨能力限制尺寸的隧道区域，而不是通过电介质蚀刻工艺的限制。隧道特征增加了电池的电容耦合比。

17. 发明申请

US20140295639A1 FIELD FOCUSING FEATURES IN A RERAM CELL 有权
标题翻译： RERAM细胞中的场聚焦特征
公开(公告)号：US20140295639A1
公开(公告)日：2014-10-02
申请号：US14301900
申请日：2014-06-11
申请人： FENG ZHOU , Frank K. Baker, JR. , Ko-Min Chang , Cheong Min Hong
发明人： FENG ZHOU , Frank K. Baker, JR. , Ko-Min Chang , Cheong Min Hong
IPC分类号： H01L45/00
CPC分类号： H01L45/16 , H01L45/04 , H01L45/1233 , H01L45/1246 , H01L45/1273 , H01L45/146 , H01L45/1675
摘要： A resistive random access memory (ReRAM) cell comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and a layer of conductive nanoclusters (911, 1211) including a plurality of nanoclusters in contact with the dielectric storage material layer and in contact with the first conductive electrode or the second conductive electrode.
摘要翻译：一种电阻随机存取存储器（ReRAM）单元，包括在第一导电电极上的第一导电电极和介电存储材料层。电介质存储材料层有利于在将细丝形成电压施加到电池时形成导电细丝。电池包括位于介电存储材料层上的第二导电电极和包括与电介质存储材料层接触并与第一导电电极或第二导电电极接触的多个纳米团簇的导电纳米团簇层（911,1211）。

18. 发明授权

US08779405B2 Field focusing features in a ReRAM cell 有权
标题翻译： ReRAM单元中的场聚焦功能
公开(公告)号：US08779405B2
公开(公告)日：2014-07-15
申请号：US13486690
申请日：2012-06-01
申请人： Feng Zhou , Frank K. Baker, Jr. , Ko-Min Chang , Cheong Min Hong
发明人： Feng Zhou , Frank K. Baker, Jr. , Ko-Min Chang , Cheong Min Hong
IPC分类号： H01L29/02
CPC分类号： H01L45/16 , H01L45/04 , H01L45/1233 , H01L45/1246 , H01L45/1273 , H01L45/146 , H01L45/1675
摘要： A resistive random access memory (ReRAM) cell comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and a layer of conductive nanoclusters (911, 1211) including a plurality of nanoclusters in contact with the dielectric storage material layer and in contact with the first conductive electrode or the second conductive electrode.
摘要翻译：一种电阻随机存取存储器（ReRAM）单元，包括在第一导电电极上的第一导电电极和介电存储材料层。电介质存储材料层有利于在将细丝形成电压施加到电池时形成导电细丝。电池包括位于介电存储材料层上的第二导电电极和包括与电介质存储材料层接触并与第一导电电极或第二导电电极接触的多个纳米团簇的导电纳米团簇（911,1211）。

19. 发明申请

US20130320284A1 FIELD FOCUSING FEATURES IN A RERAM CELL 有权
标题翻译： RERAM细胞中的场聚焦特征
公开(公告)号：US20130320284A1
公开(公告)日：2013-12-05
申请号：US13486641
申请日：2012-06-01
申请人： Feng Zhou , Frank K. Baker, JR. , Ko-Min Chang , Cheong Min Hong
发明人： Feng Zhou , Frank K. Baker, JR. , Ko-Min Chang , Cheong Min Hong
IPC分类号： H01L45/00
CPC分类号： B82Y10/00 , G11C13/0007 , H01L45/00 , H01L45/04 , H01L45/1233 , H01L45/1246 , H01L45/1273 , H01L45/146 , H01L45/16 , H01L45/1675
摘要： A resistive random access memory (ReRAM) cell, comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and an interface region comprising a plurality of interspersed field focusing features that are not photo-lithographically defined. The interface region is located between the first conductive electrode and the dielectric storage material layer or between the dielectric storage material layer and the second conductive electrode.
摘要翻译：一种电阻随机存取存储器（ReRAM）单元，包括在第一导电电极上的第一导电电极和介电存储材料层。电介质存储材料层有利于在将细丝形成电压施加到电池时形成导电细丝。该电池包括介于电介质存储材料层之间的第二导电电极和包含多个散布的场聚焦特征的界面区域，其不是光刻的。界面区域位于第一导电电极和介电存储材料层之间，或位于介电存储材料层和第二导电电极之间。

20. 发明申请

US20130264533A1 RERAM DEVICE STRUCTURE 有权
标题翻译： RERAM设备结构
公开(公告)号：US20130264533A1
公开(公告)日：2013-10-10
申请号：US13442046
申请日：2012-04-09
申请人： CHEONG Min HONG , Ko-Min Chang , Feng Zhou
发明人： CHEONG Min HONG , Ko-Min Chang , Feng Zhou
IPC分类号： H01L45/00 , H01L21/8239
CPC分类号： H01L45/1633 , H01L45/04 , H01L45/1233 , H01L45/146
摘要： A resistive random access memory (ReRAM) includes a first metal layer having a first metal and a metal-oxide layer on the first metal layer. The metal-oxide layer inlcudes the first metal. The ReRAM further includes a second metal layer over the metal-oxide layer and a first continuous conductive barrier layer in physical contact with sidewalls of the first metal layer and of the metal-oxide layer.
摘要翻译：电阻式随机存取存储器（ReRAM）包括在第一金属层上具有第一金属和金属氧化物层的第一金属层。金属氧化物层包含第一金属。 ReRAM还包括在金属氧化物层上的第二金属层和与第一金属层和金属氧化物层的侧壁物理接触的第一连续导电阻挡层。

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