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11. 发明授权

US5323138A Reliable thin film resistors for integrated circuit applications 失效
标题翻译：用于集成电路应用的可靠的薄膜电阻
公开(公告)号：US5323138A
公开(公告)日：1994-06-21
申请号：US940556
申请日：1992-09-04
申请人： Aaron K. Oki , Donald K. Umemoto , Frank M. Yamada , Dwight C. Streit
发明人： Aaron K. Oki , Donald K. Umemoto , Frank M. Yamada , Dwight C. Streit
IPC分类号： H01C7/00 , H01C1/012
CPC分类号： H01C7/006
摘要： A thin film resistor with an insulating layer disposed between a substrate material and a resistor material is disclosed. Also, disclosed is a technique for fabricating this thin film resistor. In accordance with the preferred embodiment, the thin film resistor employs an insulating layer of silicon nitride with a thickness of 2000 .ANG.. The insulating layer prevents the resistor layer from diffusing into the substrate material which, in turn, significantly reduces variations in the resistor value during accelerated life testing. Compared to thin film resistors with a resistor layer evaporated directly upon a substrate material, reliability is increased from a few hundred hours up to thousands of hours. Also, the maximum current handling capability is increased by greater than one order of magnitude, which results in a thin film resistor which requires less surface area of a wafer.
摘要翻译：公开了一种具有设置在基板材料和电阻材料之间的绝缘层的薄膜电阻器。此外，公开了一种制造该薄膜电阻器的技术。根据优选实施例，薄膜电阻器使用厚度为2000安培的氮化硅绝缘层。绝缘层防止电阻层扩散到衬底材料中，这又显着地减少了加速寿命测试期间电阻值的变化。与直接在衬底材料上蒸发的电阻层的薄膜电阻器相比，可靠性从几百小时提高到数千小时。此外，最大电流处理能力增加大于一个数量级，这导致需要较少的晶片表面积的薄膜电阻器。

12. 发明授权

US5892248A Double photoresist layer self-aligned heterojuction bipolar transistor 失效
标题翻译：双光阻层自对准异质双极晶体管
公开(公告)号：US5892248A
公开(公告)日：1999-04-06
申请号：US720388
申请日：1996-09-30
申请人： Aaron K. Oki , Donald K. Umemoto , Liem T. Tran , Dwight C. Streit
发明人： Aaron K. Oki , Donald K. Umemoto , Liem T. Tran , Dwight C. Streit
IPC分类号： H01L29/73 , H01L21/331 , H01L29/205 , H01L29/737 , H01L31/0328 , H01L27/082 , H01L31/0336
CPC分类号： H01L29/66318 , Y10S148/01 , Y10S148/011 , Y10S148/072 , Y10S148/10 , Y10S148/143
摘要： A heterojunction bipolar transistor and a method for fabricating an HBT with self-aligned base metal contacts using a double photoresist, which requires fewer process steps than known methods, while minimizing damage to the active emitter contact region. In particular, a photoresist is used to form the emitter mesa. The emitter mesa photoresist is left on and a double polymethylmethacrylate (PMMA) and photoresist layer is then applied. The triple photoresist combination is patterned to create a non-critical lateral alignment for the base metal contacts to the emitter mesa, which permits selective base ohmic metal deposition and lift-off. By utilizing the double photoresist as opposed to a metal or dielectric for masking, an additional photolithography step and etching step is eliminated. By eliminating the need for an additional etching step, active regions of the semiconductors are prevented from being exposed to the etching step and possibly damaged.
摘要翻译：异相结双极晶体管和使用双光致抗蚀剂制造具有自对准基底金属触点的HBT的方法，其比已知方法需要更少的工艺步骤，同时最小化对有源发射极接触区域的损害。特别地，光致抗蚀剂用于形成发射台台面。留下发射台面光致抗蚀剂，然后施加双重聚甲基丙烯酸甲酯（PMMA）和光致抗蚀剂层。将三重光致抗蚀剂组合图案化以产生用于基底金属接触到发射极台面的非关键侧向对准，这允许选择性基极欧姆金属沉积和剥离。通过利用双光致抗蚀剂与用于掩蔽的金属或电介质相反，消除了额外的光刻步骤和蚀刻步骤。通过消除对另外的蚀刻步骤的需要，可以防止半导体的有源区暴露于蚀刻步骤并且可能被损坏。

13. 发明授权

US5736417A Method of fabricating double photoresist layer self-aligned heterojunction bipolar transistor 失效
标题翻译：制造双光致抗蚀剂层自对准异质结双极晶体管的方法
公开(公告)号：US5736417A
公开(公告)日：1998-04-07
申请号：US647609
申请日：1996-05-13
申请人： Aaron K. Oki , Donald K. Umemoto , Liem T. Tran , Dwight C. Streit
发明人： Aaron K. Oki , Donald K. Umemoto , Liem T. Tran , Dwight C. Streit
IPC分类号： H01L29/73 , H01L21/331 , H01L29/205 , H01L29/737 , H01L21/265
CPC分类号： H01L29/66318 , Y10S148/01 , Y10S148/011 , Y10S148/072 , Y10S148/10 , Y10S148/143
摘要： A heterejunction bipolar transistor and a method for fabricating an HBT with self-aligned base metal contacts using a double photoresist, which requires fewer process steps than known methods, while minimizing damage to the active emitter contact region. In particular, a photoresist is used to form the emitter mesa. The emitter mesa photoresist is left on and a double polymethylmethacrylate (PMMA) and photoresist layer is then applied. The triple photoresist combination is patterned to create a non-critical lateral alignment for the base metal contacts to the emitter mesa, which permits selective base ohmic metal deposition and lift-off. By utilizing the double photoresist as opposed to a metal or dielectric for masking, an additional photolithography step and etching step is eliminated. By eliminating the need for an additional etching step, active regions of the semiconductors are prevented from being exposed to the etching step and possibly damaged.
摘要翻译：双极性晶体管和使用双光致抗蚀剂制造具有自对准基底金属触点的HBT的方法，其需要比已知方法更少的工艺步骤，同时最小化对有源发射极接触区域的损害。特别地，光致抗蚀剂用于形成发射台台面。留下发射台面光致抗蚀剂，然后施加双重聚甲基丙烯酸甲酯（PMMA）和光致抗蚀剂层。将三重光致抗蚀剂组合图案化以产生用于基底金属接触到发射极台面的非关键侧向对准，这允许选择性基极欧姆金属沉积和剥离。通过利用双光致抗蚀剂与用于掩蔽的金属或电介质相反，消除了额外的光刻步骤和蚀刻步骤。通过消除对另外的蚀刻步骤的需要，可以防止半导体的有源区暴露于蚀刻步骤并且可能被损坏。

14. 发明授权

US6072371A Quenchable VCO for switched band synthesizer applications 失效
标题翻译：用于切换频带合成器应用的可淬火VCO
公开(公告)号：US6072371A
公开(公告)日：2000-06-06
申请号：US876275
申请日：1997-06-16
申请人： Kevin W. Kobayashi , Duncan M. Smith , Aaron K. Oki , Arvind K. Sharma , Barry R. Allen
发明人： Kevin W. Kobayashi , Duncan M. Smith , Aaron K. Oki , Arvind K. Sharma , Barry R. Allen
IPC分类号： H03L7/099 , H03B5/02 , H03B5/18 , H03B5/00 , H03B5/12
CPC分类号： H03B5/1847
摘要： A quenchable VCO that is adapted to be used in switched band synthesizer applications. The VCO may be formed from a heterojunction bipolar transistor (HBT) in a common collector configuration. A quenching circuit which includes a p-i-n diode, is electrically coupled in series with the collector of the HBT. The p-i-n diode is adapted to be monolithically integrated with the HBT. Since the p-i-n diode is electrically connected to the collector of the HBT, as opposed to the base and emitter terminals of the HBT, which forms the main oscillator feedback loop, the Q-factor of the p-i-n diode will have relatively less loading on the phase noise of the HBT oscillator. Moreover, since the p-i-n diode is isolated from the base-emitter junction, the configuration will result in reduced frequency pulling and generation of spurious oscillation and transient effects due to the switching of the p-i-n diode quenched circuit. The use of a p-i-n diode for quenching of VCO also provides other inherent advantages over other types of semi-conductor switches, such as FET, Schottky diodes, PN diodes for quenchable VCO applications because p-i-n diodes are relative insensitive to RF and noise modulation. Because the p-i-n diode can be constructed from existing HBT collector-base MBE epitaxy layers, the quenching circuit can be manufactured relatively inexpensively.
摘要翻译：一种适用于切换频带合成器应用的可淬火VCO。 VCO可以由公共集电器配置中的异质结双极晶体管（HBT）形成。包括p-i-n二极管的淬火电路与HBT的集电器串联电耦合。 p-i-n二极管适于与HBT单片集成。由于pin二极管与HBT的集电极电连接，与形成主振荡器反馈环路的HBT的基极和发射极端子相反，因此pin二极管的Q因子在相位上的负载相对较小 HBT振荡器的噪声。此外，由于p-i-n二极管与基极 - 发射极结隔离，所以由于p-i-n二极管骤冷电路的切换，该结构将导致降低的频率拉动和寄生振荡的产生以及瞬态效应。与其他类型的半导体开关（例如FET，肖特基二极管，用于可淬灭的VCO应用的PN二极管）相比，使用p-i-n二极管来淬灭VCO也具有其他固有的优点，因为p-i-n二极管对RF和噪声调制相对不敏感。因为p-i-n二极管可以由现有的HBT集电极基极MBE外延层构成，所以可以相对廉价地制造淬火电路。

15. 发明授权

US5448087A Heterojunction bipolar transistor with graded base doping 失效
标题翻译：异质结双极晶体管，具有分级基极掺杂
公开(公告)号：US5448087A
公开(公告)日：1995-09-05
申请号：US876199
申请日：1992-04-30
申请人： Swight C. Streit , Aaron K. Oki
发明人： Swight C. Streit , Aaron K. Oki
IPC分类号： H01L29/10 , H01L29/737 , H01L29/161 , H01L29/205 , H01L29/225
CPC分类号： H01L29/7371 , H01L29/1004
摘要： A heterojunction bipolar transistor with an exponentially graded base doping is disclosed, in addition to a technique for fabricating the transistor. In accordance with the preferred embodiment, the transistor employs a base with an exponentially graded Beryllium doping which varies from 5.times.10.sup.19 cm.sup.-3 at the base-emitter junction to 5.times.10.sup.18 cm.sup.-3 at the base-collector junction. The built-in field due to the exponentially graded doping profile significantly reduces base transit time despite bandgap narrowing associated with high base doping. Compared to devices with the same base thickness and uniform base doping, the cut off frequency is increased and the maximum frequency of oscillation is also increased. Also, consistently higher common emitter current gain results even though the Gummel number is twice as high and the base resistance is reduced by 40%.
摘要翻译：除了制造晶体管的技术之外，还公开了具有指数梯度的基极掺杂的异质结双极晶体管。根据优选实施例，晶体管采用具有指数级渐变的铍掺杂的基极，其在基极 - 集电极结处的基极 - 发射极结处从5×10 19 cm -3变化到5×10 18 cm -3。由于具有指数梯度的掺杂特性，内置场可显着降低基极通过时间，尽管与高基极掺杂相关的带隙变窄。与具有相同基底厚度和均匀基极掺杂的器件相比，截止频率增加，振荡的最大频率也增加。此外，尽管Gummel数量是两倍高，基极电阻降低了40％，但始终更高的公共发射极电流增益。

16. 发明授权

US5986517A Low-loss air suspended radially combined patch for N-way RF switch 失效
标题翻译：低损耗空气悬挂式径向组合贴片，用于N路RF开关
公开(公告)号：US5986517A
公开(公告)日：1999-11-16
申请号：US3197
申请日：1998-01-06
申请人： Kevin W. Kobayashi , Aaron K. Oki
发明人： Kevin W. Kobayashi , Aaron K. Oki
IPC分类号： H01P1/12 , H01P1/15 , H01P11/00
CPC分类号： H01P1/15 , H01P11/003
摘要： A microstrip switch includes N-input switch arms and an output port formed from a microstrip transmission line. Each input switch arm includes one or more p-i-n diodes. The input switch arms as well as the output port are connected at a radially combined center patch. In order to improve the insertion losses at millimeter wave frequencies, the center patch is air suspended in order to reduce the parasitic shunt capacitance in order to extend the low pass frequency response of the switch.
摘要翻译：微带开关包括N输入开关臂和由微带传输线形成的输出端口。每个输入开关臂包括一个或多个p-i-n二极管。输入开关臂以及输出端口连接在径向组合的中心贴片上。为了提高毫米波频率下的插入损耗，中心贴片为空气悬浮，以减小寄生并联电容，以扩展开关的低通频率响应。

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