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1. 发明授权

US09269584B2 N-metal film deposition with initiation layer 有权
标题翻译：具有起始层的N金属膜沉积
公开(公告)号：US09269584B2
公开(公告)日：2016-02-23
申请号：US13525610
申请日：2012-06-18
申请人： Seshadri Ganguli , Xinliang Lu , Atif Noori , Maitreyee Mahajani , Shih Chung Chen , Mei Chang
发明人： Seshadri Ganguli , Xinliang Lu , Atif Noori , Maitreyee Mahajani , Shih Chung Chen , Mei Chang
IPC分类号： H01L21/44 , H01L21/28 , H01L29/49 , H01L21/02
CPC分类号： H01L21/28088 , H01L21/02697 , H01L29/4966
摘要： Provided are methods of depositing N-Metals onto a substrate. Methods include first depositing an initiation layer. The initiation layer may comprise or consist of cobalt, tantalum, nickel, titanium or TaAlC. These initiation layers can be used to deposit TaCx.
摘要翻译：提供了将N-金属沉积到基底上的方法。方法包括首先沉积起始层。起始层可以包括钴，钽，镍，钛或TaAlC。这些起始层可用于沉积TaCx。

2. 发明授权

US08642468B2 NMOS metal gate materials, manufacturing methods, and equipment using CVD and ALD processes with metal based precursors 有权
标题翻译： NMOS金属栅极材料，制造方法和使用具有金属基前体的CVD和ALD工艺的设备
公开(公告)号：US08642468B2
公开(公告)日：2014-02-04
申请号：US13093710
申请日：2011-04-25
申请人： Seshadri Ganguli , Srinivas Gandikota , Yu Lei , Xinliang Lu , Sang Ho Yu , Hoon Kim , Paul F. Ma , Mei Chang , Maitreyee Mahajani , Patricia M. Liu
发明人： Seshadri Ganguli , Srinivas Gandikota , Yu Lei , Xinliang Lu , Sang Ho Yu , Hoon Kim , Paul F. Ma , Mei Chang , Maitreyee Mahajani , Patricia M. Liu
IPC分类号： H01L21/4763
CPC分类号： H01L21/28008 , C23C16/06 , C23C16/32 , C23C16/42 , C23C16/45542 , H01L21/28079 , H01L21/28088 , H01L21/28097 , H01L21/28562 , H01L21/76843 , H01L21/76871 , H01L21/823814 , H01L21/823842 , H01L29/495 , H01L29/4966
摘要： Embodiments of the invention generally provide methods for depositing metal-containing materials and compositions thereof. The methods include deposition processes that form metal, metal carbide, metal silicide, metal nitride, and metal carbide derivatives by a vapor deposition process, including thermal decomposition, CVD, pulsed-CVD, or ALD. In one embodiment, a method for processing a substrate is provided which includes depositing a dielectric material having a dielectric constant greater than 10, forming a feature definition in the dielectric material, depositing a work function material conformally on the sidewalls and bottom of the feature definition, and depositing a metal gate fill material on the work function material to fill the feature definition, wherein the work function material is deposited by reacting at least one metal-halide precursor having the formula MXY, wherein M is tantalum, hafnium, titanium, and lanthanum, X is a halide selected from the group of fluorine, chlorine, bromine, or iodine, and y is from 3 to 5.
摘要翻译：本发明的实施方案通常提供沉积含金属材料及其组合物的方法。所述方法包括通过包括热分解，CVD，脉冲CVD或ALD的气相沉积工艺形成金属，金属碳化物，金属硅化物，金属氮化物和金属碳化物衍生物的沉积工艺。在一个实施例中，提供了一种用于处理衬底的方法，其包括沉积具有大于10的介电常数的介电材料，在电介质材料中形成特征定义，在功能定义的侧壁和底部上共同保存功函件材料并且将金属浇注填充材料沉积在功函材料上以填充特征定义，其中通过使具有式MXY的至少一种金属卤化物前体反应沉积功函材料，其中M是钽，铪，钛和镧，X是选自氟，氯，溴或碘的卤化物，y为3〜5。

3. 发明授权

US08633114B2 Methods for manufacturing high dielectric constant films 有权
标题翻译：制造高介电常数膜的方法
公开(公告)号：US08633114B2
公开(公告)日：2014-01-21
申请号：US13104521
申请日：2011-05-10
申请人： Tatsuya E. Sato , Maitreyee Mahajani
发明人： Tatsuya E. Sato , Maitreyee Mahajani
IPC分类号： H01L21/302
CPC分类号： H01L21/02181 , H01L21/0206 , H01L21/0228 , H01L21/02301 , H01L21/28194 , H01L29/513 , H01L29/517
摘要： Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.
摘要翻译：提供了在基底上沉积高k电介质膜的方法。这些方法包括在清洁表面之后退火衬底以产生悬挂键并将高k电介质膜沉积在退火表面上。

4. 发明授权

US08592305B2 Doping aluminum in tantalum silicide 有权
标题翻译：在硅化钽中掺杂铝
公开(公告)号：US08592305B2
公开(公告)日：2013-11-26
申请号：US13296715
申请日：2011-11-15
申请人： Xinliang Lu , Seshadri Ganguli , Shih Chung Chen , Atif Noori , Maitreyee Mahajani , Mei Chang
发明人： Xinliang Lu , Seshadri Ganguli , Shih Chung Chen , Atif Noori , Maitreyee Mahajani , Mei Chang
IPC分类号： H01L21/4763
CPC分类号： H01L21/28088 , H01L29/4966
摘要： Provided are methods of providing aluminum-doped TaSix films. Doping TaSix films allows for the tuning of the work function value to make the TaSix film better suited as an N-metal for NMOS applications. One such method relates to soaking a TaSix film with an aluminum-containing compound. Another method relates to depositing a TaSix film, soaking with an aluminum-containing compound, and repeating for a thicker film. A third method relates to depositing an aluminum-doped TaSix film using tantalum, aluminum and silicon precursors.
摘要翻译：提供了提供掺铝的TaSix膜的方法。掺杂TaSix薄膜允许调整功函数值，使TaSix薄膜更适合作为NMOS应用的N金属。一种这样的方法涉及用含铝化合物浸泡TaSix膜。另一种方法涉及沉积TaSix膜，用含铝化合物浸泡并重复较厚的膜。第三种方法涉及使用钽，铝和硅前体沉积掺铝的TaSix膜。

5. 发明申请

US20120220116A1 Dry Chemical Cleaning For Semiconductor Processing 审中-公开
标题翻译：干式化学清洗用于半导体加工
公开(公告)号：US20120220116A1
公开(公告)日：2012-08-30
申请号：US13192034
申请日：2011-07-27
申请人： Atif Noori , Maitreyee Mahajani , Patricia M. Liu , Steven Hung , Tatsuya E. Sato , Mei Chang
发明人： Atif Noori , Maitreyee Mahajani , Patricia M. Liu , Steven Hung , Tatsuya E. Sato , Mei Chang
IPC分类号： H01L21/28
CPC分类号： H01L21/28194 , C23C16/0245 , H01J37/32091 , H01J37/3244 , H01L21/02046 , H01L21/02301 , H01L21/28238 , H01L21/31116 , H01L21/67207 , H01L29/517
摘要： A deposition process including a dry etch process, followed by a deposition process of a high-k dielectric is disclosed. The dry etch process involves placing a substrate to be cleaned into a processing chamber to remove surface oxides. A gas mixture is energized to form a plasma of reactive gas which reacts with an oxide on the substrate, forming a thin film. The substrate is heated to vaporize the thin film and expose a substrate surface. The substrate surface is substantially free of oxides. Deposition is then used to form a layer on the substrate surface.
摘要翻译：公开了一种沉积工艺，其包括干蚀刻工艺，随后是高k电介质的沉积工艺。干蚀刻工艺涉及将要清洗的基底放置在处理室中以去除表面氧化物。气体混合物通电以形成反应性气体的等离子体，其与衬底上的氧化物反应，形成薄膜。将衬底加热以蒸发薄膜并暴露衬底表面。基底表面基本上不含氧化物。然后沉积在衬底表面上形成一层。

6. 发明授权

US08004033B2 High-density nonvolatile memory 有权
标题翻译：高密度非易失性存储器
公开(公告)号：US08004033B2
公开(公告)日：2011-08-23
申请号：US12477216
申请日：2009-06-03
申请人： S. Brad Herner , Maitreyee Mahajani
发明人： S. Brad Herner , Maitreyee Mahajani
IPC分类号： H01L29/788
CPC分类号： G11C5/02 , H01L21/8238 , H01L23/48 , H01L27/1021 , H01L27/148 , H01L29/94 , H01L2924/0002 , H01L2924/00
摘要： Nonvolatile memory cells and methods of forming the same are provided, the methods including forming a first conductor at a first height above a substrate; forming a first pillar-shaped semiconductor element above the first conductor, wherein the first pillar-shaped semiconductor element comprises a first heavily doped layer of a first conductivity type, a second lightly doped layer above and in contact with the first heavily doped layer, and a third heavily doped layer of a second conductivity type above and in contact with the second lightly doped layer, the second conductivity type opposite the first conductivity type; forming a first dielectric antifuse above the third heavily doped layer of the first pillar-shaped semiconductor element; and forming a second conductor above the first dielectric antifuse.
摘要翻译：提供了非易失存储器单元及其形成方法，所述方法包括在衬底上方的第一高度处形成第一导体; 在所述第一导体上形成第一柱状半导体元件，其中所述第一柱状半导体元件包括第一导电类型的第一重掺杂层，在所述第一重掺杂层上方并与其接触的第二轻掺杂层，以及第二导电类型的第三重掺杂层在第二轻掺杂层上方并与第二轻掺杂层接触，第二导电类型与第一导电类型相反; 在所述第一柱状半导体元件的所述第三重掺杂层的上方形成第一介电反熔丝; 以及在所述第一介电反熔丝之上形成第二导体。

7. 发明授权

US07897208B2 Low temperature ALD SiO2 有权
标题翻译：低温ALD SiO2
公开(公告)号：US07897208B2
公开(公告)日：2011-03-01
申请号：US12788131
申请日：2010-05-26
申请人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
发明人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
IPC分类号： C23C16/00 , H05H1/24
CPC分类号： C23C16/402 , C23C16/45534
摘要： The present invention generally comprises a silicon dioxide atomic layer deposition method. By providing pyridine as a catalyst, water may be utilized as the oxidization source while depositing at a low temperature. Prior to exposing the substrate to the water, the substrate may be exposed to a pyridine soak process. Additionally, the water may be co-flowed to the chamber with the pyridine through separate conduits to reduce interaction prior to entering the chamber. Alternatively, the pyridine may be co-flowed with a silicon precursor that does not react with pyridine.
摘要翻译：本发明通常包括二氧化硅原子层沉积方法。通过提供吡啶作为催化剂，可以在低温下沉积时使用水作为氧化源。在将基底暴露于水之前，可以将底物暴露于吡啶浸泡过程。此外，水可以通过单独的导管与吡啶共同流到室中，以减少进入室之前的相互作用。或者，吡啶可以与不与吡啶反应的硅前体共流。

8. 发明授权

US07749574B2 Low temperature ALD SiO2 失效
标题翻译：低温ALD SiO2
公开(公告)号：US07749574B2
公开(公告)日：2010-07-06
申请号：US11559491
申请日：2006-11-14
申请人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
发明人： Maitreyee Mahajani , Yi-Chiau Huang , Brendan McDougall
IPC分类号： H05H1/24 , C23C16/00
CPC分类号： C23C16/402 , C23C16/45534
摘要： The present invention generally comprises a silicon dioxide atomic layer deposition method. By providing pyridine as a catalyst, water may be utilized as the oxidization source while depositing at a low temperature. Prior to exposing the substrate to the water, the substrate may be exposed to a pyridine soak process. Additionally, the water may be co-flowed to the chamber with the pyridine through separate conduits to reduce interaction prior to entering the chamber. Alternatively, the pyridine may be co-flowed with a silicon precursor that does not react with pyridine.
摘要翻译：本发明通常包括二氧化硅原子层沉积方法。通过提供吡啶作为催化剂，可以在低温下沉积时使用水作为氧化源。在将基底暴露于水之前，可以将底物暴露于吡啶浸泡过程。此外，水可以通过单独的导管与吡啶共同流到室中，以减少进入室之前的相互作用。或者，吡啶可以与不与吡啶反应的硅前体共流。

9. 发明申请

US20090258462A1 METHOD FOR FORMING DOPED POLYSILICON VIA CONNECTING POLYSILICON LAYERS 有权
标题翻译：通过连接多晶硅层形成掺杂多晶硅的方法
公开(公告)号：US20090258462A1
公开(公告)日：2009-10-15
申请号：US12489214
申请日：2009-06-22
申请人： Michael W. Konevecki , Usha Raghuram , Maitreyee Mahajani , Sucheta Nallamothu , Andrew J. Walker , Tanmay Kumar
发明人： Michael W. Konevecki , Usha Raghuram , Maitreyee Mahajani , Sucheta Nallamothu , Andrew J. Walker , Tanmay Kumar
IPC分类号： H01L21/82
CPC分类号： H01L27/12 , H01L21/28282 , H01L21/84 , H01L23/535 , H01L27/0688 , H01L27/115 , H01L27/11521 , H01L27/11551 , H01L27/11568 , H01L27/11578 , H01L29/792 , H01L2924/0002 , H01L2924/00
摘要： The invention provides for polysilicon vias connecting conductive polysilicon layers formed at different heights. Polysilicon vias are advantageously used in a monolithic three dimensional memory array of charge storage transistors. Polysilicon vias according to the present invention can be used, for example, to connect the channel layer of a first device level of charge storage transistor memory cells to the channel layer of a second device layer of such cells formed above the first device level. Similarly, vias according to the present invention can be used to connect the wordline of a first device level of charge storage transistor memory cells to the channel layer of a second device layer of such cells.
摘要翻译：本发明提供了连接在不同高度形成的导电多晶硅层的多晶硅通孔。多晶硅通孔有利地用于电荷存储晶体管的单片三维存储器阵列中。根据本发明的多晶硅通孔可以用于例如将电荷存储晶体管存储单元的第一器件电平的沟道层连接到形成在第一器件电平之上的这样的单元的第二器件层的沟道层。类似地，根据本发明的通孔可用于将电荷存储晶体管存储单元的第一器件电平的字线连接到这种单元的第二器件层的沟道层。

10. 发明授权

US07402534B2 Pretreatment processes within a batch ALD reactor 失效
标题翻译：一批ALD反应器中的预处理过程
公开(公告)号：US07402534B2
公开(公告)日：2008-07-22
申请号：US11213161
申请日：2005-08-26
申请人： Maitreyee Mahajani
发明人： Maitreyee Mahajani
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/3141 , C23C16/0218 , C23C16/405 , C23C16/45531 , C23C16/45546 , H01L21/3142
摘要： Embodiments of the invention provide methods for forming a material on a substrate which includes exposing a plurality of substrates within a batch process chamber to a first oxidizing gas during a pretreatment process, exposing the substrates sequentially to a precursor and a second oxidizing gas during an ALD cycle and repeating the ALD cycle to form a material on the substrates. In a preferred example, a hafnium precursor is used during the ALD process to form a hafnium-containing material, such as hafnium oxide. In one example, the first and second oxidizing gases are the same oxidizing gases. In a preferred example, the first and second oxidizing gases are different oxidizing gases, such that the pretreatment process contains ozone and the ALD process contains water vapor.
摘要翻译：本发明的实施例提供了在衬底上形成材料的方法，其包括在预处理过程中将批处理室内的多个衬底暴露于第一氧化气体，在ALD期间将衬底依次暴露于前体和第二氧化气体循环并重复ALD循环以在基底上形成材料。在优选的实施例中，在ALD工艺期间使用铪前体以形成含铪的材料，例如氧化铪。在一个实例中，第一和第二氧化气体是相同的氧化气体。在优选的实施例中，第一和第二氧化气体是不同的氧化气体，使得预处理过程含有臭氧，并且ALD工艺含有水蒸气。

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