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1. 发明申请

WO2021084729A1 逓倍波発生器审中-公开
公开(公告)号：WO2021084729A1
公开(公告)日：2021-05-06
申请号：PCT/JP2019/042976
申请日：2019-11-01
申请人：三菱電機株式会社
发明人：丸山　隆也 , 堤　恒次 , 津留　正臣
IPC分类号： H03B19/00
摘要：高周波を出力する発振器（１）と、発振器（１）から出力された高周波を、位相がＮ（Ｎは、２以上の整数）分の３６０度ずつずれているＮ相の高周波に分配するＮ相分配器（２）と、Ｎ相分配器（２）により分配されたそれぞれの高周波と、それぞれの高周波に基づいて生成された２次以上の高調波とからなる、高次高調波を出力するＮ個の高調波発生器（３－１）～（３－Ｎ）と、Ｎ個の高調波発生器（３－１）～（３－Ｎ）から出力された高次高調波を合成する電力合成器（４）とを備えるように、逓倍波発生器を構成した。

2. 发明申请

WO2014058328A1 A MULTI-FUNCTION FREQUENCY CONTROL DEVICE 审中-公开
标题翻译：多功能频率控制装置
公开(公告)号：WO2014058328A1
公开(公告)日：2014-04-17
申请号：PCT/NZ2013/000186
申请日：2013-10-08
申请人： RAKON LIMITED
发明人： ROBINSON, Brent, John
IPC分类号： H03H9/00 , H03H3/00 , H01L41/00 , G01K11/22 , H03B19/00
CPC分类号： H03H9/08 , G01K1/14 , G01K7/22 , G01K11/26 , H03B5/326 , H03H9/0547 , H03H9/0552 , H03H9/1007 , H03H9/1021 , H03H9/1057 , H03H9/1071 , H03H9/205
摘要： A single frequency control device incorporating a high frequency resonator, a low frequency resonator and a temperature sensing element, the latter thermally coupled closely to the said resonators to facilitate temperature sensing with higher resolution and accuracy. Additional benefits offered by the structure include smaller size and lower cost.
摘要翻译：包括高频谐振器，低频谐振器和温度感测元件的单个频率控制装置，后者热耦合到所述谐振器，以便以更高的分辨率和精确度促进温度感测。该结构提供的附加优点包括更小的尺寸和更低的成本。

3. 发明申请

WO2013138713A3 GENERATING AND ROUTING A SUB-HARMONIC OF A LOCAL OSCILLATOR SIGNAL 审中-公开
标题翻译：产生和路由本地振荡器信号的次谐波
公开(公告)号：WO2013138713A3
公开(公告)日：2013-11-21
申请号：PCT/US2013032039
申请日：2013-03-15
申请人： QUALCOMM INC
发明人： TAGHIVAND MAZHAREDDIN
IPC分类号： H03B19/00 , H03B19/14
CPC分类号： H03L7/20 , H03B19/14
摘要： A particular apparatus for generating a local oscillator (LO) signal includes a phase-locked loop (PLL) configured to output a signal having a frequency that is a sub-harmonic of a LO frequency. The apparatus also includes a mixer block having a frequency upconverter configured to upconvert the signal to generate a LO signal having the LO frequency. For example, the PLL may be integrated into a multiple-input multiple-output (MIMO) device and may generate the sub-harmonic signal. The sub-harmonic signal may be routed to each of a plurality of mixer blocks of the MIMO device. Each of the mixer blocks may upconvert the sub-harmonic signal to generate the LO signal.
摘要翻译：用于产生本地振荡器（LO）信号的特定装置包括被配置为输出具有作为LO频率的次谐波的频率的信号的锁相环（PLL）。该装置还包括具有上变频器的混频器模块，该频率上变频器被配置为上变频信号以产生具有LO频率的LO信号。例如，PLL可以集成到多输入多输出（MIMO）设备中并且可以产生次谐波信号。子谐波信号可以被路由到MIMO设备的多个混合器块中的每一个。每个混频器块可以上变频副谐波信号以产生LO信号。

4. 发明申请

WO2008097768A3 PARAMETRIC POWER MULTIPLICATION 审中-公开
公开(公告)号：WO2008097768A3
公开(公告)日：2008-08-14
申请号：PCT/US2008/052387
申请日：2008-01-30
申请人： CPG TECHNOLOGIES, LLC , CORUM, James, F.
发明人： CORUM, James, F.
IPC分类号： H03B19/00
摘要： In various embodiments, power multipliers and associated methods are provided that employ parametric excitation. In one embodiment, a power multiplier is provided that has a power multiplying network. A parametric reactance is associated with the power multiplying network that negates at least a portion of a physical resistance of the power multiplying network.

5. 发明申请

WO2006119171A3 DIGITAL FREQUENCY SYNTHESIZER 审中-公开
标题翻译：数字频率合成器
公开(公告)号：WO2006119171A3
公开(公告)日：2007-05-03
申请号：PCT/US2006016596
申请日：2006-05-01
申请人： MULTIGIG INC , ZIESLER CONRAD HAVLUJ
发明人： ZIESLER CONRAD HAVLUJ
IPC分类号： H04L7/00 , H03B19/00 , H03K21/00 , H03K25/00 , H03L7/00 , H03L7/06 , H04L7/02 , H04L7/04
CPC分类号： H03L7/16
摘要： A system and method for synthesizing a frequency using a multi-phase oscillator. A state machine operating on one of the phases of the oscillator computes, based on a pair of input integers, a phase select vector that indicates when a particular phase of the multi-phase oscillator should be selected when a transition of the waveform of the output frequency is needed. The phase select vector is then re-timed to form a retimed phase vector so that each phase select signal is in phase with signal it is designed to select. The signals in the retimed phase vector then can be combined to create the output frequency directly or can be used to select the corresponding phase of the multi-phase oscillator, if more accuracy is desired. In one embodiment, the multi-phase oscillator is a rotary traveling wave oscillator which provides highly accurate multiple phases.
摘要翻译：一种使用多相振荡器合成频率的系统和方法。在振荡器的一个相位上工作的状态机基于一对输入整数来计算相位选择矢量，该相位选择矢量指示当输出的波形的转变时应该选择多相振荡器的特定相位需要频率然后相位选择矢量被重新定时以形成重新定时的相位矢量，使得每个相位选择信号与被设计为选择的信号同相。如果需要更多的精度，则重新定时相位矢量中的信号然后可以被组合以直接产生输出频率，或者可以用于选择多相振荡器的相应相位。在一个实施例中，多相振荡器是提供高精度多相的旋转行波振荡器。

6. 发明申请

WO2007036931A2 IMPROVED PERISTALTIC BLOWER OR PUMP 审中-公开
标题翻译：改进的永磁鼓风机或泵
公开(公告)号：WO2007036931A2
公开(公告)日：2007-04-05
申请号：PCT/IL2006/001100
申请日：2006-09-20
申请人： LESOKHIN, Yuri
发明人： LESOKHIN, Yuri
IPC分类号： H03B19/00
CPC分类号： F04B43/1253 , F04B43/1238 , F04B43/1246
摘要： An improved peristaltic blower or pump is provided that has rollers that press a tube. The improvement in the pump comprises tube opener that follows each one of the rollers and forces the tube to reopen. The improved peristaltic pump or blower is adapted to work in high number of rollers revolution. The improved peristaltic blower can be incorporated in a respiratory ventilator.
摘要翻译：提供了一种改进的蠕动式鼓风机或泵，其具有挤压管的辊。泵的改进包括沿着每个辊子的开管器，并迫使管道重新打开。改进的蠕动泵或鼓风机适用于大量滚筒转动。改进的蠕动鼓风机可以并入呼吸呼吸机。

7. 发明申请

WO2007007340A2 OBSERVATION SYSTEM 审中-公开
标题翻译：观察系统
公开(公告)号：WO2007007340A2
公开(公告)日：2007-01-18
申请号：PCT/IL2006/000820
申请日：2006-07-13
申请人： O.D.F. OPTRONICS LTD. , GAL, Ehud
发明人： GAL, Ehud
IPC分类号： H03B19/00
CPC分类号： B63G8/001 , B63G8/08 , B63G8/14 , B63G2008/004
摘要： An operator-controllable observation system including an observation assembly including a housing having a generally ellipsoidal configuration with a flat base surface, an imaging subassembly including at least one lens coupled to at least one imaging sensor, control and processing circuitry operative to process outputs of the imaging subassembly and an observation assembly transceiver operative to receive outputs from the control and processing circuitry and to transmit the outputs from the control and processing circuitry.
摘要翻译：一种操作者可控制的观察系统，包括观察组件，该观察组件包括具有平坦基底表面的大致椭圆形构造的壳体，成像子组件，其包括耦合到至少一个成像传感器的至少一个透镜，控制和处理电路，其可操作以处理成像子组件和观察组件收发器，其操作以接收来自控制和处理电路的输出并且传送来自控制和处理电路的输出。

8. 发明申请

WO2004105229A1 DELAY LINE BASED MULTIPLE FREQUENCY GENERATOR CIRCUITS FOR CDMA PROCESSING 审中-公开
标题翻译：用于CDMA处理的基于延迟线的多个频率发生器电路
公开(公告)号：WO2004105229A1
公开(公告)日：2004-12-02
申请号：PCT/US2004/015469
申请日：2004-05-18
申请人： MOTOROLA, INC., a corporation of the State of Delaware , TOMERLIN, Andrew , STENGEL, Robert, E.
发明人： TOMERLIN, Andrew , STENGEL, Robert, E.
IPC分类号： H03B19/00
CPC分类号： H03L7/087 , H03K3/84 , H03K5/00006 , H03K5/1504 , H03L7/0812 , H04B1/707 , H04B2201/70707
摘要： A frequency extension circuit, consistent with certain embodiments of the present invention has a first delay line (108) having a plurality of taps. The delay line receives a reference clock at an input with a clock rate of FREF. A second delay line (104, 150) also receives the reference clock at an input. A logic circuit (130, 134, …, 138, 140) combines signals from the delay line taps of the first delay line (108) with signals from the delay line taps of the second and/or first delay line (104, 150, 108) to produce a collection of clock pulses having a combined clock rate of FREF*2N. At least one of the delay lines can be locked to the reference clock using a delay locked loop. The clock pulses can be logically combined with a seed register (204) contents to produce a recursive sequence or with data for convolutional encoding, or with pilot data for correlation in a CDMA transceiver.
摘要翻译：与本发明的某些实施例一致的频率扩展电路具有具有多个抽头的第一延迟线（108）。延迟线在时钟速率为FREF的输入处接收参考时钟。第二延迟线（104,150）还在输入处接收参考时钟。逻辑电路（130,134，...，138,140）组合来自第一延迟线（108）的延迟线抽头的信号与来自第二和/或第一延迟线（104）的延迟线抽头的信号，以产生具有FREF * 2N的组合时钟速率的时钟脉冲的集合。使用延迟锁定环路，至少一个延迟线可以锁定到参考时钟。时钟脉冲可以与种子寄存器（204）内容逻辑地组合以产生递归序列或用于卷积编码的数据，或者与用于CDMA收发器中的相关的导频数据相结合。

9. 发明申请

WO98045936A1 FREQUENCY DOUBLING OF A QUADRATURE-AMPLITUDE MODULATED SIGNAL USING A FREQUENCY MULTIPLIER 审中-公开
标题翻译：使用频率乘法器的四倍频调制信号的频率双重
公开(公告)号：WO98045936A1
公开(公告)日：1998-10-15
申请号：PCT/US1998/006743
申请日：1998-04-07
IPC分类号： H03B19/00 , H03C1/02 , H03C3/06 , H03D7/00 , H04L27/36 , H03L7/00
CPC分类号： H04L27/367 , H03B19/00 , H03C1/02 , H03C3/06 , H03D7/00
摘要： A method and system of frequency for multiplying a signal (data in) having amplitude modulated by an amplitude modulator (10) using a frequency multiplier (13) operated at a bias voltage that is less than its saturation mode voltage. Prior to amplification, the amplitude modulated signal is pre-distorted by a pre-distorting stage (14, 15) to compensate for distortion caused by the frequency multiplier (13). The pre-distorting stage comprises a first pre-distortion phase (14) for converting the amplitude modulated signal into a corresponding square root signal to compensate for a first distortion type and a second pre-distortion phase (15) for pre-distorting the square root signal to compensate for the distortion caused by biasing the frequency multiplier (13) at a voltage less than the saturation voltage of the multiplier. As a result, a signal that is amplitude-modulated can be multiplied by a frequency multiplier (13).
摘要翻译：一种频率的方法和系统，用于使用在小于其饱和模式电压的偏置电压下工作的倍频器（13）对由幅度调制器（10）调制的幅度的信号（数据输入）进行乘法。在放大之前，幅度调制信号由预失真级（14,15）预失真，以补偿由倍频器引起的失真（13）。预失真级包括用于将幅度调制信号转换成相应的平方根信号以补偿第一失真类型的第一预失真相位（14）和用于对所述正方形进行预失真的第二预失真相位（15）根信号，以补偿由倍增器（13）偏置在小于乘法器的饱和电压的电压引起的失真。结果，被调幅的信号可以乘以倍频器（13）。

10. 发明申请

WO1997040576A1 FREQUENCY MULTIPLIER 审中-公开
标题翻译：频率乘法器
公开(公告)号：WO1997040576A1
公开(公告)日：1997-10-30
申请号：PCT/US1997006367
申请日：1997-04-16
申请人： CREDENCE SYSTEMS CORPORATION
发明人： CREDENCE SYSTEMS CORPORATION , MILLER, Charles, A.
IPC分类号： H03B19/00
CPC分类号： H03L7/0812 , H03B19/00 , H03B2200/009 , H03K5/00006 , H03L7/16
摘要： A frequency multiplier includes a set of substantially identical inverters (G1-G8) connected in series for successively delaying an input periodic reference signal (T0) to produce a set of inverter output signals. A phase controller (14, 18) adjusts the delay provided by each inverter so that the output signal of a last inverter (T8) of the series is phase-locked to a reference signal supplied as input to the first inverter of the series. Thus, the inverter outputs are evenly distributed in phase with pulse edges evenly dividing the period of the reference signal. A set of XOR gates (X1-X3) logically combine selected inverter output signals to produce periodic output signals of frequencies which are even multiples of the reference signal.
摘要翻译：倍频器包括一组基本相同的反相器（G1-G8），其串联连接以连续延迟输入周期性参考信号（T0）以产生一组反相器输出信号。相位控制器（14,18）调整每个逆变器提供的延迟，使得串联的最后一个反相器（T8）的输出信号被锁相到作为串联的第一反相器的输入提供的参考信号。因此，逆变器输出均匀分布在均匀分布参考信号周期的脉冲边沿。一组XOR门（X1-X3）逻辑组合所选的反相器输出信号，以产生频率的周期性输出信号，其频率是参考信号的偶数倍。

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