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1. 发明申请

WO9949608A3 APPARATUS AND METHOD FOR REALLOCATING TIME DIVISION MULTIPLEXING VOICE BANDWIDTH FOR DATA TRANSMISSION 审中-公开
标题翻译：用于重新分类数据传输的时分多址语音带宽的装置和方法
公开(公告)号：WO9949608A3
公开(公告)日：2008-03-20
申请号：PCT/US9906520
申请日：1999-03-25
申请人： PARADYNE CORP
发明人： HOLMQUIST KURT
IPC分类号： H04J3/17 , H04Q11/04
CPC分类号： H04Q11/0407 , H04Q2213/13034 , H04Q2213/13039 , H04Q2213/13093 , H04Q2213/13096 , H04Q2213/13107 , H04Q2213/13174 , H04Q2213/13179 , H04Q2213/13199 , H04Q2213/13201 , H04Q2213/13216 , H04Q2213/13292 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/13332 , H04Q2213/13389 , H04Q2213/13396
摘要： Apparatus and method for detecting periods of voice signal silence and allowing a data station (50) to acquire the voice signal TDM time slot to be used for data transmission. This is enabled since all data stations (50) on the multipoint communication line (47) listen to the line (47) during the first part of a voice signal time slot, all the data stations (50) on the communication line (47) know that the remainder of the voice time slot can be used for data transmission.
摘要翻译：用于检测语音信号静音的周期并允许数据站（50）获取要用于数据传输的语音信号TDM时隙的装置和方法。由于多点通信线路（47）上的所有数据站（50）在语音信号时隙的第一部分期间监听线路（47），所以在通信线路（47）上的所有数据站（50）知道语音时隙的剩余部分可以用于数据传输。

2. 发明申请

WO2006111787A1 POWER REDUCTION IN SWITCH ARCHITECTURES 审中-公开
标题翻译：开关结构中的功率降低
公开(公告)号：WO2006111787A1
公开(公告)日：2006-10-26
申请号：PCT/IB2005/001093
申请日：2005-04-21
申请人： INTEL CORPORATION , CHILUKOOR, Murali
发明人： CHILUKOOR, Murali
IPC分类号： H04Q3/52 , H04L12/56 , G06F1/32
CPC分类号： H04L49/40 , H04Q3/521 , H04Q2213/13003 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/1308 , H04Q2213/13103 , H04Q2213/13214 , H04Q2213/13296 , H04Q2213/13322 , H04Q2213/13389
摘要： A method according to one embodiment may include receiving, by an integrated circuit of a switch, a plurality of packets, monitoring a rate of the plurality of packets received at the integrated circuit, and adjusting a power consumption of at least a part of the integrated circuit in response to the rate of the plurality of packets received at the integrated circuit. A switch may include a plurality of ports configured to receive a plurality of packets, and an integrated circuit configured to monitor a rate of the plurality of packets received at the switch. The integrated circuit may be configured to adjust a power consumption of at least part of the switch in response to the rate of the plurality of packets received at the switch.
摘要翻译：根据一个实施例的方法可以包括通过交换机的集成电路接收多个分组，监视在集成电路处接收的多个分组的速率，以及调整集成的至少一部分的功率消耗响应于在集成电路处接收的多个分组的速率的电路。交换机可以包括被配置为接收多个分组的多个端口，以及被配置为监视在该交换机处接收到的多个分组的速率的集成电路。集成电路可以被配置为响应于在交换机处接收的多个分组的速率来调整交换机的至少一部分的功耗。

3. 发明申请

WO0165816A3 REMOTELY ACTUATED SPLITTER BYPASS SYSTEM AND METHOD 审中-公开
标题翻译：远程执行分路器旁路系统和方法
公开(公告)号：WO0165816A3
公开(公告)日：2002-05-02
申请号：PCT/US0106454
申请日：2001-02-28
申请人： TURNSTONE SYSTEMS INC
发明人： CHEA RAMON C W JR , DUFFIE P KINGSTON
IPC分类号： H04L12/26 , H04M3/30 , H04M11/06 , H04Q11/04
CPC分类号： H04Q11/0421 , H04L43/50 , H04M3/2209 , H04M3/30 , H04M11/062 , H04M2203/056 , H04Q2213/13039 , H04Q2213/1316 , H04Q2213/1319 , H04Q2213/13298 , H04Q2213/13305 , H04Q2213/1332 , H04Q2213/13322
摘要： The present invention is directed to a remotely actuated splitter bypass function (RASB) working in conjunction with a test head at the central office for testing and maintaining copper loops in the digital subscriber line environment. The RASB allows a competitive local exchange carrier to test and maintain the xDSL portion of the copper loop with minimal interference and disturbance to/from the plain old telephone system (POTS) service by bypassing the central office splitter. The splitter bypass operation includes the steps of selecting a copper loop pair for testing, actuating a first relay for monitor mode, actuating a second relay for bypass mode, testing the selected copper loop, and resetting the first and second relays back to normal mode. By applying positive and negative voltages from the tip and ring with respect to ground, various relays can be set (actuated) and reset to provide multiple modes of operations. In this manner, relays can be designed to respond in certain voltage levels and polarities.
摘要翻译：本发明涉及一种远程启动的分路旁路功能（RASB），其与中心局的测试头一起工作，用于在数字用户线环境中测试和维护铜环路。 RASB允许有竞争力的本地交换运营商通过绕过中心局分离器，以最小的干扰和对普通老式电话系统（POTS）服务的干扰，来测试和维护铜线路的xDSL部分。分路器旁路操作包括以下步骤：选择用于测试的铜环对，启动用于监视模式的第一继电器，致动用于旁路模式的第二继电器，测试所选择的铜回路，以及将第一和第二继电器复位回正常模式。通过从尖端和环相对于地面施加正和负电压，可以设置（启动）和复位各种继电器以提供多种操作模式。以这种方式，可以将继电器设计成在某些电压电平和极性下进行响应。

4. 发明申请

WO01031905A1 DSL MODEM WITH MANAGEMENT CAPABILITY 审中-公开
标题翻译：具有管理能力的DSL调制解调器
公开(公告)号：WO01031905A1
公开(公告)日：2001-05-03
申请号：PCT/US2000/029359
申请日：2000-10-25
IPC分类号： H04L12/24 , H04L12/28 , H04L12/413 , H04L12/56 , H04M11/06 , H04Q11/04 , H04L12/46
CPC分类号： H04L41/00 , H04L12/2856 , H04L12/2872 , H04L12/2889 , H04L12/5601 , H04L12/5692 , H04L49/205 , H04L49/351 , H04L2012/561 , H04L2012/5618 , H04L2012/5635 , H04L2012/5651 , H04L2012/5665 , H04M11/062 , H04Q11/04 , H04Q11/0478 , H04Q2213/13039 , H04Q2213/1305 , H04Q2213/13097 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13109 , H04Q2213/13162 , H04Q2213/13164 , H04Q2213/13166 , H04Q2213/1319 , H04Q2213/13199 , H04Q2213/13204 , H04Q2213/13216 , H04Q2213/13248 , H04Q2213/1329 , H04Q2213/13292 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/1334 , H04Q2213/13389
摘要： A modem using digital subscriber line (DSL) provides high speed access over a copper plant. The DSL modem exchanges management information to a terminating multiplexer using a proprietary protocol, thus enabling reliable, fast access to networking resources.
摘要翻译：使用数字用户线（DSL）的调制解调器通过铜厂提供高速接入。 DSL调制解调器使用专用协议将管理信息交换到终端多路复用器，从而实现对网络资源的可靠，快速的访问。

5. 发明申请

WO01031856A1 DSL ACCESS MULTIPLEXER 审中-公开
公开(公告)号：WO01031856A1
公开(公告)日：2001-05-03
申请号：PCT/US2000/029361
申请日：2000-10-25
IPC分类号： H04L12/24 , H04L12/28 , H04L12/413 , H04L12/56 , H04M11/06 , H04Q11/04 , H04L12/46
CPC分类号： H04L41/00 , H04L12/5601 , H04L12/5692 , H04L49/3009 , H04L49/351 , H04L2012/561 , H04L2012/5618 , H04L2012/5635 , H04L2012/5651 , H04L2012/5665 , H04M11/062 , H04Q11/04 , H04Q11/0478 , H04Q2213/13039 , H04Q2213/1305 , H04Q2213/13097 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13109 , H04Q2213/13162 , H04Q2213/13164 , H04Q2213/13166 , H04Q2213/1319 , H04Q2213/13199 , H04Q2213/13204 , H04Q2213/13216 , H04Q2213/13248 , H04Q2213/1329 , H04Q2213/13292 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/13322 , H04Q2213/1334 , H04Q2213/13389
摘要： A digital subscriber line (DSL) multiplexer is used in conjunction with a DSL modem to provide a reliable high speed connection for an end-user. The scaleable DSL multiplexer supports multiple DSL modems to a number of subscriber desiring increased bandwidth. The connection is reliably maintained by the multiplexer which utilizes a proprietary protocol to exchange management information to monitor the connection.
摘要翻译：数字用户线（DSL）多路复用器与DSL调制解调器结合使用以为最终用户提供可靠的高速连接。可扩展DSL多路复用器支持多个DSL调制解调器，以满足多个用户期望增加的带宽。该连接由多路复用器可靠地维护，该多路复用器利用专用协议来交换管理信息以监视连接。

6. 发明申请

WO2001017146A1 METHODS AND APPARATUS FOR HIGH-BANDWIDTH POINT-TO-POINT PROTOCOL COMMUNICATIONS OVER AN ISDN NETWORK 审中-公开
标题翻译：用于ISDN网络中高带宽点对点协议通信的方法和设备
公开(公告)号：WO2001017146A1
公开(公告)日：2001-03-08
申请号：PCT/US2000/024295
申请日：2000-08-31
申请人： TELCO SYSTEMS, INC.
发明人： BRETON, David
IPC分类号： H04J3/16
CPC分类号： H04Q11/0471 , H04L29/06 , H04L69/14 , H04Q2213/13106 , H04Q2213/13202 , H04Q2213/13208 , H04Q2213/13209 , H04Q2213/13224 , H04Q2213/13322
摘要： A network interface card (NIC) (20) using PPP (point to point protocol) with multiple dial up channels implements a state machine, e.g., with a field programmable gate array and a microprocessor (28), to perform "bonding" or inverse multiplexing of multichannel ISDN connections and to encapsulate data for transmission or reformat received data as HDLC frames, allowing a host or client running RAS to effect PPP communications with high bandwidth. The NIC includes a controller and a plurality of buffers, each storing data from a respective channel. The NIC generates reordering pointers for each of the plurality of buffers based on training data to reflect offsets or differences in frame count and interchannel delays in the data.
摘要翻译：使用具有多个拨号通道的PPP（点对点协议）的网络接口卡（NIC）（20）实现状态机，例如利用现场可编程门阵列和微处理器（28）执行“绑定”或反向多路ISDN连接的多路复用和封装数据以将接收的数据作为HDLC帧进行传输或重新格式化，从而允许运行RAS的主机或客户端以高带宽实现PPP通信。 NIC包括控制器和多个缓冲器，每个缓冲器存储来自相应通道的数据。 NIC基于训练数据生成针对多个缓冲器中的每一个的重新排序指针，以反映数据中的帧计数和通道间延迟的偏移或差异。

7. 发明申请

WO00064197A1 SCALABLE MULTI-PROCESSOR SYSTEM FOR REAL TIME APPLICATIONS IN COMMUNICATIONS ENGINEERING 审中-公开
标题翻译：可扩展的多处理器系统用于电信实时应用
公开(公告)号：WO00064197A1
公开(公告)日：2000-10-26
申请号：PCT/DE2000/001015
申请日：2000-04-03
IPC分类号： H04Q3/545 , G06F15/17
CPC分类号： H04Q3/5455 , H04Q2213/1305 , H04Q2213/13091 , H04Q2213/13092 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13107 , H04Q2213/13109 , H04Q2213/1329 , H04Q2213/13299 , H04Q2213/13322
摘要： The invention relates to an arrangement for processing data in accordance with real time requirements which can be flexibly adapted to the modified tasks. According to the invention, a processor (MP) is interactively connected to each of the following by a local bus (LB): a first access part of a receive memory (RMDP) with dual access, a first access part of a transmit memory (TMDP) with dual access and a peripheral bus (PB). A support device (SU) is connected to the second access part of the receive memory, to the second access part of the transmit memory, to the local bus, to a receive unit (RI) and to a transmission unit (TI). The local bus and the support device are connected by the peripheral bus to a data processing device (HOST) with an external memory. The inventive arrangement has a scalable processor base system that supports the processor in data management and processing and that is optimised for connection-oriented data streams, in order to increase capacity. This ensures the excellent programmability of real time-critical functions in telecommunications technology.
摘要翻译：为在实时性要求的处理数据，其可以灵活地适应不断变化的提出的目的，一种装置，其中通过本地总线（LB）的处理器（MP），每一个具有接收存储器的第一存取（RMDP）与2倍访问，用2倍访问和外围总线（PB）的传输存储器（TMDP）的第一访问可操作地连接; 被连接到支撑装置（SU）与接收存储器的第二访问，向所述第二接入发送存储器，本地总线，接收单元（RI）以及发送单元（TI）; 本地总线，并且经由外围总线支撑装置向数据处理装置（主机）连接到外部存储器。该布置提供了用于增加支持在数据管理和处理的处理器和优化的面向连接的数据流出一个可扩展的基于处理器的系统的性能，因此，在电信技术高性能可编程的实时关键的功能可以实现。

8. 发明申请

WO9967911A3 METHOD AND SYSTEM FOR CONTROLLING A DIGITAL SUBSCRIBER LINE 审中-公开
标题翻译：用于控制数字订户行的方法和系统
公开(公告)号：WO9967911A3
公开(公告)日：2000-07-20
申请号：PCT/US9914372
申请日：1999-06-24
申请人： DISCOVISION ASS , LEE KENNY YING THEENG
发明人： LEE KENNY YING THEENG
IPC分类号： H04L12/70 , H04Q11/04
CPC分类号： H04Q11/0478 , H04L2012/5616 , H04L2012/5627 , H04L2012/5674 , H04Q2213/13003 , H04Q2213/13034 , H04Q2213/1305 , H04Q2213/13058 , H04Q2213/13093 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13175 , H04Q2213/13199 , H04Q2213/13204 , H04Q2213/13216 , H04Q2213/1329 , H04Q2213/13299 , H04Q2213/1332 , H04Q2213/13322
摘要： A system and network interface for an ADSL modem. The modem assembly is formed from a PCI interface chip and a processor and an ASIC on a board, associated with a modem chip. The interface chip and processor can be controlled via downloaded code. A user interface is also defined that allows the controlling PC to issue commands to the modem assembly.
摘要翻译：用于ADSL调制解调器的系统和网络接口。调制解调器组件由PCI接口芯片和与调制解调器芯片相关联的板上的处理器和ASIC形成。接口芯片和处理器可以通过下载的代码进行控制。还定义了一个用户界面，允许控制PC向调制解调器组件发出命令。

9. 发明申请

WO00035161A1 CHANNEL CHECK TEST SYSTEM 审中-公开
标题翻译：通道检查测试系统
公开(公告)号：WO00035161A1
公开(公告)日：2000-06-15
申请号：PCT/JP1999/006771
申请日：1999-12-02
IPC分类号： H04M3/26 , H04B14/04 , H04L1/24 , H04L12/26 , H04M3/00 , H04M3/24 , H04Q11/04 , H04L29/02 , H04J3/14
CPC分类号： H04L1/24 , H04B14/048 , H04L43/50 , H04M3/00 , H04M3/244 , H04Q11/04 , H04Q2213/13034 , H04Q2213/1316 , H04Q2213/13166 , H04Q2213/13213 , H04Q2213/13216 , H04Q2213/1331 , H04Q2213/1332 , H04Q2213/13322
摘要： When the setting of the compression/expansion rules of an encoder or decoder contains an error, it causes a problem that even when it should be judged that a channel is electrically connected, a misjudgement is made. A channel check test system comprises a transmission-side DCME for inserting a nonlinearly-quantized input test pattern into a channel to be tested and a reception-side DCME having an adder for adding an offset value to the output value or a linear converter, a code extractor for extracting a code from the output signal of the adder, a delay unit for delaying the extracted code, an exclusive-OR circuit for performing an exclusive-OR operation of the extracted code and the output signal of the delay unit, a counter for counting the number of events that the output value agrees with a predetermined value, and a comparator for comparing the count with a threshold and outputting the result of the comparison. Thus it is possible to check the electrical connection of a channel under test, including the check of an error of the setting of the PCM compression/expansion rules in either the transmission-side DCME or the reception-side DCME.
摘要翻译：当编码器或解码器的压缩/扩展规则的设置包含错误时，会引起一个问题，即使当判断一个通道电连接时，就会产生误判。信道检查测试系统包括用于将非线性量化的输入测试模式插入待测试的信道的发送侧DCME和具有用于将偏移值与输出值相加的加法器的接收侧DCME或线性转换器，用于从加法器的输出信号中提取代码的代码提取器，用于延迟所提取的代码的延迟单元，用于执行提取的代码的异或运算的异或电路和延迟单元的输出信号;计数器用于对输出值与预定值一致的事件数进行计数，以及用于将计数与阈值进行比较并输出比较结果的比较器。因此，可以检查被测信道的电连接，包括在发送侧DCME或接收方DCME中检查PCM压缩/扩展规则的设置的错误。

10. 发明申请

WO99043112A1 METHOD AND APPARATUS FOR BYTE-BY-BYTE MULTIPLEXING OF DATA OVER PARALLEL COMMUNICATION LINKS 审中-公开
标题翻译：用于并行通信链路数据的BY BY BY BY BY MULTIPLEXING的方法和设备
公开(公告)号：WO99043112A1
公开(公告)日：1999-08-26
申请号：PCT/US1999/003494
申请日：1999-02-18
IPC分类号： H04J14/02 , H04L25/14 , H04J3/00 , H04Q3/64
CPC分类号： H04L25/14 , H04J14/02 , H04Q2213/13093 , H04Q2213/13106 , H04Q2213/13174 , H04Q2213/13204 , H04Q2213/13216 , H04Q2213/1329 , H04Q2213/13292 , H04Q2213/13295 , H04Q2213/13322 , H04Q2213/13367 , H04Q2213/13386 , H04Q2213/13389
摘要： A communication technique for transmitting packet data over parallel communication sublinks (202, 302) coupled to a processor unit (110) is provided. Initially, a method receives a packet of data from a first communication link which is coupled to a set of sublinks (116). The method distributes packets over each of the sublinks (116) utilizing a unique byte-by-byte (BBB) striping technique. Logically, the data bytes associated with each sublink (116) are collected into a slice of data and each set of slices are given a unique predetermined label. Each slice is then synchronously transmitted at the aggregate bandwidth of each sublink (116) in parallel across each corresponding sublink (116) to a receiver (120). A receiver (120) receives the slices of data from the set of sublinks (116) and aggregates the bandwidth of these two or more communication sublinks (116) into a single communication link. Unless there are errors, a packet is transmitted in order using multiple slices. The system recreates the original packet of data from sets of slices having the same unique label. Specifically, the system uses the byte-by-byte striping technique to extract the appropriate bytes of information from each slice received over the parallel sublinks (116) based upon a predetermined sublink sequence corresponding to the labels. This technique is advantageous in that it provides an optimal balance between preserving packet order and conserving network resources.
摘要翻译：提供了一种用于在耦合到处理器单元（110）的并行通信子链路（202,302）上发送分组数据的通信技术。最初，方法从第一通信链路接收数据包，该第一通信链路耦合到一组子链接（116）。该方法使用唯一的逐字节（BBB）条带化技术来分配每个子链路（116）上的分组。在逻辑上，与每个子链接（116）相关联的数据字节被收集到数据片中，并且每组片段被赋予唯一的预定标签。然后，每个片段以每个子链路（116）的聚合带宽在每个对应的子链路（116）上并行传输到接收机（120）。接收机（120）从子链路集合（116）接收数据片段，并将这两个或更多个通信子链路（116）的带宽聚合成单个通信链路。除非有错误，否则使用多个片段按顺序传输数据包。系统从具有相同唯一标签的片组重新创建原始数据包。具体地，系统使用逐字节条带化技术，基于对应于标签的预定子链接序列，从并行子链接（116）上接收的每个片段提取信息的适当字节。这种技术的优点在于它提供了保持分组顺序和节省网络资源之间的最佳平衡。

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