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1. 发明申请

WO2012116068A3 SOFTWARE APPLICATION DELIVERY AND LAUNCHING SYSTEM 审中-公开
标题翻译：软件应用程序交付和启动系统
公开(公告)号：WO2012116068A3
公开(公告)日：2012-11-01
申请号：PCT/US2012026125
申请日：2012-02-22
申请人： URBACH JULIAN MICHAEL
发明人： URBACH JULIAN MICHAEL
IPC分类号： G06F9/44 , G06F9/30 , G06F12/08 , G06F15/16
CPC分类号： G06F9/44573 , G06F9/4425 , G06F9/44526 , G06F9/44584 , G06F9/44594
摘要： One embodiment allocates a first virtual memory; receives executable code of a first piece of software; writes the executable code of the first piece of software directly into the first virtual memory; marks the first virtual memory as executable; executes the executable code of the first piece of software directly from the first virtual memory; and downloads and executes executable code of a second piece of software as facilitated by the executable code of the first piece of software.
摘要翻译：一个实施例分配第一虚拟存储器; 接收第一部分软件的可执行代码; 将第一块软件的可执行代码直接写入第一虚拟内存; 将第一个虚拟内存标记为可执行; 直接从第一虚拟存储器执行第一段软件的可执行代码; 并且下载并执行由第一软件的可执行代码促进的第二软件的可执行代码。

2. 发明申请

WO2010076599A1 NON-VOLATILE CONFIGURATION FOR SERIAL NON-VOLATILE MEMORY 审中-公开
标题翻译：用于串行非易失性存储器的非易失性配置
公开(公告)号：WO2010076599A1
公开(公告)日：2010-07-08
申请号：PCT/IB2008/055583
申请日：2008-12-30
申请人： ZERILLI, Tommaso , BUFANO, Raffaele , LOSPALLUTI, Sandra , ROLANDI, Paolo , ANDREOLI, Stefano
发明人： ZERILLI, Tommaso , BUFANO, Raffaele , LOSPALLUTI, Sandra , ROLANDI, Paolo , ANDREOLI, Stefano
IPC分类号： G11C16/10 , G11C16/20 , G06F13/12
CPC分类号： G06F12/0246 , G06F9/44573 , G06F2212/72 , G11C16/10 , G11C16/20
摘要： Example embodiments for configuring a serial non-volatile memory device may comprise a non-volatile configuration register to store a configuration value received from the processor, the configuration value to specify one or more attributes of a memory access operation. The configuration value may be read at least in part in response to power being applied to the memory device.
摘要翻译：用于配置串行非易失性存储器设备的示例性实施例可以包括用于存储从处理器接收的配置值的非易失性配置寄存器，该配置值指定存储器访问操作的一个或多个属性。至少部分地响应于施加到存储器件的功率来读取配置值。

3. 发明申请

WO2008058154A3 USING SHARED MEMORY WITH AN EXECUTE-IN-PLACE PROCESSOR AND A CO-PROCESSOR 审中-公开
标题翻译：使用共享存储器与执行处理器和协处理器
公开(公告)号：WO2008058154A3
公开(公告)日：2008-08-21
申请号：PCT/US2007083828
申请日：2007-11-06
申请人： SPANSION LLC , TOM JOE Y , NATARAJAN VENKAT
发明人： TOM JOE Y , NATARAJAN VENKAT
IPC分类号： G06F12/00
CPC分类号： G06F12/1416 , G06F9/44573 , G06F12/1408 , G06F21/85
摘要： The claimed subject matter provides systems and/or methods that facilitate sharing of a memory, having a single channel of access, between two or more processors. A host processor can be operatively connected to a co-processor and the memory in series. The host processor can execute in place to enable it to execute code directly from the memory, and can arbitrate access to the memory bus and thus the memory, so that the host processor can perform all memory fetches to the memory without interruption by the co-processor. The co-processor can be implemented as a finite state machine, and only accesses the memory during read or write cycles issued by the host processor. Various types of co-processors can be employed to perform various functions, such as cryptography and digital signal processing, for example. The memory can be volatile or non-volatile memory.
摘要翻译：所要求保护的主题提供了便于在两个或多个处理器之间共享具有单一访问通道的存储器的系统和/或方法。主机处理器可以可操作地连接到协处理器和串行存储器。主处理器可以执行到位以使其能够直接从存储器执行代码，并且可以仲裁对存储器总线的访问，从而对存储器进行仲裁，使得主机处理器可以执行所有存储器提取到存储器，处理器。协处理器可以被实现为有限状态机，并且仅在由主处理器发出的读或写周期期间访问存储器。可以使用各种类型的协处理器来执行各种功能，例如密码学和数字信号处理。内存可以是易失性或非易失性存储器。

4. 发明申请

WO2005109848A2 SYSTEM AND METHOD TO CONDITIONALLY SHRINK AN EXECUTABLE MODULE 审中-公开
标题翻译：有条件地收缩可执行模块的系统和方法
公开(公告)号：WO2005109848A2
公开(公告)日：2005-11-17
申请号：PCT/US2005/012128
申请日：2005-04-08
申请人： INTEL CORPORATION , ROTHMAN, Michael , ZIMMER, Vincent , MCGRATH, Greg
发明人： ROTHMAN, Michael , ZIMMER, Vincent , MCGRATH, Greg
IPC分类号： H04N1/32
CPC分类号： G06F9/44573 , G06F8/63 , G06F8/65 , G06F9/4411 , G06F2009/45562
摘要： An embodiment of the present invention is a system and method relating to shrinking, or optimizing, executable images resulting is a savings of storage space. In at least one embodiment, the present invention removes unnecessary fields, or information, from an executable image header before storing the image on a flash for a target platform. The removal of information that is irrelevant to the target platform allows the executable to take up less space on the flash memory. When loaded, the image is interpreted based on the optimized header information. In an embodiment, the image may be further compressed by known methods, to save additional space. Other embodiments are described and claimed.
摘要翻译：本发明的一个实施例是与缩小或优化可执行图像有关的系统和方法，从而节省了存储空间。在至少一个实施例中，本发明在将图像存储在用于目标平台的闪存上之前，从可执行映像头中去除不必要的字段或信息。删除与目标平台无关的信息允许可执行文件占用较少的闪存空间。加载时，基于优化的标题信息来解释图像。在一个实施例中，可以通过已知方法进一步压缩图像，以节省额外的空间。描述和要求保护其他实施例。

5. 发明申请

WO2004109506A3 PROXIMITY-BASED ADDRESSING FOR SUPPORTING IN-PLACE EXECUTION IN VIRTUAL MACHINES 审中-公开
标题翻译：用于支持虚拟机中的现场执行的基于接近的寻址
公开(公告)号：WO2004109506A3
公开(公告)日：2005-09-29
申请号：PCT/US2004009328
申请日：2004-03-25
申请人： SUN MICROSYSTEMS INC , TAIVALSAARI ANTERO K P
发明人： TAIVALSAARI ANTERO K P
IPC分类号： G06F9/445
CPC分类号： G06F9/44573
摘要： One embodiment of the present invention provides a system that facilitates performing proximity-based addressing in a platform-independent virtual machine. During execution of a program on the platform-independent virtual machine, the system receives an instruction and a parameter associated with the instruction that can be used to generate a reference to a program element associated with the instruction. Next, the system examines information encoded within the parameter to determine a proximity of the reference, and then uses the parameter to generate the reference to the program element, wherein the proximity of the reference determines how the reference is generated from the parameter.
摘要翻译：本发明的一个实施例提供一种有助于在与平台无关的虚拟机中执行基于邻近度寻址的系统。在独立于平台的虚拟机执行程序期间，系统接收指令和与指令相关联的参数，该指令可用于生成对与指令相关联的程序元素的引用。接下来，系统检查在参数内编码的信息以确定参考的接近度，然后使用参数来生成对程序元素的引用，其中参考的接近度确定如何从参数生成引用。

6. 发明申请

WO2005010637A3 SDRAM MEMORY DEVICE WITH AN EMBEDDED NAND FLASH CONTROLLER 审中-公开
标题翻译：具有嵌入式NAND闪存控制器的SDRAM存储器件
公开(公告)号：WO2005010637A3
公开(公告)日：2005-06-30
申请号：PCT/IL2004000399
申请日：2004-05-12
申请人： MILSYS LTD , AVRAHAM MEIR , INBAR DAN , PAZ ZIV
发明人： AVRAHAM MEIR , INBAR DAN , PAZ ZIV
IPC分类号： G06F20060101 , G06F12/00 , G06F13/28 , G11C5/00 , G11C14/00
CPC分类号： G11C14/00 , G06F9/4403 , G06F9/4406 , G06F9/44573 , G11C14/0018
摘要： A memory device (86) includes two dies. A first memory (76) is fabricated on one die (74). A controller (78) of the first memory (76) is fabricated on the other die (72) Also fabricated on the other die (72) is another component, such as a second memory (80), that communicates with a host system using a plurality of signals different from the signals used by the first memory. The device includes a single interface for communicating with the host system using only the respective signals of the second component. In a most preferred embodiment, the first memory (76) is a NAND flash memory and the second memory (80) is a SDRAM.
摘要翻译：存储器件（86）包括两个管芯。在一个管芯（74）上制造第一存储器（76）。第一存储器（76）的控制器（78）制造在另一个管芯（72）上。另一个管芯（72）上还制造另一部件，例如第二存储器（80），其与主机系统通信使用与第一存储器使用的信号不同的多个信号。该设备包括用于仅使用第二组件的相应信号与主机系统通信的单个接口。在最优选的实施例中，第一存储器（76）是NAND闪速存储器，第二存储器（80）是SDRAM。

7. 发明申请

WO2005010637A2 SDRAM MEMORY DEVICE WITH AN EMBEDDED NAND FLASH CONTROLLER 审中-公开
标题翻译：具有嵌入式NAND闪存控制器的SDRAM存储器件
公开(公告)号：WO2005010637A2
公开(公告)日：2005-02-03
申请号：PCT/IL2004/000399
申请日：2004-05-12
申请人： M-SYSTEMS FLASH DISK PIONEERS LTD. , AVRAHAM, Meir , INBAR, Dan , PAZ, Ziv
发明人： AVRAHAM, Meir , INBAR, Dan , PAZ, Ziv
IPC分类号： G06F
CPC分类号： G11C14/00 , G06F9/4403 , G06F9/4406 , G06F9/44573 , G11C14/0018
摘要： A memory device includes two dies. A first memory is fabricated on one die. A controller of the first memory is fabricated on the other die. Also fabricated on the other die is another component, such as a second memory, that communicates with a host system using a plurality of signals different from the signals used by the first memory. The device includes a single interface for communicating with the host system using only the respective signals of the second component. In a most preferred embodiment, the first memory is a NAND flash memory and the second memory is a SDRAM.
摘要翻译：存储器件包括两个管芯。第一个存储器在一个管芯上制造。第一存储器的控制器在另一个芯片上制造。还在另一个芯片上制造的另一个部件，例如第二存储器，其使用与第一存储器使用的信号不同的多个信号与主机系统通信。该设备包括用于仅使用第二组件的相应信号与主机系统通信的单个接口。在最优选的实施例中，第一存储器是NAND闪存，第二存储器是SDRAM。

8. 发明申请

WO2012116068A2 SOFTWARE APPLICATION DELIVERY AND LAUNCHING SYSTEM 审中-公开
标题翻译：软件应用交付和启动系统
公开(公告)号：WO2012116068A2
公开(公告)日：2012-08-30
申请号：PCT/US2012/026125
申请日：2012-02-22
申请人： URBACH, Julian, Michael
发明人： URBACH, Julian, Michael
IPC分类号： G06F9/44 , G06F9/30 , G06F12/08 , G06F15/16
CPC分类号： G06F9/44573 , G06F9/44526 , G06F9/44584 , G06F9/44594 , G06F9/4484
摘要： One embodiment allocates a first virtual memory; receives executable code of a first piece of software; writes the executable code of the first piece of software directly into the first virtual memory; marks the first virtual memory as executable; executes the executable code of the first piece of software directly from the first virtual memory; and downloads and executes executable code of a second piece of software as facilitated by the executable code of the first piece of software.
摘要翻译：一个实施例分配第一虚拟存储器; 接收第一块软件的可执行代码; 将第一软件的可执行代码直接写入第一虚拟存储器; 将第一个虚拟内存标记为可执行文件; 直接从第一虚拟存储器执行第一软件的可执行代码; 并且由第一软件的可执行代码促进下载并执行第二软件的可执行代码。

9. 发明申请

WO2012025728A1 Electronics Device 审中-公开
标题翻译：电子设备
公开(公告)号：WO2012025728A1
公开(公告)日：2012-03-01
申请号：PCT/GB2011/001278
申请日：2011-08-26
申请人： FXI TECHNOLOGIES AS , LANGÅS, Thomas , DJUPDAL, Asbjørn , LJOSLAND, Borgar , DYBDAHL, Torstein, Hernes , TOTHILL, John, Paul
发明人： LANGÅS, Thomas , DJUPDAL, Asbjørn , LJOSLAND, Borgar , DYBDAHL, Torstein, Hernes
IPC分类号： G06F3/06
CPC分类号： H04L67/1097 , G06F3/0605 , G06F3/061 , G06F3/0643 , G06F3/0655 , G06F3/0664 , G06F3/0667 , G06F3/0671 , G06F3/0679 , G06F3/0688 , G06F9/44573 , G06F9/44584 , G06F9/547 , G06F13/10 , G06F13/102 , G06F13/28 , G06F13/364 , G06F13/385 , G06F13/4282 , G06F21/575 , G06F21/6218 , H04L29/08549 , H04L67/42 , Y02D10/14 , Y02D10/151
摘要： A storage device 3, such as an SD card, that is coupled to a host device 2, such as a mobile phone, includes a computing environment 8. The computing environment 8 comprises an application processing part 6, an interface processing part 7, and a shared memory 9, and is operable to execute one or more applications on the storage device 3, and a set of software components that together provide a server module on the storage device 3. There is a corresponding set of client software components on the host device 2 that together provide a client module on the host device 2 that can cooperate with the server module on the storage device 3 to allow an application that is being executed in the computing environment 8 of the storage device 3 to access and use input and output functions of the host device 2.
摘要翻译：耦合到诸如移动电话的主机设备2的诸如SD卡的存储设备3包括计算环境8.计算环境8包括应用处理部分6，接口处理部分7和共享存储器9，并且可操作以在存储设备3上执行一个或多个应用，以及一组软件组件，其一起在存储设备3上提供服务器模块。在主机上存在相应的一组客户端软件组件设备2一起在主机设备2上提供可与存储设备3上的服务器模块协作的客户端模块，以允许在存储设备3的计算环境8中正在执行的应用访问并使用输入和输出主机2的功能。

10. 发明申请

WO2010076598A1 EXCUTE-IN-PLACE MODE CONFIGURATION FOR SERIAL NON-VOLATILE MEMORY 审中-公开
标题翻译：用于串行非易失性存储器的EXCUTE-IN-PLACE模式配置
公开(公告)号：WO2010076598A1
公开(公告)日：2010-07-08
申请号：PCT/IB2008/055582
申请日：2008-12-30
申请人： ZERILLI, Tommaso , BUFANO, Raffaele , LOSPALLUTI, Sandra , ANDREOLI, Stefano , ROLANDI, Paolo
发明人： ZERILLI, Tommaso , BUFANO, Raffaele , LOSPALLUTI, Sandra , ANDREOLI, Stefano , ROLANDI, Paolo
IPC分类号： G11C16/20
CPC分类号： G06F12/0246 , G06F9/30098 , G06F9/44573 , G06F2212/72 , G06F2212/7206 , G11C16/26 , G11C2216/30
摘要： Example embodiments for configuring a serial non-volatile memory device for an execute-in-place mode may comprise a non-volatile configuration register to store an execute-in-p!ace mode value that may be read at least in part in response to power being applied to the memory device.
摘要翻译：用于配置用于就地执行模式的串行非易失性存储器件的示例性实施例可以包括非易失性配置寄存器，用于存储执行模式值，其至少部分地响应于电力被施加到存储器件。

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