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1. 发明申请

WO2006048861A3 STATES ENCLODING IN MULTI-BIT FLASH CELLS FOR OPTIMIZING ERRROR RATE 审中-公开
标题翻译：用于优化误码率的多点闪存中的状态
公开(公告)号：WO2006048861A3
公开(公告)日：2008-01-10
申请号：PCT/IL2005001116
申请日：2005-10-26
申请人： MILSYS LTD , MURIN MARK
发明人： MURIN MARK
IPC分类号： G06F12/00
CPC分类号： G11C11/5628
摘要： To store N bits of M=2 logical pages, the bits are interleaved and the interleaved bits are programmed to [N/M] memory cells, M bits per cell. Preferably, the interleaving puts the same number of bits from each logical page into each bit-page of the [N/M] cells. When the bits are read from the cells, the bits are de-interleaved. The interleaving may be deterministic or random, and may be effected by software or by dedicated hardware.
摘要翻译：为了存储M = 2个逻辑页的N位，这些位被交织，并且交织位被编程到[N / M]个存储单元，每个单元M位。优选地，交织将来自每个逻辑页的相同数量的比特放入[N / M]个小区的每个比特页。当从单元读取这些位时，这些位被解交织。交织可以是确定性的或随机的，并且可以由软件或专用硬件实现。

2. 发明申请

WO2005050345A3 METHOD OF TRACELESS PORTABLE APPLICATION EXECUTION 审中-公开
标题翻译：无缝便携式应用执行方法
公开(公告)号：WO2005050345A3
公开(公告)日：2007-06-14
申请号：PCT/IL2004001075
申请日：2004-11-24
申请人： MILSYS LTD , BRYANT-RICH DOANLD RAY , GOLDE ITTAI , BEN TSVI YAAKOV , BAUM EREZ , YERUSHALMY DANIEL
发明人： BRYANT-RICH DOANLD RAY , GOLDE ITTAI , BEN TSVI YAAKOV , BAUM EREZ , YERUSHALMY DANIEL
IPC分类号： G06F1/24 , G06F20060101 , G06F9/445 , G06F15/177 , G06F21/00
CPC分类号： G06F9/44584 , G06F9/44594 , G06F21/62 , G06F2221/2143
摘要： When a non-volatile memory device (12) is reversibly operationally connected to a computer (30), the computer executes an application that is stored on the device (56). The execution causes changes to a non-volatile memory of the computer. After the execution terminates (58), all such changes are undone (64), either immediately if the termination was normal or upon rebooting the computer if the termination was abnormal. Before or during the execution, information related to the changes is recorded. The undoing of the changes is based on that information. Examples of such information recorded before the execution include a list of expected changes and a partial or full copy of the computer's non- volatile memory.
摘要翻译：当非易失性存储器件（12）可逆地操作地连接到计算机（30）时，计算机执行存储在设备（56）上的应用程序。执行会导致对计算机的非易失性存储器的更改。执行结束后（58），所有这些更改将被撤销（64），如果终止正常，或者如果终止异常则重新启动计算机。在执行之前或执行期间，记录与更改有关的信息。更改的撤销基于该信息。在执行之前记录的这种信息的示例包括计算机的非易失性存储器的预期变化和部分或完整副本的列表。

3. 发明申请

WO2006040758A3 ADAPTIVE BOOTING FROM MASS STORAGE DEVICE 审中-公开
标题翻译：适用于大容量存储设备
公开(公告)号：WO2006040758A3
公开(公告)日：2006-11-16
申请号：PCT/IL2005001066
申请日：2005-10-06
申请人： MILSYS LTD , BRCIN SLOBODAN , BLEYER AKIVA , ZIEGLER ALON
发明人： BRCIN SLOBODAN , BLEYER AKIVA , ZIEGLER ALON
IPC分类号： G06F15/177 , G06F12/00
CPC分类号： G06F9/4406
摘要： A prior art mass storage device for bootstrap loading of a computer operating system must be configured on a set-up computer whose BIOS has the same geometrical translation scheme as the BIOS of the host computer where the storage device is intended to be installed and used. The present invention provides a mass storage device capable of bootstrap loading the computer operating system despite differences between the BIOS geometrical translation scheme of the set-up computer and that of the host computer, along with methods for implementing and preparing such a device. The present invention provides executable code on the storage device itself, which resolves the geometrical translation of the set-up configuration to comply with that of the host computer, independent of the respective BIOS translation schemes used for set-up and host computers.
摘要翻译：用于计算机操作系统的引导加载的现有技术大容量存储设备必须配置在其BIOS具有与主计算机的BIOS相同的几何平移方案的设置计算机上，其中存储设备旨在被安装和使用。本发明提供一种能够引导加载计算机操作系统的大容量存储设备，尽管设置计算机的BIOS几何转换方案与主计算机的BIOS几何转换方案之间存在差异，以及用于实现和准备这种设备的方法。本发明提供了存储设备本身上的可执行代码，其独立于用于设置和主计算机的相应BIOS翻译方案，解决了设置配置的几何平移以符合主机计算机的配置。

4. 发明申请

WO2005074386A3 TWO-PHASE PROGRAMMING OF A FLASH MEMORY 审中-公开
标题翻译：闪存存储器的两相编程
公开(公告)号：WO2005074386A3
公开(公告)日：2006-06-15
申请号：PCT/IL2005000031
申请日：2005-01-09
申请人： MILSYS LTD , RONEN AMIR , AVRAHAM MEIR
发明人： RONEN AMIR , AVRAHAM MEIR
IPC分类号： G11C11/34 , G11C16/12 , G11C16/34
CPC分类号： G11C16/12 , G11C16/3468
摘要： A datum is stored in a memory by placing a memory cell in a first state that is indicative of the datum, and later placing the same or a different cell in a second state that is indicative of the same datum. If a different cell is placed in the second state, both cells are programmed to store the same number of bits, and then preferably the first cell is erased. Preferably, the first cell is placed in the first state by the application thereto of a first train of voltage pulses until the cell's threshold voltage exceeds a first reference voltage, and the first or second cell is placed in the second state by the application thereto of a second train of voltage pulses until the cell's threshold voltage exceeds a second reference voltage.
摘要翻译：通过将存储器单元放置在指示基准的第一状态中，并且稍后将相同或不同的单元放置在指示相同基准的第二状态中，将基准存储在存储器中。如果不同的单元被置于第二状态，则两个单元被编程为存储相同数量的位，然后优选地，第一单元被擦除。优选地，通过对其施加第一列电压脉冲将第一电池放置在第一状态，直到电池的阈值电压超过第一参考电压，并且第一或第二电池通过其应用被置于第二状态第二列电压脉冲，直到电池的阈值电压超过第二参考电压。

5. 发明申请

WO2006051527A2 INTEGRATED CIRCUIT DIE WITH LOGICALLY EQUIVALENT BONDING PADS 审中-公开
标题翻译：集成电路与逻辑等效粘接垫
公开(公告)号：WO2006051527A2
公开(公告)日：2006-05-18
申请号：PCT/IL2005001168
申请日：2005-11-08
申请人： MILSYS LTD , RONEN AMIR
发明人： RONEN AMIR
IPC分类号： H01L27/10 , H01L21/82
CPC分类号： H01L24/49 , H01L23/50 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/4911 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06568 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/10253 , H01L2924/14 , H01L2924/19107 , H01L2924/30105 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An integrated circuit (IC) die includes two bonding pads, that share a common logical function, such as signal input or signal output, separated by the width of the die, and preferably on opposite sides of the die. System-in-package devices are produced by steps including directly electrically connecting one or the other bonding pad to bonding pads of other, functionally different IC dies, with the bonding pads of the other IC dies, to which are connected bonding pads of common logical function of the IC dies of the present invention, being functionally identical but geometrically different. Multchip package devices are produced by stacking the IC dies of the present invention with other IC dies and directly electrically connecting one or the other bonding pad to different bonding pads of the other IC dies.
摘要翻译：集成电路（IC）管芯包括两个接合焊盘，它们共享共同的逻辑功能，例如信号输入或信号输出，由芯片的宽度，最好在芯片的相对侧分开。系统级封装器件通过以下步骤制造，该步骤包括将一个或另一个焊接焊盘直接电连接到另一个功能不同的IC管芯的焊盘，另一个IC管芯的焊盘与公共逻辑的连接焊盘本发明的IC芯片的功能在功能上相同但几何上不同。多芯片封装器件通过将本发明的IC管芯与其它IC管芯堆叠并将一个或另一个焊盘直接电连接到另一个IC管芯的不同接合焊盘而制造。

6. 发明申请

WO2005048008A3 ENHANCED NATURAL MONTGOMERY EXPONENT MASKING 审中-公开
标题翻译：增强自然蒙特卡罗方面的掩护
公开(公告)号：WO2005048008A3
公开(公告)日：2005-11-24
申请号：PCT/IL2004001053
申请日：2004-11-16
申请人： MILSYS LTD , GRESSEL CARMI , DOLGUNOV BORIS , DEROUET ODILE
发明人： GRESSEL CARMI , DOLGUNOV BORIS , DEROUET ODILE
IPC分类号： G06F20060101 , G06F7/72 , H04K1/00 , H04L9/00
CPC分类号： G06F7/728 , G06F2207/7238 , H04L9/002 , H04L9/06 , H04L9/3013 , H04L9/302 , H04L2209/04
摘要： A method and apparatus for masking messages subject to exponentiation in a secure cryptographic device subject to a chosen-message attack for the purpose of discovering secret exponent information through non-invasive physical testing of the cryptographic device. Through the use of Montgomery arithmetic, a random multiplicative factor is applied to the input message, and can be easily removed without having to compute the inverse of the random factor, as is necessary with prior-art masking techniques. This masking complements and enhances the natural masking inherent in the use of Montgomery arithmetic. The method of the persent invention is ideally suited to Montgomery arithmetic processors, but is not limited thereto, and can be used in combination with other security techniques.
摘要翻译：一种用于屏蔽在受到选择的消息攻击的安全密码装置中的乘法的消息的方法和装置，用于通过密码装置的非侵入式物理测试来发现秘密指数信息。通过使用蒙哥马利算术，将随机乘法因子应用于输入消息，并且可以容易地去除，而不必像现有技术的掩蔽技术那样计算随机因子的倒数。这种掩蔽补充并增强了使用蒙哥马利算术固有的自然掩蔽。本发明的方法理想地适用于蒙哥马利算术处理器，但不限于此，并且可以与其他安全技术组合使用。

7. 发明申请

WO1993017389A1 EXTERNALLY UPDATABLE ROM (EUROM) 审中-公开
标题翻译：外部可更新ROM（EUROM）
公开(公告)号：WO1993017389A1
公开(公告)日：1993-09-02
申请号：PCT/US1992011212
申请日：1992-12-15
申请人： MILSYS, LTD.
发明人： MILSYS, LTD. , MORAN, Dov , MERGUI, Arie , FRIEDMAN, Amir
IPC分类号： G06F13/00
CPC分类号： G11C16/102
摘要： An electronically programmable read-only memory module (12) has an embedded micro-controller (18) for program/data updating. Upon power up, the module (12) acts as a prior art ROM. The embedded micro-controller (18) in a standby mode is responsive to data arriving from a download communication interface (16) that is accessible by an external port (26) on the module (12). The external port (26) and download communication interface (16) is independent of the system of which the module (12) is an operating component. When a command is received from the download communication interface (16), the micro-controller (18) switches the memory device (12) to respond to micro-controller inputs that starts an update session. The micro-controller (18) receives download data from the download communication interface (16) and writes it into the memory device (12). When the download process terminates, the micro-controller (18) switches the memory device (12) back to its system interface.

8. 发明申请

WO2006109289A3 SMARTCARD POWER MANAGEMENT 审中-公开
标题翻译：智能卡电源管理
公开(公告)号：WO2006109289A3
公开(公告)日：2007-07-05
申请号：PCT/IL2006000378
申请日：2006-03-26
申请人： MILSYS LTD , DARIEL DANI
发明人： DARIEL DANI
IPC分类号： G06K19/06
CPC分类号： G06K19/0701 , G06K7/0008 , G06K19/07
摘要： Portable smartcard devices, methods of operating smartcard devices, systems including a smartcard device and a terminal, and computer readable storage media including instructions for smartcard devices are provided. According to some embodiments, the smartcard includes a controller for executing commands received from a terminal, where execution of at least one command affects a power consumption of the smartcard device during subsequent execution of at least one other command. Optionally, the command which modifies smartcard power consumption is issued by the terminal in accordance with a power consumption decision. According to some embodiments, as an allowed power consumption of the smartcard device increases, the performance of the smartcard increases, and vice versa. According to some embodiments, the execution of the at least one command sets an operating parameter of the smartcard device, such as a clock frequency or a time of a non-volatile memory operation, thereby affecting the power consumption of the smartcard device during the subsequent executing. Alternatively or additionally, the execution of the at least one command enables or disables a functional unit of the smartcard device. Exemplary functional units include but are not limited to floating-point units and cryptographic units. Alternatively or additionally, the execution of the at least one command enables or disables memory such as non-volatile memory of the smartcard device. According to some embodiments, the execution of the at least one command sets an operating parameter of internal circuitry of the smartcard.
摘要翻译：提供便携式智能卡设备，操作智能卡设备的方法，包括智能卡设备和终端的系统，以及包括用于智能卡设备的指令的计算机可读存储介质。根据一些实施例，智能卡包括用于执行从终端接收的命令的控制器，其中至少一个命令的执行在后续执行至少一个其他命令期间影响智能卡设备的功耗。可选地，根据功率消耗决定由终端发出修改智能卡功耗的命令。根据一些实施例，随着智能卡设备的允许功率消耗增加，智能卡的性能增加，反之亦然。根据一些实施例，所述至少一个命令的执行设置智能卡设备的操作参数，诸如时钟频率或非易失性存储器操作的时间，从而在后续期间影响智能卡设备的功耗执行。或者或另外，至少一个命令的执行启用或禁用智能卡设备的功能单元。示例性功能单元包括但不限于浮点单元和加密单元。或者或另外，至少一个命令的执行启用或禁用诸如智能卡设备的非易失性存储器的存储器。根据一些实施例，至少一个命令的执行设置智能卡的内部电路的操作参数。

9. 发明申请

WO2006120680A3 LARGE NUMBER MULTIPLICATION METHOD AND DEVICE 审中-公开
标题翻译：大数量化方法和装置
公开(公告)号：WO2006120680A3
公开(公告)日：2007-05-03
申请号：PCT/IL2006000551
申请日：2006-05-09
申请人： MILSYS LTD , DROR ITAI , DOLGUNOV BORIS
发明人： DROR ITAI , DOLGUNOV BORIS
IPC分类号： G06F7/52
CPC分类号： G06F7/525
摘要： A signed multiplication method and a corresponding device for multiplying a first multiplicand with a second multiplicand. The device stores the first multiplicand in a first register as a first vector of at least one respective digit and storing the second multiplicand in a second register as a second vector of at least one respective digit, each digit having a pre-determined number of bits. The method further converts the digits of the first vector and the second vector to corresponding digits of one bit less each than the pre-determined number of bits. A processor effects signed multiplication of the multiplicands.
摘要翻译：一种有符号乘法方法和用于将第一被乘数与第二被乘数相乘的相应装置。设备将第一被乘数存储在第一寄存器中作为至少一个相应数字的第一向量，并将第二被乘数存储在第二寄存器中作为至少一个相应数字的第二向量，每个数字具有预定数量的位。该方法还将第一向量和第二向量的数字转换成比预定位数少一位的相应位数。处理器对被乘数进行带符号乘法。

10. 发明申请

WO2005086583A3 SYSTEM, APPARATUS AND METHOD FOR SHARING MEDIA 审中-公开
标题翻译：系统，装置和共享介质的方法
公开(公告)号：WO2005086583A3
公开(公告)日：2006-08-03
申请号：PCT/IL2005000287
申请日：2005-03-13
申请人： MILSYS LTD , TEICHER MORDECHAI , ZIV ARAN , BYCHKOV EYAL
发明人： TEICHER MORDECHAI , ZIV ARAN , BYCHKOV EYAL
IPC分类号： G06F13/36 , G06F12/00 , G06F13/40
CPC分类号： G06F13/4027
摘要： A digital appliance, such as a digital camera, an MP3 player or a digital voice recorder, uses a memory card to store data. The appliance and the card use USB interfaces for appliance-card communication. When the appliance is connected to a host computer directly or via a passive USB cable, a switch within the appliance automatically establishes host-card communication for reading and/or writing data. In another embodiment, the switch can also connect the host to the appliance for configuration or operation. In another embodiment, the memory card temporarily stores data to be exchanged between the host and the appliance.
摘要翻译：诸如数码相机，MP3播放器或数字语音记录器的数字设备使用存储卡来存储数据。设备和卡使用USB接口进行设备卡通信。当设备直接或通过无源USB电缆连接到主机时，设备内的交换机将自动建立用于读取和/或写入数据的主机卡通信。在另一个实施例中，交换机还可以将主机连接到设备用于配置或操作。在另一个实施例中，存储卡临时存储要在主机和设备之间交换的数据。

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